feat(wdt): graduate watch dog hal driver into a new component: esp_hal_wdt

components/bootloader/subproject/main/ld/esp32/bootloader.ld.in

@@ -69,9 +69,9 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32c2/bootloader.ld.in

@@ -89,10 +89,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32c3/bootloader.ld.in

@@ -89,10 +89,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32c5/bootloader.ld.in

@@ -87,10 +87,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32c6/bootloader.ld.in

@@ -88,10 +88,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32c61/bootloader.ld.in

@@ -87,10 +87,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32h2/bootloader.ld.in

@@ -87,10 +87,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32h21/bootloader.ld.in

@@ -87,10 +87,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32h4/bootloader.ld.in

@@ -87,10 +87,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32p4/bootloader.ld.in

@@ -86,11 +86,11 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:key_mgr_hal.*(.literal.key_mgr_hal_set_key_usage .text.key_mgr_hal_set_key_usage)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32p4/bootloader.rev3.ld.in

@@ -86,11 +86,11 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:key_mgr_hal.*(.literal.key_mgr_hal_set_key_usage .text.key_mgr_hal_set_key_usage)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32s2/bootloader.ld.in

@@ -56,10 +56,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader/subproject/main/ld/esp32s3/bootloader.ld.in

@@ -91,10 +91,10 @@ SECTIONS
     *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
     *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
     *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
-    *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
     *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
+    *libesp_hal_wdt.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)

components/bootloader_support/CMakeLists.txt

@@ -72,7 +72,7 @@ endif()
 if(BOOTLOADER_BUILD OR CONFIG_APP_BUILD_TYPE_RAM)
     set(include_dirs "include" "bootloader_flash/include"
         "private_include")
-    set(priv_requires micro-ecc spi_flash efuse esp_bootloader_format esp_app_format esptool_py)
+    set(priv_requires micro-ecc spi_flash efuse esp_bootloader_format esp_app_format esptool_py esp_hal_wdt)
     list(APPEND srcs
     "src/bootloader_init.c"
     "src/bootloader_clock_loader.c"
@@ -84,12 +84,11 @@ if(BOOTLOADER_BUILD OR CONFIG_APP_BUILD_TYPE_RAM)
     if(CONFIG_SECURE_ENABLE_TEE)
         list(APPEND srcs "src/bootloader_utility_tee.c")
     endif()
-    list(APPEND priv_requires hal)
 else()
     set(include_dirs "include" "bootloader_flash/include")
     set(priv_include_dirs "private_include")
     # heap is required for `heap_memory_layout.h` header
-    set(priv_requires spi_flash mbedtls efuse heap esp_bootloader_format esp_app_format esptool_py)
+    set(priv_requires spi_flash mbedtls efuse heap esp_bootloader_format esp_app_format esptool_py esp_hal_wdt)
 endif()
 
 if(BOOTLOADER_BUILD)

components/esp_hal_wdt/CMakeLists.txt

@@ -0,0 +1,28 @@
+idf_build_get_property(target IDF_TARGET)
+if(${target} STREQUAL "linux")
+    return() # This component is not supported by the POSIX/Linux simulator
+endif()
+
+set(srcs)
+set(public_include "include" "${target}/include")
+
+if(CONFIG_SOC_WDT_SUPPORTED)
+    list(APPEND srcs "${target}/mwdt_periph.c")
+endif()
+
+if(CONFIG_SOC_WDT_SUPPORTED)
+    if(CONFIG_HAL_WDT_USE_ROM_IMPL)
+        list(APPEND srcs "rom_patch.c")
+    else()
+        list(APPEND srcs "wdt_hal_iram.c")
+    endif()
+endif()
+
+if(CONFIG_SOC_XT_WDT_SUPPORTED)
+    list(APPEND srcs "xt_wdt_hal.c")
+endif()
+
+idf_component_register(SRCS ${srcs}
+                       INCLUDE_DIRS ${public_include}
+                       REQUIRES soc hal esp_hal_timg
+                       LDFRAGMENTS linker.lf)

components/esp_hal_wdt/README.md

@@ -0,0 +1,52 @@
+# ESP Hardware Abstraction Layer for Watch Dog Peripheral(s)
+
+> [!NOTE]
+> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
+
+## Overview
+
+The ESP Hardware Abstraction Layer for Watch Dog Peripherals (`esp_hal_wdt`) provides a unified interface to interact with various watchdog timer (WDT) peripherals across all ESP chip families. This component abstracts the hardware-specific details of different watchdog implementations, enabling consistent usage patterns regardless of the underlying hardware.
+
+The component supports multiple types of watchdog timers:
+- RTC Watchdog Timer (RWDT)
+- Main System Watchdog Timer (MWDT) of Timer Group(s)
+- XTAL32K Watchdog Timer (where supported)
+
+## Architecture
+
+The HAL architecture consists of two primary layers:
+
+1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with watch dog peripherals, including:
+   - Initialization and de-initialization functions
+   - Timer configuration and stage management
+   - Feeding (resetting) the watchdog timer
+   - Interrupt handling
+   - Enable/disable functionality
+
+2. **Low-Level Layer (Bottom)**: Acts as a translation layer between the HAL and the register definitions in the `soc` component, handling:
+   - Register access abstractions
+   - Chip-specific register configurations
+   - Hardware feature compatibility
+   - Clock and prescaler settings
+
+## Features
+
+- Unified watch dog interface across all ESP chip families
+- Support for multiple watchdog stages with configurable timeout actions
+- Flexible reset signal configuration (length and type)
+- Interrupt management
+- Platform-specific optimizations
+- IRAM-safe implementation for critical sections
+- Chip-specific implementations contained in separate directories
+
+## Usage
+
+This component is primarily used by ESP-IDF system services such as **interrupt watchdog** and **task watchdog**.
+
+For advanced developers implementing custom watch dog solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
+
+## Dependencies
+
+- `soc`: Provides chip-specific register definitions
+- `hal`: Core hardware abstraction utilities and macros
+- `esp_hal_timg`: Timer group HAL for shared resources with the general purpose timer in the same group

components/esp_hal_wdt/esp32/include/hal/mwdt_ll.h

@@ -1,25 +1,17 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
 #include "hal/misc.h"
 #include "hal/assert.h"
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
 #include "hal/wdt_types.h"
+#include "hal/timg_ll.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
 
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS   6
 #define TIMG_WDT_RESET_LENGTH_3200_NS   7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -250,7 +246,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -303,7 +299,6 @@ static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
     (void)en;
 }
 
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hal_wdt/esp32/include/hal/rwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus
@@ -99,24 +96,24 @@ FORCE_INLINE_ATTR bool rwdt_ll_check_if_enabled(rtc_cntl_dev_t *hw)
 FORCE_INLINE_ATTR void rwdt_ll_config_stage(rtc_cntl_dev_t *hw, wdt_stage_t stage, uint32_t timeout_ticks, wdt_stage_action_t behavior)
 {
     switch (stage) {
-        case WDT_STAGE0:
-            hw->wdt_config0.stg0 = behavior;
-            hw->wdt_config1 = timeout_ticks;
-            break;
-        case WDT_STAGE1:
-            hw->wdt_config0.stg1 = behavior;
-            hw->wdt_config2 = timeout_ticks;
-            break;
-        case WDT_STAGE2:
-            hw->wdt_config0.stg2 = behavior;
-            hw->wdt_config3 = timeout_ticks;
-            break;
-        case WDT_STAGE3:
-            hw->wdt_config0.stg3 = behavior;
-            hw->wdt_config4 = timeout_ticks;
-            break;
-        default:
-            abort();
+    case WDT_STAGE0:
+        hw->wdt_config0.stg0 = behavior;
+        hw->wdt_config1 = timeout_ticks;
+        break;
+    case WDT_STAGE1:
+        hw->wdt_config0.stg1 = behavior;
+        hw->wdt_config2 = timeout_ticks;
+        break;
+    case WDT_STAGE2:
+        hw->wdt_config0.stg2 = behavior;
+        hw->wdt_config3 = timeout_ticks;
+        break;
+    case WDT_STAGE3:
+        hw->wdt_config0.stg3 = behavior;
+        hw->wdt_config4 = timeout_ticks;
+        break;
+    default:
+        abort();
     }
 }
 
@@ -129,20 +126,20 @@ FORCE_INLINE_ATTR void rwdt_ll_config_stage(rtc_cntl_dev_t *hw, wdt_stage_t stag
 FORCE_INLINE_ATTR void rwdt_ll_disable_stage(rtc_cntl_dev_t *hw, wdt_stage_t stage)
 {
     switch (stage) {
-        case WDT_STAGE0:
-            hw->wdt_config0.stg0 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE1:
-            hw->wdt_config0.stg1 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE2:
-            hw->wdt_config0.stg2 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE3:
-            hw->wdt_config0.stg3 = WDT_STAGE_ACTION_OFF;
-            break;
-        default:
-            abort();
+    case WDT_STAGE0:
+        hw->wdt_config0.stg0 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE1:
+        hw->wdt_config0.stg1 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE2:
+        hw->wdt_config0.stg2 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE3:
+        hw->wdt_config0.stg3 = WDT_STAGE_ACTION_OFF;
+        break;
+    default:
+        abort();
     }
 }
 

components/esp_hal_wdt/esp32/mwdt_periph.c

@@ -0,0 +1,5 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

components/esp_hal_wdt/esp32c2/include/hal/mwdt_ll.h

@@ -1,27 +1,19 @@
 /*
- * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "hal/wdt_types.h"
 #include "esp_attr.h"
+#include "hal/wdt_types.h"
 #include "hal/misc.h"
 #include "hal/check.h"
 #include "hal/assert.h"
+#include "hal/timg_ll.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS   6
 #define TIMG_WDT_RESET_LENGTH_3200_NS   7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 STATIC_HAL_REG_CHECK("mwdt", WDT_STAGE_ACTION_OFF, TIMG_WDT_STG_SEL_OFF);
 STATIC_HAL_REG_CHECK("mwdt", WDT_STAGE_ACTION_INT, TIMG_WDT_STG_SEL_INT);
@@ -242,7 +238,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**

components/esp_hal_wdt/esp32c2/include/hal/rwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus

components/esp_hal_wdt/esp32c2/mwdt_periph.c

@@ -0,0 +1,5 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

components/esp_hal_wdt/esp32c3/include/hal/mwdt_ll.h

@@ -1,27 +1,19 @@
 /*
- * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "hal/wdt_types.h"
-#include "hal/assert.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
 #include "hal/misc.h"
+#include "hal/wdt_types.h"
+#include "hal/assert.h"
+#include "hal/timg_ll.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS   6
 #define TIMG_WDT_RESET_LENGTH_3200_NS   7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -244,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**

components/esp_hal_wdt/esp32c3/include/hal/rwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus

components/esp_hal_wdt/esp32c3/include/hal/xt_wdt_ll.h

@@ -50,7 +50,6 @@ inline void xt_wdt_ll_set_timeout(rtc_cntl_dev_t *hw, uint8_t timeout)
     hw->xtal32k_conf.xtal32k_wdt_timeout = timeout;
 }
 
-
 /**
  * @brief Reset the XT_WDT
  *
@@ -62,7 +61,6 @@ inline void xt_wdt_ll_reset(rtc_cntl_dev_t *hw)
     hw->ext_xtl_conf.xtal32k_wdt_reset = 0;
 }
 
-
 /**
  * @brief Set the backup clock value
  *

components/esp_hal_wdt/esp32c3/mwdt_periph.c

@@ -0,0 +1,5 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

components/esp_hal_wdt/esp32c5/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus

components/esp_hal_wdt/esp32c5/include/hal/mwdt_ll.h

@@ -1,28 +1,20 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/wdt_types.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
+#include "hal/timg_ll.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
-#include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 24000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -244,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -315,8 +311,6 @@ static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
     }
 }
 
-
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hal_wdt/esp32c5/mwdt_periph.c

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 
 #define N_REGS_TGWDT          6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
 

components/esp_hal_wdt/esp32c6/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus

components/esp_hal_wdt/esp32c6/include/hal/mwdt_ll.h

@@ -1,28 +1,20 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "soc/pcr_struct.h"
-#include "hal/wdt_types.h"
-#include "hal/assert.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
+#include "hal/assert.h"
 #include "hal/misc.h"
+#include "hal/wdt_types.h"
+#include "hal/timg_ll.h"
+#include "soc/pcr_struct.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -244,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -315,8 +311,6 @@ static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
     }
 }
 
-
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hal_wdt/esp32c6/mwdt_periph.c

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 
 #define N_REGS_TGWDT          6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
 

components/esp_hal_wdt/esp32c61/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus

components/esp_hal_wdt/esp32c61/include/hal/mwdt_ll.h

@@ -1,28 +1,20 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "soc/pcr_struct.h"
-#include "hal/wdt_types.h"
-#include "hal/assert.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
+#include "hal/wdt_types.h"
+#include "hal/assert.h"
 #include "hal/misc.h"
+#include "hal/timg_ll.h"
+#include "soc/pcr_struct.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -244,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -315,8 +311,6 @@ static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
     }
 }
 
-
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hal_wdt/esp32c61/mwdt_periph.c

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 
 #define N_REGS_TGWDT          6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
 

components/esp_hal_wdt/esp32h2/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus
@@ -59,7 +56,6 @@ ESP_STATIC_ASSERT(WDT_RESET_SIG_LENGTH_800ns == LP_WDT_RESET_LENGTH_800_NS, "Add
 ESP_STATIC_ASSERT(WDT_RESET_SIG_LENGTH_1_6us == LP_WDT_RESET_LENGTH_1600_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
 ESP_STATIC_ASSERT(WDT_RESET_SIG_LENGTH_3_2us == LP_WDT_RESET_LENGTH_3200_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
 
-
 /**
  * @brief Enable the RWDT
  *

components/esp_hal_wdt/esp32h2/include/hal/mwdt_ll.h

@@ -1,27 +1,20 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "soc/pcr_struct.h"
-#include "hal/wdt_types.h"
-#include "hal/assert.h"
 #include "esp_attr.h"
+#include "esp_assert.h"
+#include "hal/wdt_types.h"
 #include "hal/misc.h"
+#include "hal/assert.h"
+#include "hal/timg_ll.h"
+#include "soc/pcr_struct.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
@@ -41,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -243,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -267,7 +264,6 @@ FORCE_INLINE_ATTR void mwdt_ll_set_intr_enable(timg_dev_t *hw, bool enable)
     hw->int_ena_timers.wdt_int_ena = (enable) ? 1 : 0;
 }
 
-
 /**
  * @brief Set the clock source for the MWDT.
  *
@@ -293,7 +289,6 @@ FORCE_INLINE_ATTR void mwdt_ll_set_clock_source(timg_dev_t *hw, mwdt_clock_sourc
         break;
     }
 
-
     if (hw == &TIMERG0) {
         PCR.timergroup0_wdt_clk_conf.tg0_wdt_clk_sel = clk_id;
     } else {

components/esp_hal_wdt/esp32h2/include/hal/rwdt_ll.h

@@ -3,9 +3,6 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 
 #pragma once
 

components/esp_hal_wdt/esp32h2/mwdt_periph.c

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 
 #define N_REGS_TGWDT          6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
 

components/esp_hal_wdt/esp32h21/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus
@@ -59,7 +56,6 @@ ESP_STATIC_ASSERT(WDT_RESET_SIG_LENGTH_800ns == LP_WDT_RESET_LENGTH_800_NS, "Add
 ESP_STATIC_ASSERT(WDT_RESET_SIG_LENGTH_1_6us == LP_WDT_RESET_LENGTH_1600_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
 ESP_STATIC_ASSERT(WDT_RESET_SIG_LENGTH_3_2us == LP_WDT_RESET_LENGTH_3200_NS, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_reset_sig_length_t");
 
-
 /**
  * @brief Enable the RWDT
  *

components/esp_hal_wdt/esp32h21/include/hal/mwdt_ll.h

@@ -4,24 +4,17 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "soc/pcr_struct.h"
+#include "esp_attr.h"
+#include "esp_assert.h"
 #include "hal/wdt_types.h"
 #include "hal/assert.h"
-#include "esp_attr.h"
 #include "hal/misc.h"
+#include "hal/timg_ll.h"
+#include "soc/pcr_struct.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
@@ -41,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -243,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -267,7 +264,6 @@ FORCE_INLINE_ATTR void mwdt_ll_set_intr_enable(timg_dev_t *hw, bool enable)
     hw->int_ena_timers.wdt_int_ena = (enable) ? 1 : 0;
 }
 
-
 /**
  * @brief Set the clock source for the MWDT.
  *

components/esp_hal_wdt/esp32h21/include/hal/rwdt_ll.h

@@ -3,8 +3,6 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
 
 #pragma once
 

components/esp_hal_wdt/esp32h21/mwdt_periph.c

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 
 #if SOC_PAU_SUPPORTED && SOC_MWDT_SUPPORT_SLEEP_RETENTION
 #define N_REGS_TGWDT          6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG

components/esp_hal_wdt/esp32h4/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 //TODO: [ESP32H4] IDF-12273 inherited from verification branch, need check

components/esp_hal_wdt/esp32h4/include/hal/mwdt_ll.h

@@ -4,31 +4,21 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/timer_group_struct.h"
-#include "soc/pcr_struct.h"
-#include "hal/wdt_types.h"
-#include "hal/assert.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
+#include "hal/wdt_types.h"
+#include "hal/assert.h"
 #include "hal/misc.h"
+#include "hal/timg_ll.h"
+#include "soc/pcr_struct.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
 
-/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
-#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
-
 /* Possible values for TIMG_WDT_STGx */
 #define TIMG_WDT_STG_SEL_OFF 0
 #define TIMG_WDT_STG_SEL_INT 1
@@ -44,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -246,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -317,8 +311,6 @@ static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
     }
 }
 
-
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hal_wdt/esp32h4/mwdt_periph.c

@@ -4,7 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 #include "soc/soc_caps.h"
 
 #if SOC_PAU_SUPPORTED && SOC_MWDT_SUPPORT_SLEEP_RETENTION

components/esp_hal_wdt/esp32p4/include/hal/lpwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus
@@ -39,14 +36,12 @@ extern "C" {
 #define LP_WDT_RESET_LENGTH_1600_NS   6
 #define LP_WDT_RESET_LENGTH_3200_NS   7
 
-
 #define LP_WDT_STG_SEL_OFF             0
 #define LP_WDT_STG_SEL_INT             1
 #define LP_WDT_STG_SEL_RESET_CPU       2
 #define LP_WDT_STG_SEL_RESET_SYSTEM    3
 #define LP_WDT_STG_SEL_RESET_RTC       4
 
-
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == LP_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == LP_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -119,25 +114,25 @@ FORCE_INLINE_ATTR void
 lpwdt_ll_config_stage(lp_wdt_dev_t *hw, wdt_stage_t stage, uint32_t timeout_ticks, wdt_stage_action_t behavior)
 {
     switch (stage) {
-        case WDT_STAGE0:
-            hw->config0.wdt_stg0 = behavior;
-            //Account of implicty multiplier applied to stage 0 timeout tick config value
-            hw->config1.wdt_stg0_hold = timeout_ticks >> (1 + REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_WDT_DELAY_SEL));
-            break;
-        case WDT_STAGE1:
-            hw->config0.wdt_stg1 = behavior;
-            hw->config2.wdt_stg1_hold = timeout_ticks;
-            break;
-        case WDT_STAGE2:
-            hw->config0.wdt_stg2 = behavior;
-            hw->config3.wdt_stg2_hold = timeout_ticks;
-            break;
-        case WDT_STAGE3:
-            hw->config0.wdt_stg3 = behavior;
-            hw->config4.wdt_stg3_hold = timeout_ticks;
-            break;
-        default:
-            break;
+    case WDT_STAGE0:
+        hw->config0.wdt_stg0 = behavior;
+        //Account of implicty multiplier applied to stage 0 timeout tick config value
+        hw->config1.wdt_stg0_hold = timeout_ticks >> (1 + REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_WDT_DELAY_SEL));
+        break;
+    case WDT_STAGE1:
+        hw->config0.wdt_stg1 = behavior;
+        hw->config2.wdt_stg1_hold = timeout_ticks;
+        break;
+    case WDT_STAGE2:
+        hw->config0.wdt_stg2 = behavior;
+        hw->config3.wdt_stg2_hold = timeout_ticks;
+        break;
+    case WDT_STAGE3:
+        hw->config0.wdt_stg3 = behavior;
+        hw->config4.wdt_stg3_hold = timeout_ticks;
+        break;
+    default:
+        break;
     }
 }
 
@@ -150,20 +145,20 @@ lpwdt_ll_config_stage(lp_wdt_dev_t *hw, wdt_stage_t stage, uint32_t timeout_tick
 FORCE_INLINE_ATTR void lpwdt_ll_disable_stage(lp_wdt_dev_t *hw, wdt_stage_t stage)
 {
     switch (stage) {
-        case WDT_STAGE0:
-            hw->config0.wdt_stg0 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE1:
-            hw->config0.wdt_stg1 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE2:
-            hw->config0.wdt_stg2 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE3:
-            hw->config0.wdt_stg3 = WDT_STAGE_ACTION_OFF;
-            break;
-        default:
-            abort();
+    case WDT_STAGE0:
+        hw->config0.wdt_stg0 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE1:
+        hw->config0.wdt_stg1 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE2:
+        hw->config0.wdt_stg2 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE3:
+        hw->config0.wdt_stg3 = WDT_STAGE_ACTION_OFF;
+        break;
+    default:
+        abort();
     }
 }
 
@@ -215,7 +210,6 @@ FORCE_INLINE_ATTR void lpwdt_ll_set_procpu_reset_en(lp_wdt_dev_t *hw, bool enabl
     hw->config0.wdt_procpu_reset_en = (enable) ? 1 : 0;
 }
 
-
 /**
  * @brief Enable/Disable the CPU1 to be reset on WDT_STAGE_ACTION_RESET_CPU
  *

components/esp_hal_wdt/esp32p4/include/hal/mwdt_ll.h

@@ -1,28 +1,20 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
-#include "soc/hp_sys_clkrst_struct.h"
-#include "hal/wdt_types.h"
-#include "hal/assert.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
+#include "hal/wdt_types.h"
+#include "hal/assert.h"
 #include "hal/misc.h"
+#include "hal/timg_ll.h"
+#include "soc/hp_sys_clkrst_struct.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS 6
 #define TIMG_WDT_RESET_LENGTH_3200_NS 7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 // //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -244,7 +240,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**
@@ -268,7 +264,6 @@ FORCE_INLINE_ATTR void mwdt_ll_set_intr_enable(timg_dev_t *hw, bool enable)
     hw->int_ena_timers.wdt_int_ena = (enable) ? 1 : 0;
 }
 
-
 /**
  * @brief Set the clock source for the MWDT.
  *
@@ -284,10 +279,9 @@ FORCE_INLINE_ATTR void mwdt_ll_set_clock_source(timg_dev_t *hw, mwdt_clock_sourc
     (void)hw;
     (void)clk_src;
 
-     HAL_ASSERT(clk_src == MWDT_CLK_SRC_XTAL);
+    HAL_ASSERT(clk_src == MWDT_CLK_SRC_XTAL);
 }
 
-
 /**
  * @brief Enable MWDT module clock
  *
@@ -305,7 +299,6 @@ static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
     (void)en;
 }
 
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hal_wdt/esp32p4/mwdt_periph.c

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc/wdt_periph.h"
+#include "hal/mwdt_periph.h"
+#include "hal/mwdt_ll.h"
 
 #define N_REGS_TGWDT          6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
 

components/esp_hal_wdt/esp32s2/include/hal/mwdt_ll.h

@@ -1,27 +1,19 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
 #include "esp_assert.h"
-#include "soc/wdt_periph.h"
-#include "soc/timer_group_struct.h"
+#include "esp_attr.h"
 #include "hal/wdt_types.h"
 #include "hal/assert.h"
-#include "esp_attr.h"
 #include "hal/misc.h"
+#include "hal/timg_ll.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
@@ -42,6 +34,10 @@ extern "C" {
 #define TIMG_WDT_RESET_LENGTH_1600_NS   6
 #define TIMG_WDT_RESET_LENGTH_3200_NS   7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
@@ -254,7 +250,7 @@ FORCE_INLINE_ATTR void mwdt_ll_write_protect_enable(timg_dev_t *hw)
  */
 FORCE_INLINE_ATTR void mwdt_ll_write_protect_disable(timg_dev_t *hw)
 {
-    hw->wdtwprotect.wdt_wkey = TIMG_WDT_WKEY_VALUE;
+    hw->wdtwprotect.wdt_wkey = 0x50D83AA1;
 }
 
 /**

components/esp_hal_wdt/esp32s2/include/hal/rwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus
@@ -111,25 +108,25 @@ FORCE_INLINE_ATTR bool rwdt_ll_check_if_enabled(rtc_cntl_dev_t *hw)
 FORCE_INLINE_ATTR void rwdt_ll_config_stage(rtc_cntl_dev_t *hw, wdt_stage_t stage, uint32_t timeout_ticks, wdt_stage_action_t behavior)
 {
     switch (stage) {
-        case WDT_STAGE0:
-            hw->wdt_config0.stg0 = behavior;
-            //Account of implicty multiplier applied to stage 0 timeout tick config value
-            hw->wdt_config1 = timeout_ticks >> (1 + efuse_ll_get_wdt_delay_sel());
-            break;
-        case WDT_STAGE1:
-            hw->wdt_config0.stg1 = behavior;
-            hw->wdt_config2 = timeout_ticks;
-            break;
-        case WDT_STAGE2:
-            hw->wdt_config0.stg2 = behavior;
-            hw->wdt_config3 = timeout_ticks;
-            break;
-        case WDT_STAGE3:
-            hw->wdt_config0.stg3 = behavior;
-            hw->wdt_config4 = timeout_ticks;
-            break;
-        default:
-            abort();
+    case WDT_STAGE0:
+        hw->wdt_config0.stg0 = behavior;
+        //Account of implicty multiplier applied to stage 0 timeout tick config value
+        hw->wdt_config1 = timeout_ticks >> (1 + efuse_ll_get_wdt_delay_sel());
+        break;
+    case WDT_STAGE1:
+        hw->wdt_config0.stg1 = behavior;
+        hw->wdt_config2 = timeout_ticks;
+        break;
+    case WDT_STAGE2:
+        hw->wdt_config0.stg2 = behavior;
+        hw->wdt_config3 = timeout_ticks;
+        break;
+    case WDT_STAGE3:
+        hw->wdt_config0.stg3 = behavior;
+        hw->wdt_config4 = timeout_ticks;
+        break;
+    default:
+        abort();
     }
 }
 
@@ -142,20 +139,20 @@ FORCE_INLINE_ATTR void rwdt_ll_config_stage(rtc_cntl_dev_t *hw, wdt_stage_t stag
 FORCE_INLINE_ATTR void rwdt_ll_disable_stage(rtc_cntl_dev_t *hw, wdt_stage_t stage)
 {
     switch (stage) {
-        case WDT_STAGE0:
-            hw->wdt_config0.stg0 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE1:
-            hw->wdt_config0.stg1 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE2:
-            hw->wdt_config0.stg2 = WDT_STAGE_ACTION_OFF;
-            break;
-        case WDT_STAGE3:
-            hw->wdt_config0.stg3 = WDT_STAGE_ACTION_OFF;
-            break;
-        default:
-            abort();
+    case WDT_STAGE0:
+        hw->wdt_config0.stg0 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE1:
+        hw->wdt_config0.stg1 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE2:
+        hw->wdt_config0.stg2 = WDT_STAGE_ACTION_OFF;
+        break;
+    case WDT_STAGE3:
+        hw->wdt_config0.stg3 = WDT_STAGE_ACTION_OFF;
+        break;
+    default:
+        abort();
     }
 }
 

components/esp_hal_wdt/esp32s2/include/hal/xt_wdt_ll.h

@@ -50,7 +50,6 @@ inline void xt_wdt_ll_set_timeout(rtc_cntl_dev_t *hw, uint8_t timeout)
     hw->xtal32k_conf.xtal32k_wdt_timeout = timeout;
 }
 
-
 /**
  * @brief Reset the XT_WDT
  *
@@ -62,7 +61,6 @@ inline void xt_wdt_ll_reset(rtc_cntl_dev_t *hw)
     hw->ext_xtl_conf.xtal32k_wdt_reset = 0;
 }
 
-
 /**
  * @brief Set the backup clock value
  *

components/esp_hal_wdt/esp32s2/mwdt_periph.c

@@ -0,0 +1,5 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

components/esp_hal_wdt/esp32s3/include/hal/mwdt_ll.h

@@ -1,27 +1,20 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdint.h>
 #include <stdbool.h>
-#include "hal/misc.h"
-#include "soc/wdt_periph.h"
+#include "esp_attr.h"
+#include "esp_assert.h"
 #include "soc/timer_group_struct.h"
 #include "hal/wdt_types.h"
 #include "hal/assert.h"
-#include "esp_attr.h"
-#include "esp_assert.h"
+#include "hal/misc.h"
+#include "hal/timg_ll.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
 #define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
@@ -45,6 +38,10 @@ extern "C" {
 #define MWDT_LL_RESET_LENGTH_1600_NS   6
 #define MWDT_LL_RESET_LENGTH_3200_NS   7
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == MWDT_LL_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == MWDT_LL_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");

components/esp_hal_wdt/esp32s3/include/hal/rwdt_ll.h

@@ -4,9 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-// The LL layer for Timer Group register operations.
-// Note that most of the register operations in this layer are non-atomic operations.
-
 #pragma once
 
 #ifdef __cplusplus
@@ -26,7 +23,6 @@ extern "C" {
 /* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
 #define RWDT_LL_WDT_WKEY_VALUE 0x50D83AA1
 
-
 /* stage action selection values */
 #define RWDT_LL_STG_SEL_OFF             0
 #define RWDT_LL_STG_SEL_INT             1

components/esp_hal_wdt/esp32s3/include/hal/xt_wdt_ll.h

@@ -50,7 +50,6 @@ inline void xt_wdt_ll_set_timeout(rtc_cntl_dev_t *hw, uint8_t timeout)
     hw->xtal32k_conf.xtal32k_wdt_timeout = timeout;
 }
 
-
 /**
  * @brief Reset the XT_WDT
  *
@@ -62,7 +61,6 @@ inline void xt_wdt_ll_reset(rtc_cntl_dev_t *hw)
     hw->ext_xtl_conf.xtal32k_wdt_reset = 0;
 }
 
-
 /**
  * @brief Set the backup clock value
  *

components/esp_hal_wdt/esp32s3/mwdt_periph.c

@@ -0,0 +1,5 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

components/esp_hal_wdt/include/hal/mwdt_periph.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,24 +9,25 @@
 #include <stdint.h>
 #include "soc/timer_group_reg.h"
 #include "soc/timer_group_struct.h"
-#include "soc/soc_caps_full.h"
+#include "soc/soc_caps.h"
 #include "soc/periph_defs.h"
 #include "soc/regdma.h"
+#include "hal/mwdt_ll.h"
+
+/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
+#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
-#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
-
 #if SOC_MWDT_SUPPORT_SLEEP_RETENTION && SOC_PAU_SUPPORTED
 typedef struct {
     const regdma_entries_config_t *link_list;
     uint32_t link_num;
 } tg_reg_ctx_link_t;
 
-extern const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_MODULE_ATTR(TIMG, INST_NUM)];
+extern const tg_reg_ctx_link_t tg_wdt_regs_retention[TIMG_LL_INST_NUM];
 #endif // SOC_MWDT_SUPPORT_SLEEP_RETENTION
 
 #ifdef __cplusplus

components/esp_hal_wdt/include/hal/wdt_hal.h

@@ -1,27 +1,21 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-/*******************************************************************************
- * NOTICE
- * The hal is not public api, don't use in application code.
- * See readme.md in hal/include/hal/readme.md
- ******************************************************************************/
-
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #include <stdbool.h>
 #include "soc/soc_caps.h"
 #include "hal/wdt_types.h"
 #include "hal/mwdt_ll.h"
 #include "hal/rwdt_ll.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * Context that should be maintained by both the driver and the HAL
  */

components/esp_hal_wdt/include/hal/wdt_types.h

@@ -59,7 +59,6 @@ typedef enum {
     WDT_RESET_SIG_LENGTH_3_2us = 7     /*!< 3.2 us */
 } wdt_reset_sig_length_t;
 
-
 typedef soc_periph_mwdt_clk_src_t mwdt_clock_source_t;
 
 #ifdef __cplusplus

components/esp_hal_wdt/include/hal/xt_wdt_hal.h

@@ -18,14 +18,12 @@
 extern "C" {
 #endif
 
-
 #if SOC_XT_WDT_SUPPORTED
 
 typedef struct {
     rtc_cntl_dev_t *dev;    /* Pointer to the RTC register struct */
 } xt_wdt_hal_context_t;     /* HAL context struct */
 
-
 typedef struct {
     uint32_t timeout;       /* Watchdog timer timeout in RTC_CLK cycles */
 } xt_wdt_hal_config_t;      /* HAL config parameter struct */
@@ -42,7 +40,6 @@ typedef struct {
  */
 void xt_wdt_hal_init(xt_wdt_hal_context_t *hal, const xt_wdt_hal_config_t *config);
 
-
 /**
  * @brief Enable or disable the WDT
  *

components/esp_hal_wdt/linker.lf

@@ -0,0 +1,7 @@
+[mapping:esp_hal_wdt]
+archive: libesp_hal_wdt.a
+entries:
+    if HAL_WDT_USE_ROM_IMPL = y:
+        rom_patch (noflash)
+    else:
+        wdt_hal_iram (noflash)

components/esp_hal_wdt/rom_patch.c

@@ -1,20 +1,17 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "sdkconfig.h"
 #include <stddef.h>
-
+#include "soc/soc_caps.h"
 #include "esp_rom_caps.h"
 
 #include "hal/wdt_types.h"
 #include "hal/wdt_hal.h"
 #include "hal/mwdt_ll.h"
 
-#if CONFIG_HAL_WDT_USE_ROM_IMPL
-
 #if ESP_ROM_WDT_INIT_PATCH
 void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
 {
@@ -42,7 +39,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
         rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE1);
         rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE2);
         rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE3);
-#ifdef CONFIG_IDF_TARGET_ESP32
+#if SOC_IS(ESP32)
         //Enable or disable level interrupt. Edge interrupt is always disabled.
         rwdt_ll_set_edge_intr(hal->rwdt_dev, false);
         rwdt_ll_set_level_intr(hal->rwdt_dev, enable_intr);
@@ -72,7 +69,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
         mwdt_ll_disable_stage(hal->mwdt_dev, 1);
         mwdt_ll_disable_stage(hal->mwdt_dev, 2);
         mwdt_ll_disable_stage(hal->mwdt_dev, 3);
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if SOC_IS(ESP32) || SOC_IS(ESP32S2) || SOC_IS(ESP32S3)
         //Enable or disable level interrupt. Edge interrupt is always disabled.
         mwdt_ll_set_edge_intr(hal->mwdt_dev, false);
         mwdt_ll_set_level_intr(hal->mwdt_dev, enable_intr);
@@ -119,5 +116,3 @@ void wdt_hal_deinit(wdt_hal_context_t *hal)
     hal->mwdt_dev = NULL;
 }
 #endif // ESP_ROM_WDT_INIT_PATCH
-
-#endif // CONFIG_HAL_WDT_USE_ROM_IMPL

components/esp_hal_wdt/wdt_hal_iram.c

@@ -19,7 +19,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale
     if (wdt_inst == WDT_MWDT0) {
         hal->mwdt_dev = &TIMERG0;
     }
-#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+#if TIMG_LL_INST_NUM >= 2
     else if (wdt_inst == WDT_MWDT1) {
         hal->mwdt_dev = &TIMERG1;
     }

components/esp_hal_wdt/xt_wdt_hal.c

@@ -47,7 +47,7 @@ static uint32_t xt_wdt_hal_calculate(uint32_t rtc_clk_frequency_khz)
             off--;
         }
         /* Sum up all divisors */
-        xtal32k_clk_factor |=  (divisor_comps[i] << 4 * i);
+        xtal32k_clk_factor |= (divisor_comps[i] << 4 * i);
     }
 
     return xtal32k_clk_factor;

components/esp_rom/CMakeLists.txt

@@ -55,10 +55,6 @@ if(CONFIG_SOC_SYSTIMER_SUPPORTED)
     list(APPEND sources "patches/esp_rom_systimer.c")
 endif()
 
-if(CONFIG_HAL_WDT_USE_ROM_IMPL)
-    list(APPEND sources "patches/esp_rom_wdt.c")
-endif()
-
 if(CONFIG_ESP_ROM_CLIC_INT_TYPE_PATCH)
     list(APPEND sources "patches/esp_rom_clic.c")
 endif()

components/esp_rom/linker.lf

@@ -11,5 +11,3 @@ entries:
         esp_rom_cache_writeback_esp32s3 (noflash)
     if SOC_SYSTIMER_SUPPORTED = y:
         esp_rom_systimer (noflash)
-    if HAL_WDT_USE_ROM_IMPL = y:
-        esp_rom_wdt (noflash)

components/esp_rom/test_apps/rom_impl_components/main/CMakeLists.txt

@@ -3,5 +3,5 @@ set(srcs "test_app_main.c")
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(SRCS ${srcs}
-                       PRIV_REQUIRES unity
+                       PRIV_REQUIRES unity esp_hal_wdt
                        WHOLE_ARCHIVE)

components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt

@@ -2,6 +2,7 @@ set(requires "unity"
              "test_utils"
              "esp_driver_uart"
              "esp_driver_gpio"
+             "esp_hal_wdt"
              "esp_timer"
              "nvs_flash"
              "esp_psram")

components/esp_tee/CMakeLists.txt

@@ -76,7 +76,7 @@ else()
 
     idf_component_register(INCLUDE_DIRS include
                            SRCS ${srcs}
-                           PRIV_REQUIRES efuse esp_security esp_system spi_flash esptool_py)
+                           PRIV_REQUIRES efuse esp_security esp_system spi_flash esptool_py esp_hal_wdt)
 
     if(CONFIG_SECURE_ENABLE_TEE)
         set(EXTRA_LINK_FLAGS)

components/hal/CMakeLists.txt

@@ -22,10 +22,6 @@ if(CONFIG_SOC_LP_TIMER_SUPPORTED)
     list(APPEND srcs "lp_timer_hal.c")
 endif()
 
-if(CONFIG_SOC_WDT_SUPPORTED AND NOT CONFIG_HAL_WDT_USE_ROM_IMPL)
-    list(APPEND srcs "wdt_hal_iram.c")
-endif()
-
 if(CONFIG_SOC_KEY_MANAGER_SUPPORTED)
     list(APPEND srcs "key_mgr_hal.c")
     list(APPEND srcs "huk_hal.c")
@@ -52,7 +48,6 @@ endif()
 if(esp_tee_build)
     list(APPEND srcs "apm_hal.c"
                      "brownout_hal.c"
-                     "wdt_hal_iram.c"
                      "aes_hal.c"
                      "sha_hal.c"
                      "hmac_hal.c"
@@ -306,21 +301,9 @@ elseif(NOT BOOTLOADER_BUILD)
 
     if(${target} STREQUAL "esp32s2")
         list(APPEND srcs
-                    "xt_wdt_hal.c"
                     "esp32s2/cp_dma_hal.c")
     endif()
 
-    if(${target} STREQUAL "esp32s3")
-        list(APPEND srcs
-            "xt_wdt_hal.c")
-    endif()
-
-    if(${target} STREQUAL "esp32c3")
-        list(APPEND srcs
-            "xt_wdt_hal.c")
-    endif()
-
-
     if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/rtc_cntl_hal.c")
         list(APPEND srcs "${target}/rtc_cntl_hal.c")
     endif()

components/hal/linker.lf

@@ -7,8 +7,6 @@ entries:
             cache_hal_esp32 (noflash)
         else:
             cache_hal (noflash)
-    if HAL_WDT_USE_ROM_IMPL = n:
-        wdt_hal_iram (noflash)
     if SOC_SYSTIMER_SUPPORTED = y && HAL_SYSTIMER_USE_ROM_IMPL = n:
         systimer_hal (noflash)
     if SOC_PMU_SUPPORTED = y:

components/soc/CMakeLists.txt

@@ -168,10 +168,6 @@ if(CONFIG_SOC_TWAI_SUPPORTED)
     list(APPEND srcs "${target_folder}/twai_periph.c")
 endif()
 
-if(CONFIG_SOC_WDT_SUPPORTED)
-    list(APPEND srcs "${target_folder}/wdt_periph.c")
-endif()
-
 if(CONFIG_SOC_IEEE802154_SUPPORTED)
     if(NOT target STREQUAL "esp32h4")
         list(APPEND srcs "${target_folder}/ieee802154_periph.c")

components/soc/esp32/wdt_periph.c

@@ -1,7 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include "soc/wdt_periph.h"

components/soc/esp32c2/wdt_periph.c

@@ -1,7 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include "soc/wdt_periph.h"

components/soc/esp32c3/wdt_periph.c

@@ -1,7 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include "soc/wdt_periph.h"

components/soc/esp32s2/wdt_periph.c

@@ -1,7 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include "soc/wdt_periph.h"

components/soc/esp32s3/wdt_periph.c

@@ -1,7 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include "soc/wdt_periph.h"