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remove(pcnt): remove unused retention reg

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This commit is contained in:
Chen Jichang
2025-07-29 17:38:19 +08:00
parent 6fbc17c945
commit 587583cc5f
25 changed files with 18 additions and 239 deletions
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41
components/esp_driver_pcnt/src/pulse_cnt.c
View File

@@ -62,12 +62,9 @@ typedef struct pcnt_group_t pcnt_group_t;
typedef struct pcnt_unit_t pcnt_unit_t;
typedef struct pcnt_chan_t pcnt_chan_t;
// Use retention link only when the target supports sleep retention
#define PCNT_USE_RETENTION_LINK (SOC_PCNT_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)
#if PCNT_USE_RETENTION_LINK
static esp_err_t pcnt_create_sleep_retention_link_cb(void *arg);
#endif
// The count register is read only and can't be restored after power down
// Use retention link to prevent power down
#define PCNT_USE_RETENTION_LINK CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
struct pcnt_platform_t {
_lock_t mutex; // platform level mutex lock
@@ -915,18 +912,7 @@ static pcnt_group_t *pcnt_acquire_group_handle(int group_id)
pcnt_ll_reset_register(group_id);
}
#if PCNT_USE_RETENTION_LINK
sleep_retention_module_t module_id = pcnt_reg_retention_info[group_id].retention_module;
sleep_retention_module_init_param_t init_param = {
.cbs = {
.create = {
.handle = pcnt_create_sleep_retention_link_cb,
.arg = group,
},
},
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
// we only do retention init here. Allocate retention module in the unit initialization
if (sleep_retention_module_init(module_id, &init_param) != ESP_OK) {
if (sleep_retention_power_lock_acquire() != ESP_OK) {
// even though the sleep retention module init failed, PCNT driver should still work, so just warning here
ESP_LOGW(TAG, "init sleep retention failed %d, power domain may be turned off during sleep", group_id);
}
@@ -973,10 +959,7 @@ static void pcnt_release_group_handle(pcnt_group_t *group)
pcnt_ll_enable_bus_clock(group_id, false);
}
#if PCNT_USE_RETENTION_LINK
const periph_retention_module_t module_id = pcnt_reg_retention_info[group_id].retention_module;
if (sleep_retention_is_module_inited(module_id)) {
sleep_retention_module_deinit(module_id);
}
sleep_retention_power_lock_release();
#endif // PCNT_USE_RETENTION_LINK
}
_lock_release(&s_platform.mutex);
@@ -1101,20 +1084,6 @@ IRAM_ATTR static void pcnt_default_isr(void *args)
}
}
#if PCNT_USE_RETENTION_LINK
static esp_err_t pcnt_create_sleep_retention_link_cb(void *arg)
{
pcnt_group_t *group = (pcnt_group_t *)arg;
int group_id = group->group_id;
sleep_retention_module_t module_id = pcnt_reg_retention_info[group_id].retention_module;
esp_err_t err = sleep_retention_entries_create(pcnt_reg_retention_info[group_id].regdma_entry_array,
pcnt_reg_retention_info[group_id].array_size,
REGDMA_LINK_PRI_PCNT, module_id);
ESP_RETURN_ON_ERROR(err, TAG, "create retention link failed");
return ESP_OK;
}
#endif // PCNT_USE_RETENTION_LINK
#if CONFIG_PCNT_ENABLE_DEBUG_LOG
__attribute__((constructor))
static void pcnt_override_default_log_level(void)

4
components/esp_driver_pcnt/test_apps/pulse_cnt/main/test_pulse_cnt_sleep.c
View File

@@ -98,10 +98,12 @@ static void test_pcnt_sleep_retention(void)
printf("check if the sleep happened as expected\r\n");
TEST_ASSERT_EQUAL(0, sleep_ctx.sleep_request_result);
#if SOC_PCNT_SUPPORT_SLEEP_RETENTION
#if SOC_PMU_SUPPORTED && !SOC_PM_TOP_PD_NOT_ALLOWED
// check if the power domain also is powered down
TEST_ASSERT_EQUAL(0, (sleep_ctx.sleep_flags) & PMU_SLEEP_PD_TOP);
#endif
esp_sleep_set_sleep_context(NULL);
gpio_hold_dis(TEST_PCNT_GPIO_A);

4
components/esp_hw_support/sleep_system_peripheral.c
View File

@@ -287,10 +287,6 @@ bool peripheral_domain_pd_allowed(void)
mask.bitmap[SLEEP_RETENTION_MODULE_LEDC >> 5] |= BIT(SLEEP_RETENTION_MODULE_LEDC % 32);
#endif
#if SOC_PCNT_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_PCNT0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_PCNT0 % 32);
#endif
#if SOC_MCPWM_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_MCPWM0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_MCPWM0 % 32);
#endif

4
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
View File

@@ -871,10 +871,6 @@ config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_PCNT_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_RMT_GROUPS
int
default 1

4
components/soc/esp32c5/include/soc/retention_periph_defs.h
View File

@@ -43,8 +43,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_PARLIO0 = 19,
SLEEP_RETENTION_MODULE_GPSPI2 = 20,
SLEEP_RETENTION_MODULE_LEDC = 21,
SLEEP_RETENTION_MODULE_PCNT0 = 22,
SLEEP_RETENTION_MODULE_MCPWM0 = 23,
SLEEP_RETENTION_MODULE_MCPWM0 = 22,
/* modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_WIFI_MAC = 26,
@@ -80,7 +79,6 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)

1
components/soc/esp32c5/include/soc/soc_caps.h
View File

@@ -348,7 +348,6 @@
#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
#define SOC_PCNT_SUPPORT_CLEAR_SIGNAL 1
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1
#define SOC_PCNT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up PCNT registers before sleep */
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */

32
components/soc/esp32c5/pcnt_periph.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -70,33 +70,3 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
}
}
};
/**
* PCNT Registers to be saved during sleep retention
* - Configuration registers, e.g.: PCNT_CTRL_REG, PCNT_U0_CONF0_REG, PCNT_U0_CONF1_REG, PCNT_U0_CONF2_REG, PCNT_U1_CONF0_REG...
* - Step Configuration registers, e.g.: PCNT_U0_CHANGE_CONF_REG, PCNT_U1_CHANGE_CONF_REG, PCNT_U2_CHANGE_CONF_REG, PCNT_U3_CHANGE_CONF_REG
* - Interrupt enable registers, e.g.: PCNT_INT_ENA_REG
*/
#define PCNT_RETENTION_REGS_CNT 18
#define PCNT_RETENTION_REGS_BASE (DR_REG_PCNT_BASE + 0x0)
static const uint32_t pcnt_regs_map[4] = {0x1f040fff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t pcnt_regs_retention[] = {
// backup stage: save configuration registers
// restore stage: restore the configuration registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_PCNT_LINK(0x00), \
PCNT_RETENTION_REGS_BASE, PCNT_RETENTION_REGS_BASE, \
PCNT_RETENTION_REGS_CNT, 0, 0, \
pcnt_regs_map[0], pcnt_regs_map[1], \
pcnt_regs_map[2], pcnt_regs_map[3]), \
.owner = ENTRY(0) | ENTRY(2)
}, \
};
const pcnt_reg_retention_info_t pcnt_reg_retention_info[SOC_PCNT_GROUPS] = {
[0] = {
.regdma_entry_array = pcnt_regs_retention,
.array_size = ARRAY_SIZE(pcnt_regs_retention),
.retention_module = SLEEP_RETENTION_MODULE_PCNT0
},
};

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@@ -803,10 +803,6 @@ config SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE
bool
default y
config SOC_PCNT_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_RMT_GROUPS
int
default 1

4
components/soc/esp32c6/include/soc/retention_periph_defs.h
View File

@@ -45,8 +45,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_PARLIO0 = 21,
SLEEP_RETENTION_MODULE_GPSPI2 = 22,
SLEEP_RETENTION_MODULE_LEDC = 23,
SLEEP_RETENTION_MODULE_PCNT0 = 24,
SLEEP_RETENTION_MODULE_MCPWM0 = 25,
SLEEP_RETENTION_MODULE_MCPWM0 = 24,
/* Modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_WIFI_MAC = 26,
@@ -82,7 +81,6 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)

1
components/soc/esp32c6/include/soc/soc_caps.h
View File

@@ -320,7 +320,6 @@
#define SOC_PCNT_CHANNELS_PER_UNIT 2
#define SOC_PCNT_THRES_POINT_PER_UNIT 2
#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
#define SOC_PCNT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up PCNT registers before sleep */
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */

31
components/soc/esp32c6/pcnt_periph.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -66,32 +66,3 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
}
}
};
/**
* PCNT Registers to be saved during sleep retention
* - Configuration registers, e.g.: PCNT_CTRL_REG, PCNT_U0_CONF0_REG, PCNT_U0_CONF1_REG, PCNT_U0_CONF2_REG, PCNT_U1_CONF0_REG...
* - Interrupt enable registers, e.g.: PCNT_INT_ENA_REG
*/
#define PCNT_RETENTION_REGS_CNT 14
#define PCNT_RETENTION_REGS_BASE (DR_REG_PCNT_BASE + 0x0)
static const uint32_t pcnt_regs_map[4] = {0x1040fff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t pcnt_regs_retention[] = {
// backup stage: save configuration registers
// restore stage: restore the configuration registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_PCNT_LINK(0x00), \
PCNT_RETENTION_REGS_BASE, PCNT_RETENTION_REGS_BASE, \
PCNT_RETENTION_REGS_CNT, 0, 0, \
pcnt_regs_map[0], pcnt_regs_map[1], \
pcnt_regs_map[2], pcnt_regs_map[3]), \
.owner = ENTRY(0) | ENTRY(2)
}, \
};
const pcnt_reg_retention_info_t pcnt_reg_retention_info[SOC_PCNT_GROUPS] = {
[0] = {
.regdma_entry_array = pcnt_regs_retention,
.array_size = ARRAY_SIZE(pcnt_regs_retention),
.retention_module = SLEEP_RETENTION_MODULE_PCNT0
},
};

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
View File

@@ -799,10 +799,6 @@ config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_PCNT_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_RMT_GROUPS
int
default 1

4
components/soc/esp32h2/include/soc/retention_periph_defs.h
View File

@@ -45,8 +45,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_PARLIO0 = 21,
SLEEP_RETENTION_MODULE_GPSPI2 = 22,
SLEEP_RETENTION_MODULE_LEDC = 23,
SLEEP_RETENTION_MODULE_PCNT0 = 24,
SLEEP_RETENTION_MODULE_MCPWM0 = 25,
SLEEP_RETENTION_MODULE_MCPWM0 = 24,
/* Modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
@@ -80,7 +79,6 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)

1
components/soc/esp32h2/include/soc/soc_caps.h
View File

@@ -334,7 +334,6 @@
#define SOC_PCNT_THRES_POINT_PER_UNIT 2
#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1 /*!< Only avliable in chip version above 1.2*/
#define SOC_PCNT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up PCNT registers before sleep */
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */

31
components/soc/esp32h2/pcnt_periph.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -66,32 +66,3 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
}
}
};
/**
* PCNT Registers to be saved during sleep retention
* - Configuration registers, e.g.: PCNT_CTRL_REG, PCNT_U0_CONF0_REG, PCNT_U0_CONF1_REG, PCNT_U0_CONF2_REG, PCNT_U1_CONF0_REG...
* - Interrupt enable registers, e.g.: PCNT_INT_ENA_REG
*/
#define PCNT_RETENTION_REGS_CNT 14
#define PCNT_RETENTION_REGS_BASE (DR_REG_PCNT_BASE + 0x0)
static const uint32_t pcnt_regs_map[4] = {0x1040fff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t pcnt_regs_retention[] = {
// backup stage: save configuration registers
// restore stage: restore the configuration registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_PCNT_LINK(0x00), \
PCNT_RETENTION_REGS_BASE, PCNT_RETENTION_REGS_BASE, \
PCNT_RETENTION_REGS_CNT, 0, 0, \
pcnt_regs_map[0], pcnt_regs_map[1], \
pcnt_regs_map[2], pcnt_regs_map[3]), \
.owner = ENTRY(0) | ENTRY(2)
}, \
};
const pcnt_reg_retention_info_t pcnt_reg_retention_info[SOC_PCNT_GROUPS] = {
[0] = {
.regdma_entry_array = pcnt_regs_retention,
.array_size = ARRAY_SIZE(pcnt_regs_retention),
.retention_module = SLEEP_RETENTION_MODULE_PCNT0
},
};

4
components/soc/esp32h21/include/soc/retention_periph_defs.h
View File

@@ -45,8 +45,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_PARLIO0 = 21,
SLEEP_RETENTION_MODULE_GPSPI2 = 22,
SLEEP_RETENTION_MODULE_LEDC = 23,
SLEEP_RETENTION_MODULE_PCNT0 = 24,
SLEEP_RETENTION_MODULE_MCPWM0 = 25,
SLEEP_RETENTION_MODULE_MCPWM0 = 24,
/* Modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
@@ -80,7 +79,6 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)

4
components/soc/esp32h4/include/soc/retention_periph_defs.h
View File

@@ -48,8 +48,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_GPSPI2 = 24,
SLEEP_RETENTION_MODULE_GPSPI3 = 25,
SLEEP_RETENTION_MODULE_LEDC = 26,
SLEEP_RETENTION_MODULE_PCNT0 = 27,
SLEEP_RETENTION_MODULE_MCPWM0 = 28,
SLEEP_RETENTION_MODULE_MCPWM0 = 27,
/* Modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BLE_MAC = 29,
@@ -86,7 +85,6 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)

4
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
View File

@@ -1175,10 +1175,6 @@ config SOC_PCNT_SUPPORT_CLEAR_SIGNAL
bool
default y
config SOC_PCNT_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_RMT_GROUPS
int
default 1

2
components/soc/esp32p4/include/soc/retention_periph_defs.h
View File

@@ -59,7 +59,6 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_LEDC = 33,
SLEEP_RETENTION_MODULE_MCPWM0 = 34,
SLEEP_RETENTION_MODULE_MCPWM1 = 35,
SLEEP_RETENTION_MODULE_PCNT0 = 36,
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
@@ -101,7 +100,6 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: false)
#ifdef __cplusplus

1
components/soc/esp32p4/include/soc/soc_caps.h
View File

@@ -427,7 +427,6 @@
#define SOC_PCNT_THRES_POINT_PER_UNIT 2
#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
#define SOC_PCNT_SUPPORT_CLEAR_SIGNAL 1 /*!< Support clear signal input */
#define SOC_PCNT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up PCNT registers before sleep */
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */

34
components/soc/esp32p4/pcnt_periph.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -70,35 +70,3 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
}
}
};
#if SOC_PCNT_SUPPORT_SLEEP_RETENTION
/**
* PCNT Registers to be saved during sleep retention
* - Configuration registers, e.g.: PCNT_CTRL_REG, PCNT_U0_CONF0_REG, PCNT_U0_CONF1_REG, PCNT_U0_CONF2_REG, PCNT_U1_CONF0_REG...
* - Step Configuration registers, e.g.: PCNT_U0_CHANGE_CONF_REG, PCNT_U1_CHANGE_CONF_REG, PCNT_U2_CHANGE_CONF_REG, PCNT_U3_CHANGE_CONF_REG
* - Interrupt enable registers, e.g.: PCNT_INT_ENA_REG
*/
#define PCNT_RETENTION_REGS_CNT 18
#define PCNT_RETENTION_REGS_BASE (DR_REG_PCNT_BASE + 0x0)
static const uint32_t pcnt_regs_map[4] = {0x1f040fff, 0x0, 0x0, 0x0};
static const regdma_entries_config_t pcnt_regs_retention[] = {
// backup stage: save configuration registers
// restore stage: restore the configuration registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_PCNT_LINK(0x00), \
PCNT_RETENTION_REGS_BASE, PCNT_RETENTION_REGS_BASE, \
PCNT_RETENTION_REGS_CNT, 0, 0, \
pcnt_regs_map[0], pcnt_regs_map[1], \
pcnt_regs_map[2], pcnt_regs_map[3]), \
.owner = ENTRY(0)
}, \
};
const pcnt_reg_retention_info_t pcnt_reg_retention_info[SOC_PCNT_GROUPS] = {
[0] = {
.regdma_entry_array = pcnt_regs_retention,
.array_size = ARRAY_SIZE(pcnt_regs_retention),
.retention_module = SLEEP_RETENTION_MODULE_PCNT0
},
};
#endif // SOC_PCNT_SUPPORT_SLEEP_RETENTION

14
components/soc/include/soc/pcnt_periph.h
View File

@@ -9,10 +9,6 @@
#include <stdint.h>
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/regdma.h"
#if SOC_PCNT_SUPPORT_SLEEP_RETENTION
#include "soc/retention_periph_defs.h"
#endif
#ifdef __cplusplus
extern "C" {
@@ -36,16 +32,6 @@ typedef struct {
extern const pcnt_signal_conn_t pcnt_periph_signals;
#if SOC_PCNT_SUPPORT_SLEEP_RETENTION
typedef struct {
const periph_retention_module_t retention_module;
const regdma_entries_config_t *regdma_entry_array;
uint32_t array_size;
} pcnt_reg_retention_info_t;
extern const pcnt_reg_retention_info_t pcnt_reg_retention_info[SOC_PCNT_GROUPS];
#endif // SOC_PCNT_SUPPORT_SLEEP_RETENTION
#endif // SOC_PCNT_SUPPORTED
#ifdef __cplusplus

4
components/soc/include/soc/regdma.h
View File

@@ -63,8 +63,7 @@ extern "C" {
#define REGDMA_PARLIO_LINK(_pri) ((0x22 << 8) | _pri)
#define REGDMA_GPSPI_LINK(_pri) ((0x23 << 8) | _pri)
#define REGDMA_LEDC_LINK(_pri) ((0x24 << 8) | _pri)
#define REGDMA_PCNT_LINK(_pri) ((0x25 << 8) | _pri)
#define REGDMA_MCPWM_LINK(_pri) ((0x26 << 8) | _pri)
#define REGDMA_MCPWM_LINK(_pri) ((0x25 << 8) | _pri)
#define REGDMA_MODEM_FE_LINK(_pri) ((0xFF << 8) | _pri)
@@ -85,7 +84,6 @@ extern "C" {
#define REGDMA_LINK_PRI_I2C REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_I2S REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_PARLIO REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_PCNT REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_UART REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_TEMPERATURE_SENSOR REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_TWAI REGDMA_LINK_PRI_GENERAL_PERIPH

10
docs/en/api-reference/system/power_management.rst
View File

@@ -122,16 +122,6 @@ The following drivers hold the ``ESP_PM_APB_FREQ_MAX`` lock while the driver is
:SOC_SDM_SUPPORTED: - **Sigma-delta**: between calls to :cpp:func:`sdm_channel_enable` and :cpp:func:`sdm_channel_disable`.
:SOC_MCPWM_SUPPORTED: - **MCPWM**: between calls to :cpp:func:`mcpwm_timer_enable` and :cpp:func:`mcpwm_timer_disable`, as well as :cpp:func:`mcpwm_capture_timer_enable` and :cpp:func:`mcpwm_capture_timer_disable`.
The following peripheral drivers are not aware of DFS yet. Applications need to acquire/release locks themselves, when necessary:
.. list::
:SOC_PCNT_SUPPORTED: - The legacy PCNT driver
:SOC_SDM_SUPPORTED: - The legacy Sigma-delta driver
- The legacy timer group driver
:SOC_MCPWM_SUPPORTED: - The legacy MCPWM driver
.. only:: SOC_PM_SUPPORT_TOP_PD
Light-sleep Peripheral Power Down

10
docs/zh_CN/api-reference/system/power_management.rst
View File

@@ -122,16 +122,6 @@ ESP-IDF 中集成的电源管理算法可以根据应用程序组件的需求，
:SOC_SDM_SUPPORTED: - **Sigma-delta**：从调用 :cpp:func:`sdm_channel_enable` 至 :cpp:func:`sdm_channel_disable` 期间。
:SOC_MCPWM_SUPPORTED: - **MCPWM**: 从调用 :cpp:func:`mcpwm_timer_enable` 至 :cpp:func:`mcpwm_timer_disable` 期间，以及调用 :cpp:func:`mcpwm_capture_timer_enable` 至 :cpp:func:`mcpwm_capture_timer_disable` 期间。
以下外设驱动程序无法感知动态调频，应用程序需自己获取/释放管理锁：
.. list::
:SOC_PCNT_SUPPORTED: - 旧版 PCNT 驱动
:SOC_SDM_SUPPORTED: - 旧版 Sigma-delta 驱动
- 旧版定时器驱动 (Timer Group)
:SOC_MCPWM_SUPPORTED: - 旧版 MCPWM 驱动
.. only:: SOC_PM_SUPPORT_TOP_PD
Light-sleep 外设下电