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https://github.com/espressif/esp-idf.git
synced 2025-07-29 18:27:20 +02:00
fix(spi_flash): Add suspend check on esp32c6 and esp32h2 for some reason
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@ -119,6 +119,18 @@ menu "Main Flash configuration"
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For new users, DO NOT enable this config.
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config SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND
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bool "Enable chip suspend feature on c6 or h2 anyway (DO NOT ENABLE FOR NEW USERS OR APPLICATIONS)"
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default n
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help
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Flash suspend has defect on ESP32C6 until v0.2 and ESP32H2 until v1.2. If you already use suspend
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feature for massive protection, you can enable this for bypassing check after knowing the risk.
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But if you are new users, or developing new applications, or producing a new batch,
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please DO NOT enable this config option.
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For more information, please refer to errata or connect to Espressif business support team.
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endmenu
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endmenu
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -21,6 +21,9 @@
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#include "esp_rom_spiflash.h"
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#include "esp_private/esp_clk.h"
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#include "esp_spi_flash_counters.h"
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#include "esp_check.h"
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#include "hal/efuse_hal.h"
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#include "soc/chip_revision.h"
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#if CONFIG_IDF_TARGET_ESP32S2
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#include "esp_crypto_lock.h" // for locking flash encryption peripheral
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@ -1439,6 +1442,20 @@ restore_cache:
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//init suspend mode cmd, uses internal.
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esp_err_t esp_flash_suspend_cmd_init(esp_flash_t* chip)
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{
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#if !CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND
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#if CONFIG_IDF_TARGET_ESP32H2
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 102)) {
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ESP_LOGE(TAG, "ESP32H2 chips lower than v1.2 are not recommended to suspend the Flash");
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return ESP_ERR_NOT_SUPPORTED;
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}
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#endif
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#if CONFIG_IDF_TARGET_ESP32C6
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if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 2)) {
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ESP_LOGE(TAG, "ESP32C6 chips lower than v0.2 are not recommended to suspend the Flash");
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return ESP_ERR_NOT_SUPPORTED;
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}
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#endif
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#endif
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ESP_EARLY_LOGW(TAG, "Flash suspend feature is enabled");
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if (chip->chip_drv->get_chip_caps == NULL) {
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// chip caps get failed, pass the flash capability check.
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@ -2,3 +2,4 @@
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CONFIG_IDF_TARGET="esp32c3"
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CONFIG_SPI_FLASH_AUTO_SUSPEND=y
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CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND=y
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@ -1,4 +1,5 @@
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CONFIG_ESP_TASK_WDT=n
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CONFIG_ESP_TASK_WDT_INIT=n
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CONFIG_SPI_FLASH_AUTO_SUSPEND=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND=y
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@ -2,3 +2,4 @@ CONFIG_SPI_FLASH_AUTO_SUSPEND=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND=y
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