mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-01 03:34:32 +02:00
Revert "fix(cache): disable branch predictor when cache freeze"
This reverts commit 6bb78e4573
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This commit is contained in:
@@ -16,7 +16,6 @@
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#include "hal/mmu_hal.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "esp_cpu.h"
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#include "esp_cache.h"
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#include "esp_private/esp_cache_private.h"
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#include "esp_private/critical_section.h"
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@@ -96,10 +95,6 @@ esp_err_t esp_cache_msync(void *addr, size_t size, int flags)
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void esp_cache_suspend_ext_mem_cache(void)
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{
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#if SOC_BRANCH_PREDICTOR_SUPPORTED
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//branch predictor will start cache request as well
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esp_cpu_branch_prediction_disable();
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#endif
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#if (CONFIG_SPIRAM && SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE)
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/**
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* before suspending the external mem cache, writeback internal mem cache content back to external mem cache
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@@ -113,18 +108,11 @@ void esp_cache_suspend_ext_mem_cache(void)
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void esp_cache_resume_ext_mem_cache(void)
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{
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cache_hal_resume(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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#if SOC_BRANCH_PREDICTOR_SUPPORTED
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esp_cpu_branch_prediction_enable();
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#endif
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}
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#if SOC_CACHE_FREEZE_SUPPORTED
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void esp_cache_freeze_ext_mem_cache(void)
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{
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#if SOC_BRANCH_PREDICTOR_SUPPORTED
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//branch predictor will start cache request as well
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esp_cpu_branch_prediction_disable();
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#endif
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#if (CONFIG_SPIRAM && SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE)
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/**
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* before freezing the external mem cache, writeback internal mem cache content back to external mem cache
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@@ -138,9 +126,6 @@ void esp_cache_freeze_ext_mem_cache(void)
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void esp_cache_unfreeze_ext_mem_cache(void)
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{
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cache_hal_unfreeze(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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#if SOC_BRANCH_PREDICTOR_SUPPORTED
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esp_cpu_branch_prediction_enable();
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#endif
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}
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#endif //#if SOC_CACHE_FREEZE_SUPPORTED
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -7,7 +7,6 @@
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#include <stdlib.h>
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#include <stdint.h>
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#include "soc/soc_caps.h"
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#include "esp_err.h"
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#include "esp_bit_defs.h"
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#include "esp_heap_caps.h"
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@@ -16,36 +15,6 @@
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extern "C" {
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#endif
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/**
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* @brief Suspend external memory cache
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*
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* @note This API is only for internal usage, no thread safety guaranteed
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*/
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void esp_cache_suspend_ext_mem_cache(void);
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/**
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* @brief Resume external memory cache
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*
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* @note This API is only for internal usage, no thread safety guaranteed
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*/
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void esp_cache_resume_ext_mem_cache(void);
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#if SOC_CACHE_FREEZE_SUPPORTED
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/**
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* @brief Freeze external memory cache
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*
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* @note This API is only for internal usage, no thread safety guaranteed
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*/
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void esp_cache_freeze_ext_mem_cache(void);
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/**
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* @brief Unfreeze external memory cache
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*
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* @note This API is only for internal usage, no thread safety guaranteed
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*/
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void esp_cache_unfreeze_ext_mem_cache(void);
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#endif
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/**
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* @brief Helper function for malloc a cache aligned data memory buffer
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*
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@@ -58,11 +58,11 @@
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#include "esp_memory_utils.h"
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#include "esp_intr_alloc.h"
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#include "spi_flash_override.h"
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#include "esp_private/esp_cache_private.h"
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#include "esp_private/cache_utils.h"
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#include "esp_private/spi_flash_os.h"
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#include "esp_private/freertos_idf_additions_priv.h"
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#include "esp_log.h"
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#include "esp_cpu.h"
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static __attribute__((unused)) const char *TAG = "cache";
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@@ -364,12 +364,19 @@ void IRAM_ATTR spi_flash_enable_cache(uint32_t cpuid)
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void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state)
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{
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esp_cache_suspend_ext_mem_cache();
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#if SOC_BRANCH_PREDICTOR_SUPPORTED
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//branch predictor will start cache request as well
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esp_cpu_branch_prediction_disable();
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#endif
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cache_hal_suspend(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state)
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{
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esp_cache_resume_ext_mem_cache();
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cache_hal_resume(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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#if SOC_BRANCH_PREDICTOR_SUPPORTED
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esp_cpu_branch_prediction_enable();
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#endif
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}
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bool IRAM_ATTR spi_flash_cache_enabled(void)
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