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Merge branch 'fix/fix_psram_incr16_v5.5' into 'release/v5.5'

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fix(dma): add burst size check when dma access psram (v5.5)

See merge request espressif/esp-idf!41107
This commit is contained in:
Jiang Jiang Jian
2025-08-20 14:01:36 +08:00
parent 4f8f9748f6 333858e57b
commit 7b478f3ec8
6 changed files with 11 additions and 0 deletions
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6
components/esp_hw_support/dma/gdma.c
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@@ -357,6 +357,12 @@ esp_err_t gdma_config_transfer(gdma_channel_handle_t dma_chan, const gdma_transf
// burst size must be power of 2
ESP_RETURN_ON_FALSE((max_data_burst_size & (max_data_burst_size - 1)) == 0, ESP_ERR_INVALID_ARG,
TAG, "invalid max_data_burst_size: %"PRIu32, max_data_burst_size);
#if SOC_AHB_GDMA_SUPPORT_PSRAM || SOC_AXI_GDMA_SUPPORT_PSRAM
if (config->access_ext_mem) {
ESP_RETURN_ON_FALSE(max_data_burst_size <= GDMA_LL_MAX_BURST_SIZE_PSRAM, ESP_ERR_INVALID_ARG,
TAG, "max_data_burst_size must not exceed %d when accessing external memory", GDMA_LL_MAX_BURST_SIZE_PSRAM);
}
#endif
}
gdma_pair_t *pair = dma_chan->pair;
gdma_group_t *group = pair->group;

1
components/hal/esp32c5/include/hal/gdma_ll.h
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@@ -8,6 +8,7 @@
#include "soc/pcr_struct.h"
#include "hal/ahb_dma_ll.h"
#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 32 // PSRAM controller doesn't support burst access with size > 32 bytes
#ifdef __cplusplus
extern "C" {

1
components/hal/esp32c61/include/hal/gdma_ll.h
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@@ -8,6 +8,7 @@
#include "soc/pcr_struct.h"
#include "hal/ahb_dma_ll.h"
#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 32 // PSRAM controller doesn't support burst access with size > 32 bytes
#ifdef __cplusplus
extern "C" {

1
components/hal/esp32h4/include/hal/gdma_ll.h
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@@ -8,6 +8,7 @@
#include "soc/pcr_struct.h"
#include "hal/ahb_dma_ll.h"
#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 64 // PSRAM support INCR16
#ifdef __cplusplus
extern "C" {

1
components/hal/esp32p4/include/hal/gdma_ll.h
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@@ -47,6 +47,7 @@
#define GDMA_LL_AHB_DESC_ALIGNMENT 4
#define GDMA_LL_AXI_DESC_ALIGNMENT 8
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 64 // PSRAM controller doesn't support burst access with size > 64 bytes
#define GDMA_LL_TX_ETM_EVENT_TABLE(group, chan, event) \
(uint32_t[2][GDMA_ETM_EVENT_MAX]){ \

1
components/hal/esp32s3/include/hal/gdma_ll.h
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@@ -64,6 +64,7 @@ extern "C" {
#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
#define GDMA_LL_AHB_RX_BURST_NEEDS_ALIGNMENT 1
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 64 // PSRAM controller doesn't support burst access with size > 64 bytes
///////////////////////////////////// Common /////////////////////////////////////////