Merge branch 'bugfix/remove_ref_tick_on_s3' into 'master'

ledc: Remove REF_TICK as a supported clock source for LEDC driver on S3

See merge request espressif/esp-idf!16408
This commit is contained in:
Song Ruo Jing
2021-12-23 12:21:01 +00:00
4 changed files with 14 additions and 56 deletions

View File

@@ -71,8 +71,8 @@ static void produce_pulse(void)
ledc_timer_config_t ledc_timer = {
.speed_mode = LEDC_LOW_SPEED_MODE,
.timer_num = LEDC_TIMER_1,
.duty_resolution = LEDC_TIMER_10_BIT,
.freq_hz = 1,
.duty_resolution = LEDC_TIMER_14_BIT,
.freq_hz = 2,
.clk_cfg = LEDC_AUTO_CLK,
};
ESP_ERROR_CHECK(ledc_timer_config(&ledc_timer));
@@ -115,7 +115,7 @@ static void event_calculate(event_times *event)
BaseType_t port_status;
uint32_t status = 0;
while (times < 10) {
port_status = xQueueReceive(pcnt_evt_queue, &status, 1000 / portTICK_PERIOD_MS);
port_status = xQueueReceive(pcnt_evt_queue, &status, 1001 / portTICK_PERIOD_MS);
if (port_status == pdTRUE) {
event->filter_time++;
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
@@ -216,6 +216,8 @@ static void count_mode_test(gpio_num_t ctl_io)
} else {
result = result2;
}
// Wait for ledc and pcnt settling down
vTaskDelay(500 / portTICK_RATE_MS);
// 1, 0, 0, 0
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
@@ -418,7 +420,7 @@ TEST_CASE("PCNT basic function test", "[pcnt]")
//count now
while (time != 10) {
vTaskDelay(1001 / portTICK_RATE_MS); // in case of can't wait to get counter(edge effect)
vTaskDelay(501 / portTICK_RATE_MS); // in case of can't wait to get counter(edge effect)
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
printf("COUNT: %d\n", test_counter);
TEST_ASSERT_NOT_EQUAL(test_counter, temp_value);
@@ -434,14 +436,14 @@ TEST_CASE("PCNT basic function test", "[pcnt]")
if (test_counter == 0) {
//test pause
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
vTaskDelay(1000 / portTICK_RATE_MS);
vTaskDelay(500 / portTICK_RATE_MS);
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
printf("PAUSE: %d\n", test_counter);
TEST_ASSERT_EQUAL_INT16(test_counter, 0);
// test resume
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
vTaskDelay(1000 / portTICK_RATE_MS);
vTaskDelay(500 / portTICK_RATE_MS);
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
printf("RESUME: %d\n", test_counter);
TEST_ASSERT_EQUAL_INT16(test_counter, 1);
@@ -478,7 +480,7 @@ TEST_CASE("PCNT interrupt method test(control IO is high)", "[pcnt][timeout=120]
.neg_mode = PCNT_COUNT_DIS,
.lctrl_mode = PCNT_MODE_REVERSE,
.hctrl_mode = PCNT_MODE_KEEP,
.counter_h_lim = 5,
.counter_h_lim = 10,
.counter_l_lim = 0,
};
TEST_ESP_OK(pcnt_unit_config(&config));
@@ -497,9 +499,9 @@ TEST_CASE("PCNT interrupt method test(control IO is high)", "[pcnt][timeout=120]
//interrupt set
TEST_ESP_OK(pcnt_set_filter_value(PCNT_UNIT_0, 2));
TEST_ESP_OK(pcnt_filter_enable(PCNT_UNIT_0));
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, 4)); // when arrive to max threshold trigger
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, 8)); // when arrive to max threshold trigger
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1));
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 1)); // when arrive to minimum threshold trigger
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 2)); // when arrive to minimum threshold trigger
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_ZERO));
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_H_LIM)); // when arrive to max limit trigger
@@ -579,7 +581,7 @@ TEST_CASE("PCNT interrupt method test(control IO is low)", "[pcnt][timeout=120]"
.lctrl_mode = PCNT_MODE_REVERSE,
.hctrl_mode = PCNT_MODE_KEEP,
.counter_h_lim = 0,
.counter_l_lim = -5,
.counter_l_lim = -10,
};
TEST_ESP_OK(pcnt_unit_config(&config));
produce_pulse();
@@ -597,7 +599,7 @@ TEST_CASE("PCNT interrupt method test(control IO is low)", "[pcnt][timeout=120]"
//interrupt set
TEST_ESP_OK(pcnt_set_filter_value(PCNT_UNIT_0, 2));
TEST_ESP_OK(pcnt_filter_enable(PCNT_UNIT_0));
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, -4)); // when arrive to max threshold trigger
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, -8)); // when arrive to max threshold trigger
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1));
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 0)); // when arrive to minimum threshold trigger
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_0));

View File

@@ -25,15 +25,6 @@ extern "C" {
LEDC_SLOW_CLK_XTAL, \
LEDC_SLOW_CLK_RTC8M, \
}
#define LEDC_LL_TIMER_SPECIFIC_CLOCKS \
{\
{ \
.clk = LEDC_REF_TICK, \
.freq = LEDC_REF_CLK_HZ, \
} \
}
#define LEDC_LL_IS_TIMER_SPECIFIC_CLOCK(SPEED, CLK) ((CLK) == LEDC_USE_REF_TICK)
/**
* @brief Set LEDC low speed timer clock
@@ -163,27 +154,6 @@ static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_m
*clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider;
}
/**
* @brief Set LEDC timer clock source
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_src Timer clock source
*
* @return None
*/
static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t clk_src)
{
if (clk_src == LEDC_REF_TICK) {
//REF_TICK can only be used when APB is selected.
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1;
hw->conf.apb_clk_sel = 1;
} else {
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 0;
}
}
/**
* @brief Get LEDC timer clock source
*
@@ -196,11 +166,7 @@ static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mo
*/
static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
{
if (hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 1) {
*clk_src = LEDC_REF_TICK;
} else {
*clk_src = LEDC_APB_CLK;
}
*clk_src = LEDC_APB_CLK;
}
/**

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@@ -71,14 +71,6 @@ config SOC_I2C_SUPPORT_RTC
bool
default y
config SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
bool
default y
config SOC_LEDC_SUPPORT_REF_TICK
bool
default y
config SOC_LEDC_SUPPORT_XTAL_CLOCK
bool
default y

View File

@@ -10,8 +10,6 @@
extern "C" {
#endif
#define SOC_LEDC_HAS_TIMER_SPECIFIC_MUX (1)
#define SOC_LEDC_SUPPORT_REF_TICK (1)
#define SOC_LEDC_SUPPORT_XTAL_CLOCK (1)
#define SOC_LEDC_CHANNEL_NUM 8
#define SOC_LEDC_TIMER_BIT_WIDE_NUM (14)