mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-08 15:14:33 +02:00
Merge branch 'bugfix/remove_ref_tick_on_s3' into 'master'
ledc: Remove REF_TICK as a supported clock source for LEDC driver on S3 See merge request espressif/esp-idf!16408
This commit is contained in:
@@ -71,8 +71,8 @@ static void produce_pulse(void)
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ledc_timer_config_t ledc_timer = {
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.speed_mode = LEDC_LOW_SPEED_MODE,
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.timer_num = LEDC_TIMER_1,
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.duty_resolution = LEDC_TIMER_10_BIT,
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.freq_hz = 1,
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.duty_resolution = LEDC_TIMER_14_BIT,
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.freq_hz = 2,
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.clk_cfg = LEDC_AUTO_CLK,
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};
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ESP_ERROR_CHECK(ledc_timer_config(&ledc_timer));
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@@ -115,7 +115,7 @@ static void event_calculate(event_times *event)
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BaseType_t port_status;
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uint32_t status = 0;
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while (times < 10) {
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port_status = xQueueReceive(pcnt_evt_queue, &status, 1000 / portTICK_PERIOD_MS);
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port_status = xQueueReceive(pcnt_evt_queue, &status, 1001 / portTICK_PERIOD_MS);
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if (port_status == pdTRUE) {
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event->filter_time++;
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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@@ -216,6 +216,8 @@ static void count_mode_test(gpio_num_t ctl_io)
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} else {
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result = result2;
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}
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// Wait for ledc and pcnt settling down
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vTaskDelay(500 / portTICK_RATE_MS);
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// 1, 0, 0, 0
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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@@ -418,7 +420,7 @@ TEST_CASE("PCNT basic function test", "[pcnt]")
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//count now
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while (time != 10) {
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vTaskDelay(1001 / portTICK_RATE_MS); // in case of can't wait to get counter(edge effect)
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vTaskDelay(501 / portTICK_RATE_MS); // in case of can't wait to get counter(edge effect)
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("COUNT: %d\n", test_counter);
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TEST_ASSERT_NOT_EQUAL(test_counter, temp_value);
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@@ -434,14 +436,14 @@ TEST_CASE("PCNT basic function test", "[pcnt]")
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if (test_counter == 0) {
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//test pause
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
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vTaskDelay(500 / portTICK_RATE_MS);
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("PAUSE: %d\n", test_counter);
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TEST_ASSERT_EQUAL_INT16(test_counter, 0);
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// test resume
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TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
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vTaskDelay(500 / portTICK_RATE_MS);
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("RESUME: %d\n", test_counter);
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TEST_ASSERT_EQUAL_INT16(test_counter, 1);
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@@ -478,7 +480,7 @@ TEST_CASE("PCNT interrupt method test(control IO is high)", "[pcnt][timeout=120]
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.neg_mode = PCNT_COUNT_DIS,
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.lctrl_mode = PCNT_MODE_REVERSE,
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.hctrl_mode = PCNT_MODE_KEEP,
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.counter_h_lim = 5,
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.counter_h_lim = 10,
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.counter_l_lim = 0,
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};
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TEST_ESP_OK(pcnt_unit_config(&config));
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@@ -497,9 +499,9 @@ TEST_CASE("PCNT interrupt method test(control IO is high)", "[pcnt][timeout=120]
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//interrupt set
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TEST_ESP_OK(pcnt_set_filter_value(PCNT_UNIT_0, 2));
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TEST_ESP_OK(pcnt_filter_enable(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, 4)); // when arrive to max threshold trigger
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, 8)); // when arrive to max threshold trigger
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TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1));
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 1)); // when arrive to minimum threshold trigger
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 2)); // when arrive to minimum threshold trigger
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TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
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TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_ZERO));
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TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_H_LIM)); // when arrive to max limit trigger
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@@ -579,7 +581,7 @@ TEST_CASE("PCNT interrupt method test(control IO is low)", "[pcnt][timeout=120]"
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.lctrl_mode = PCNT_MODE_REVERSE,
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.hctrl_mode = PCNT_MODE_KEEP,
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.counter_h_lim = 0,
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.counter_l_lim = -5,
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.counter_l_lim = -10,
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};
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TEST_ESP_OK(pcnt_unit_config(&config));
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produce_pulse();
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@@ -597,7 +599,7 @@ TEST_CASE("PCNT interrupt method test(control IO is low)", "[pcnt][timeout=120]"
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//interrupt set
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TEST_ESP_OK(pcnt_set_filter_value(PCNT_UNIT_0, 2));
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TEST_ESP_OK(pcnt_filter_enable(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, -4)); // when arrive to max threshold trigger
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, -8)); // when arrive to max threshold trigger
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TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1));
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TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 0)); // when arrive to minimum threshold trigger
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TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
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@@ -25,15 +25,6 @@ extern "C" {
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LEDC_SLOW_CLK_XTAL, \
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LEDC_SLOW_CLK_RTC8M, \
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}
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#define LEDC_LL_TIMER_SPECIFIC_CLOCKS \
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{\
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{ \
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.clk = LEDC_REF_TICK, \
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.freq = LEDC_REF_CLK_HZ, \
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} \
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}
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#define LEDC_LL_IS_TIMER_SPECIFIC_CLOCK(SPEED, CLK) ((CLK) == LEDC_USE_REF_TICK)
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/**
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* @brief Set LEDC low speed timer clock
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@@ -163,27 +154,6 @@ static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_m
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*clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider;
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}
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/**
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* @brief Set LEDC timer clock source
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
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* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
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* @param clk_src Timer clock source
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*
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* @return None
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*/
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static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t clk_src)
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{
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if (clk_src == LEDC_REF_TICK) {
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//REF_TICK can only be used when APB is selected.
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hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1;
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hw->conf.apb_clk_sel = 1;
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} else {
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hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 0;
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}
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}
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/**
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* @brief Get LEDC timer clock source
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*
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@@ -196,11 +166,7 @@ static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mo
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*/
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static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
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{
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if (hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 1) {
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*clk_src = LEDC_REF_TICK;
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} else {
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*clk_src = LEDC_APB_CLK;
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}
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*clk_src = LEDC_APB_CLK;
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}
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/**
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@@ -71,14 +71,6 @@ config SOC_I2C_SUPPORT_RTC
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bool
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default y
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config SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
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bool
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default y
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config SOC_LEDC_SUPPORT_REF_TICK
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bool
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default y
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config SOC_LEDC_SUPPORT_XTAL_CLOCK
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bool
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default y
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@@ -10,8 +10,6 @@
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extern "C" {
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#endif
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#define SOC_LEDC_HAS_TIMER_SPECIFIC_MUX (1)
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#define SOC_LEDC_SUPPORT_REF_TICK (1)
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#define SOC_LEDC_SUPPORT_XTAL_CLOCK (1)
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#define SOC_LEDC_CHANNEL_NUM 8
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#define SOC_LEDC_TIMER_BIT_WIDE_NUM (14)
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