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esp_rom: always inline cache.h functions for esp32

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This commit is contained in:
Alexey Lapshin
2023-02-13 22:37:11 +07:00
parent 85b48bfcc0
commit 84ff4d6e37
1 changed files with 5 additions and 5 deletions
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10
components/esp_rom/include/esp32/rom/cache.h
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@@ -65,7 +65,7 @@ void mmu_init(int cpu_no);
* 4 : mmu table to be written is out of range * 4 : mmu table to be written is out of range
* 5 : vaddr is out of range * 5 : vaddr is out of range
*/ */
static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num) static inline __attribute__((always_inline)) unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num)
{ {
extern unsigned int cache_flash_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num); extern unsigned int cache_flash_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);
@@ -118,7 +118,7 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vadd
* *
* @return None * @return None
*/ */
static inline void IRAM_ATTR Cache_Read_Init(int cpu_no) static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Init(int cpu_no)
{ {
extern void Cache_Read_Init_rom(int cpu_no); extern void Cache_Read_Init_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START(); DPORT_STALL_OTHER_CPU_START();
@@ -134,7 +134,7 @@ static inline void IRAM_ATTR Cache_Read_Init(int cpu_no)
* *
* @return None * @return None
*/ */
static inline void IRAM_ATTR Cache_Flush(int cpu_no) static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Flush(int cpu_no)
{ {
extern void Cache_Flush_rom(int cpu_no); extern void Cache_Flush_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START(); DPORT_STALL_OTHER_CPU_START();
@@ -150,7 +150,7 @@ static inline void IRAM_ATTR Cache_Flush(int cpu_no)
* *
* @return None * @return None
*/ */
static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no) static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Disable(int cpu_no)
{ {
extern void Cache_Read_Disable_rom(int cpu_no); extern void Cache_Read_Disable_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START(); DPORT_STALL_OTHER_CPU_START();
@@ -166,7 +166,7 @@ static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no)
* *
* @return None * @return None
*/ */
static inline void IRAM_ATTR Cache_Read_Enable(int cpu_no) static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Enable(int cpu_no)
{ {
extern void Cache_Read_Enable_rom(int cpu_no); extern void Cache_Read_Enable_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START(); DPORT_STALL_OTHER_CPU_START();