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Merge branch 'fix/ble_i2c_v5.2' into 'release/v5.2'

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fix(i2c): Fix i2c read from fifo issue when enabling bt/wifi/uart, etc...  (backport v5.2)

See merge request espressif/esp-idf!36053
This commit is contained in:
morris
2025-01-02 15:05:32 +08:00
parent 0c2b70a83f 8cbcd1c2de
commit 866a02f258
4 changed files with 13 additions and 6 deletions
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6
components/driver/i2c/i2c_common.c
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@@ -37,7 +37,7 @@ typedef struct i2c_platform_t {
static i2c_platform_t s_i2c_platform = {}; // singleton platform
static esp_err_t s_i2c_bus_handle_aquire(i2c_port_num_t port_num, i2c_bus_handle_t *i2c_new_bus, i2c_bus_mode_t mode)
static esp_err_t s_i2c_bus_handle_acquire(i2c_port_num_t port_num, i2c_bus_handle_t *i2c_new_bus, i2c_bus_mode_t mode)
{
#if CONFIG_I2C_ENABLE_DEBUG_LOG
esp_log_level_set(TAG, ESP_LOG_DEBUG);
@@ -95,7 +95,7 @@ esp_err_t i2c_acquire_bus_handle(i2c_port_num_t port_num, i2c_bus_handle_t *i2c_
for (int i = 0; i < SOC_I2C_NUM; i++) {
bus_occupied = i2c_bus_occupied(i);
if (bus_occupied == false) {
ret = s_i2c_bus_handle_aquire(i, i2c_new_bus, mode);
ret = s_i2c_bus_handle_acquire(i, i2c_new_bus, mode);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "acquire bus failed");
_lock_release(&s_i2c_platform.mutex);
@@ -108,7 +108,7 @@ esp_err_t i2c_acquire_bus_handle(i2c_port_num_t port_num, i2c_bus_handle_t *i2c_
}
ESP_RETURN_ON_FALSE((bus_found == true), ESP_ERR_NOT_FOUND, TAG, "acquire bus failed, no free bus");
} else {
ret = s_i2c_bus_handle_aquire(port_num, i2c_new_bus, mode);
ret = s_i2c_bus_handle_acquire(port_num, i2c_new_bus, mode);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "acquire bus failed");
}

8
components/hal/esp32/include/hal/i2c_ll.h
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@@ -323,8 +323,8 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
hw->slave_addr.en_10bit = addr_10bit_en;
if (addr_10bit_en) {
uint16_t addr_14_7 = (slave_addr & 0xff) << 7;
uint8_t addr_6_0 = ((slave_addr & 0x300) >> 8) || 0x78;
hw->slave_addr.addr = addr_14_7 || addr_6_0;
uint8_t addr_6_0 = ((slave_addr & 0x300) >> 8) | 0x78;
hw->slave_addr.addr = addr_14_7 | addr_6_0;
} else {
hw->slave_addr.addr = slave_addr;
}
@@ -573,7 +573,9 @@ __attribute__((always_inline))
static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
{
for(int i = 0; i < len; i++) {
ptr[i] = HAL_FORCE_READ_U32_REG_FIELD(hw->fifo_data, data);
// Known issue that hardware read fifo will cause data lose, (fifo pointer jump over a random address)
// use `DPORT_REG_READ` can avoid this issue.
ptr[i] = DPORT_REG_READ((uint32_t)&hw->fifo_data);
}
}

4
components/soc/esp32/include/soc/Kconfig.soc_caps.in
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@@ -351,6 +351,10 @@ config SOC_I2C_SUPPORT_APB
bool
default y
config SOC_I2C_SUPPORT_10BIT_ADDR
bool
default y
config SOC_I2C_STOP_INDEPENDENT
bool
default y

1
components/soc/esp32/include/soc/soc_caps.h
View File

@@ -197,6 +197,7 @@
#define SOC_I2C_SUPPORT_SLAVE (1)
#define SOC_I2C_SUPPORT_APB (1)
#define SOC_I2C_SUPPORT_10BIT_ADDR (1)
// On ESP32, the stop bit should be independent, we can't put trans data and stop command together
#define SOC_I2C_STOP_INDEPENDENT (1)