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fix(i2s): fixed mismatch of the i2s and gdma iram-safe config
Closes https://github.com/espressif/esp-idf/issues/15533
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@ -3,6 +3,7 @@ menu "ESP-Driver:I2S Configurations"
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config I2S_ISR_IRAM_SAFE
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config I2S_ISR_IRAM_SAFE
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bool "I2S ISR IRAM-Safe"
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bool "I2S ISR IRAM-Safe"
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default n
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default n
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select GDMA_ISR_IRAM_SAFE if SOC_GDMA_SUPPORTED
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help
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help
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Ensure the I2S interrupt is IRAM-Safe by allowing the interrupt handler to be
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Ensure the I2S interrupt is IRAM-Safe by allowing the interrupt handler to be
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executable when the cache is disabled (e.g. SPI Flash write).
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executable when the cache is disabled (e.g. SPI Flash write).
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@ -31,7 +31,7 @@ extern "C" {
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// If ISR handler is allowed to run whilst cache is disabled,
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// If ISR handler is allowed to run whilst cache is disabled,
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// Make sure all the code and related variables used by the handler are in the SRAM
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// Make sure all the code and related variables used by the handler are in the SRAM
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#if CONFIG_I2S_ISR_IRAM_SAFE
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#if CONFIG_I2S_ISR_IRAM_SAFE || CONFIG_GDMA_ISR_IRAM_SAFE
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#define I2S_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
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#define I2S_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
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#define I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#define I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#else
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#else
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