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Merge branch 'change/remove_deprecated_items' into 'master'

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change: remove deprecated items

See merge request espressif/esp-idf!41769
This commit is contained in:
Armando (Dou Yiwen)
2025-09-16 13:43:28 +00:00
parent bd3b9291e1 00022a379a
commit a4c03ceb01
22 changed files with 180 additions and 300 deletions
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16
components/esp_driver_spi/test_apps/master/main/test_spi_bus_lock.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,13 +13,13 @@
#include "unity.h"
#if CONFIG_IDF_TARGET_ESP32
// The VSPI pins on UT_T1_ESP_FLASH are connected to a external flash
#define TEST_BUS_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
#define TEST_BUS_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
#define TEST_BUS_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
#define TEST_BUS_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS
#define TEST_BUS_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
#define TEST_BUS_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
// The SPI3 pins on UT_T1_ESP_FLASH are connected to a external flash
#define TEST_BUS_PIN_NUM_MISO SPI3_IOMUX_PIN_NUM_MISO
#define TEST_BUS_PIN_NUM_MOSI SPI3_IOMUX_PIN_NUM_MOSI
#define TEST_BUS_PIN_NUM_CLK SPI3_IOMUX_PIN_NUM_CLK
#define TEST_BUS_PIN_NUM_CS SPI3_IOMUX_PIN_NUM_CS
#define TEST_BUS_PIN_NUM_WP SPI3_IOMUX_PIN_NUM_WP
#define TEST_BUS_PIN_NUM_HD SPI3_IOMUX_PIN_NUM_HD
#else
#define TEST_BUS_PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO

10
components/esp_hw_support/port/include/esp_spiram.h
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@@ -1,10 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_psram.h"
#warning "esp_spiram.h is deprecated, please migrate to esp_psram.h"

13
components/fatfs/vfs/esp_vfs_fat.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -209,17 +209,6 @@ esp_err_t esp_vfs_fat_sdspi_mount(const char* base_path,
const esp_vfs_fat_mount_config_t* mount_config,
sdmmc_card_t** out_card);
/**
* @brief Unmount FAT filesystem and release resources acquired using esp_vfs_fat_sdmmc_mount
*
* @deprecated Use `esp_vfs_fat_sdcard_unmount()` instead.
*
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if esp_vfs_fat_sdmmc_mount hasn't been called
*/
esp_err_t esp_vfs_fat_sdmmc_unmount(void) __attribute__((deprecated("Please use esp_vfs_fat_sdcard_unmount instead")));
/**
* @brief Unmount an SD card from the FAT filesystem and release resources acquired using
* `esp_vfs_fat_sdmmc_mount()` or `esp_vfs_fat_sdspi_mount()`

24
components/fatfs/vfs/vfs_fat_sdmmc.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -32,11 +32,6 @@ static const char* TAG = "vfs_fat_sdmmc";
} while(0)
static vfs_fat_sd_ctx_t *s_ctx[FF_VOLUMES] = {};
/**
* This `s_saved_ctx_id` is only used by `esp_vfs_fat_sdmmc_unmount`, which is deprecated.
* This variable together with `esp_vfs_fat_sdmmc_unmount` should be removed in next major version
*/
static uint32_t s_saved_ctx_id = FF_VOLUMES;
static void call_host_deinit(const sdmmc_host_t *host_config);
static esp_err_t partition_card(const esp_vfs_fat_mount_config_t *mount_config,
@@ -287,10 +282,6 @@ esp_err_t esp_vfs_fat_sdmmc_mount(const char* base_path,
if (out_card != NULL) {
*out_card = card;
}
//For deprecation backward compatibility
if (s_saved_ctx_id == FF_VOLUMES) {
s_saved_ctx_id = 0;
}
ctx = calloc(1, sizeof(vfs_fat_sd_ctx_t));
if (!ctx) {
@@ -385,10 +376,6 @@ esp_err_t esp_vfs_fat_sdspi_mount(const char* base_path,
if (out_card != NULL) {
*out_card = card;
}
//For deprecation backward compatibility
if (s_saved_ctx_id == FF_VOLUMES) {
s_saved_ctx_id = 0;
}
ctx = calloc(1, sizeof(vfs_fat_sd_ctx_t));
if (!ctx) {
@@ -444,15 +431,6 @@ static esp_err_t unmount_card_core(const char *base_path, sdmmc_card_t *card)
return err;
}
esp_err_t esp_vfs_fat_sdmmc_unmount(void)
{
esp_err_t err = unmount_card_core(s_ctx[s_saved_ctx_id]->base_path, s_ctx[s_saved_ctx_id]->card);
free(s_ctx[s_saved_ctx_id]);
s_ctx[s_saved_ctx_id] = NULL;
s_saved_ctx_id = FF_VOLUMES;
return err;
}
esp_err_t esp_vfs_fat_sdcard_unmount(const char *base_path, sdmmc_card_t *card)
{
uint32_t id = FF_VOLUMES;

1
components/hal/include/hal/spi_flash_hal.h
View File

@@ -85,7 +85,6 @@ typedef struct {
};
bool iomux; ///< Whether the IOMUX is used, used for timing compensation.
int input_delay_ns; ///< Input delay on the MISO pin after the launch clock, used for timing compensation.
enum esp_flash_speed_s speed __attribute__((deprecated)); ///< SPI flash clock speed to work at. Replaced by freq_mhz
spi_host_device_t host_id; ///< SPI peripheral ID.
int cs_num; ///< Which cs pin is used, 0-(SOC_SPI_PERIPH_CS_NUM-1).
bool auto_sus_en; ///< Auto suspend feature enable bit 1: enable, 0: disable.

21
components/hal/include/hal/spi_flash_types.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -33,25 +33,6 @@ typedef struct {
uint32_t io_mode; ///< Flash working mode when `SPI_FLASH_IGNORE_BASEIO` is specified.
} spi_flash_trans_t;
/**
* @brief SPI flash clock speed values, always refer to them by the enum rather
* than the actual value (more speed may be appended into the list).
*
* A strategy to select the maximum allowed speed is to enumerate from the
* ``ESP_FLSH_SPEED_MAX-1`` or highest frequency supported by your flash, and
* decrease the speed until the probing success.
*/
typedef enum esp_flash_speed_s {
ESP_FLASH_5MHZ = 5, ///< The flash runs under 5MHz
ESP_FLASH_10MHZ = 10, ///< The flash runs under 10MHz
ESP_FLASH_20MHZ = 20, ///< The flash runs under 20MHz
ESP_FLASH_26MHZ = 26, ///< The flash runs under 26MHz
ESP_FLASH_40MHZ = 40, ///< The flash runs under 40MHz
ESP_FLASH_80MHZ = 80, ///< The flash runs under 80MHz
ESP_FLASH_120MHZ = 120, ///< The flash runs under 120MHz, 120MHZ can only be used by main flash after timing tuning in system. Do not use this directly in any API.
ESP_FLASH_SPEED_MAX, ///< The maximum frequency supported by the host is ``ESP_FLASH_SPEED_MAX-1``.
} esp_flash_speed_t __attribute__((deprecated));
// These bits are not quite like "IO mode", but are able to be appended into the io mode and used by the HAL.
#define SPI_FLASH_CONFIG_CONF_BITS BIT(31) ///< OR the io_mode with this mask, to enable the dummy output feature or replace the first several dummy bits into address to meet the requirements of conf bits. (Used in DIO/QIO/OIO mode)

47
components/soc/esp32/include/soc/spi_pins.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -23,35 +23,18 @@
#define SPI_D2WD_PIN_NUM_WP 7
#define SPI_D2WD_PIN_NUM_HD 11
#define SPI2_FUNC_NUM HSPI_FUNC_NUM
#define SPI2_IOMUX_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
#define SPI2_IOMUX_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
#define SPI2_IOMUX_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
#define SPI2_IOMUX_PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS
#define SPI2_IOMUX_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
#define SPI2_IOMUX_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
#define SPI2_FUNC_NUM 1
#define SPI2_IOMUX_PIN_NUM_MISO 12
#define SPI2_IOMUX_PIN_NUM_MOSI 13
#define SPI2_IOMUX_PIN_NUM_CLK 14
#define SPI2_IOMUX_PIN_NUM_CS 15
#define SPI2_IOMUX_PIN_NUM_WP 2
#define SPI2_IOMUX_PIN_NUM_HD 4
#define SPI3_FUNC_NUM VSPI_FUNC_NUM
#define SPI3_IOMUX_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
#define SPI3_IOMUX_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
#define SPI3_IOMUX_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
#define SPI3_IOMUX_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS
#define SPI3_IOMUX_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
#define SPI3_IOMUX_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
//Following Macros are deprecated. Please use the Macros above
#define HSPI_FUNC_NUM 1
#define HSPI_IOMUX_PIN_NUM_MISO 12
#define HSPI_IOMUX_PIN_NUM_MOSI 13
#define HSPI_IOMUX_PIN_NUM_CLK 14
#define HSPI_IOMUX_PIN_NUM_CS 15
#define HSPI_IOMUX_PIN_NUM_WP 2
#define HSPI_IOMUX_PIN_NUM_HD 4
#define VSPI_FUNC_NUM 1
#define VSPI_IOMUX_PIN_NUM_MISO 19
#define VSPI_IOMUX_PIN_NUM_MOSI 23
#define VSPI_IOMUX_PIN_NUM_CLK 18
#define VSPI_IOMUX_PIN_NUM_CS 5
#define VSPI_IOMUX_PIN_NUM_WP 22
#define VSPI_IOMUX_PIN_NUM_HD 21
#define SPI3_FUNC_NUM 1
#define SPI3_IOMUX_PIN_NUM_MISO 19
#define SPI3_IOMUX_PIN_NUM_MOSI 23
#define SPI3_IOMUX_PIN_NUM_CLK 18
#define SPI3_IOMUX_PIN_NUM_CS 5
#define SPI3_IOMUX_PIN_NUM_WP 22
#define SPI3_IOMUX_PIN_NUM_HD 21

30
components/soc/esp32/spi_periph.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -46,15 +46,15 @@ const spi_signal_conn_t spi_periph_signal[3] = {
.spihd_in = HSPIHD_IN_IDX,
.spics_out = {HSPICS0_OUT_IDX, HSPICS1_OUT_IDX, HSPICS2_OUT_IDX},
.spics_in = HSPICS0_IN_IDX,
.spiclk_iomux_pin = HSPI_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = HSPI_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = HSPI_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = HSPI_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = HSPI_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = HSPI_IOMUX_PIN_NUM_CS,
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = SPI2_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = SPI2_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = SPI2_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = SPI2_IOMUX_PIN_NUM_CS,
.irq = ETS_SPI2_INTR_SOURCE,
.irq_dma = ETS_SPI2_DMA_INTR_SOURCE,
.func = HSPI_FUNC_NUM,
.func = SPI2_FUNC_NUM,
.hw = &SPI2
}, {
.spiclk_out = VSPICLK_OUT_IDX,
@@ -69,15 +69,15 @@ const spi_signal_conn_t spi_periph_signal[3] = {
.spihd_in = VSPIHD_IN_IDX,
.spics_out = {VSPICS0_OUT_IDX, VSPICS1_OUT_IDX, VSPICS2_OUT_IDX},
.spics_in = VSPICS0_IN_IDX,
.spiclk_iomux_pin = VSPI_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = VSPI_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = VSPI_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = VSPI_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = VSPI_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = VSPI_IOMUX_PIN_NUM_CS,
.spiclk_iomux_pin = SPI3_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = SPI3_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = SPI3_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = SPI3_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = SPI3_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = SPI3_IOMUX_PIN_NUM_CS,
.irq = ETS_SPI3_INTR_SOURCE,
.irq_dma = ETS_SPI3_DMA_INTR_SOURCE,
.func = VSPI_FUNC_NUM,
.func = SPI3_FUNC_NUM,
.hw = &SPI3
}
};

11
components/soc/esp32s2/include/soc/spi_pins.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -46,12 +46,3 @@
#define SPI2_IOMUX_PIN_NUM_IO7_OCT 13
//SPI3 has no iomux pins
//Following Macros are deprecated. Please use the Macros above
#define FSPI_FUNC_NUM SPI2_FUNC_NUM
#define FSPI_IOMUX_PIN_NUM_HD SPI2_IOMUX_PIN_NUM_HD
#define FSPI_IOMUX_PIN_NUM_CS SPI2_IOMUX_PIN_NUM_CS
#define FSPI_IOMUX_PIN_NUM_MOSI SPI2_IOMUX_PIN_NUM_MOSI
#define FSPI_IOMUX_PIN_NUM_CLK SPI2_IOMUX_PIN_NUM_CLK
#define FSPI_IOMUX_PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO
#define FSPI_IOMUX_PIN_NUM_WP SPI2_IOMUX_PIN_NUM_WP

16
components/soc/esp32s2/spi_periph.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -56,16 +56,16 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
.spid7_in = FSPIIO7_IN_IDX,
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
.spics_in = FSPICS0_IN_IDX,
.spiclk_iomux_pin = FSPI_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = FSPI_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = FSPI_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = FSPI_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = FSPI_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = FSPI_IOMUX_PIN_NUM_CS,
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = SPI2_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = SPI2_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = SPI2_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = SPI2_IOMUX_PIN_NUM_CS,
.irq = ETS_SPI2_INTR_SOURCE,
.irq_dma = ETS_SPI2_DMA_INTR_SOURCE,
.hw = &GPSPI2,
.func = FSPI_FUNC_NUM,
.func = SPI2_FUNC_NUM,
}, {
.spiclk_out = SPI3_CLK_OUT_MUX_IDX,
.spiclk_in = SPI3_CLK_IN_IDX,

16
components/spi_flash/esp_flash_api.c
View File

@@ -109,22 +109,6 @@ void esp_flash_dump_counters(FILE* stream)
}
}
const spi_flash_counters_t *spi_flash_get_counters(void)
{
return (spi_flash_counters_t *)esp_flash_get_counters();
}
void spi_flash_reset_counters(void)
{
esp_flash_reset_counters();
}
void spi_flash_dump_counters(void)
{
esp_flash_dump_counters(stdout);
}
#else
#define COUNTER_START()
#define COUNTER_STOP(counter)

1
components/spi_flash/include/esp_flash_spi_init.h
View File

@@ -18,7 +18,6 @@ typedef struct {
spi_host_device_t host_id; ///< Bus to use
int cs_io_num; ///< GPIO pin to output the CS signal
esp_flash_io_mode_t io_mode; ///< IO mode to read from the Flash
enum esp_flash_speed_s speed __attribute__((deprecated)); ///< Speed of the Flash clock. Replaced by freq_mhz
int input_delay_ns; ///< Input delay of the data pins, in ns. Set to 0 if unknown.
/**
* CS line ID, ignored when not `host_id` is not SPI1_HOST, or

7
components/spi_flash/include/esp_spi_flash.h
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@@ -1,7 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#warning esp_spi_flash.h is deprecated, please use spi_flash_mmap.h instead
#include "spi_flash_mmap.h"

9
components/spi_flash/include/esp_spi_flash_counters.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -35,21 +35,15 @@ typedef struct {
esp_flash_counter_t erase; /*!< counters for erase action, like `esp_flash_erase`*/
} esp_flash_counters_t;
// for deprecate old api
typedef esp_flash_counter_t spi_flash_counter_t;
typedef esp_flash_counters_t spi_flash_counters_t;
/**
* @brief Reset SPI flash operation counters
*/
void esp_flash_reset_counters(void);
void spi_flash_reset_counters(void) __attribute__((deprecated("Please use 'esp_flash_reset_counters' instead")));
/**
* @brief Print SPI flash operation counters
*/
void esp_flash_dump_counters(FILE* stream);
void spi_flash_dump_counters(void) __attribute__((deprecated("Please use 'esp_flash_dump_counters' instead")));
/**
* @brief Return current SPI flash operation counters
@@ -58,7 +52,6 @@ void spi_flash_dump_counters(void) __attribute__((deprecated("Please use 'esp_fl
* of the operation counters
*/
const esp_flash_counters_t* esp_flash_get_counters(void);
const spi_flash_counters_t* spi_flash_get_counters(void) __attribute__((deprecated("Please use 'esp_flash_get_counters' instead")));
#ifdef __cplusplus
}

134
components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
@@ -14,114 +14,78 @@
#define EXTRA_SPI1_CLK_IO 17 //the pin which is usually used by the PSRAM clk
#define SPI1_CS_IO 16 //the pin which is usually used by the PSRAM cs
#define HSPI_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
#define HSPI_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
#define HSPI_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
#define HSPI_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
#define HSPI_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
#define HSPI_PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS
#define SPI2_PIN_NUM_MOSI SPI2_IOMUX_PIN_NUM_MOSI
#define SPI2_PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO
#define SPI2_PIN_NUM_CLK SPI2_IOMUX_PIN_NUM_CLK
#define SPI2_PIN_NUM_HD SPI2_IOMUX_PIN_NUM_HD
#define SPI2_PIN_NUM_WP SPI2_IOMUX_PIN_NUM_WP
#define SPI2_PIN_NUM_CS SPI2_IOMUX_PIN_NUM_CS
#define VSPI_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
#define VSPI_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
#define VSPI_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
#define VSPI_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
#define VSPI_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
#define VSPI_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS
#define SPI3_PIN_NUM_MOSI SPI3_IOMUX_PIN_NUM_MOSI
#define SPI3_PIN_NUM_MISO SPI3_IOMUX_PIN_NUM_MISO
#define SPI3_PIN_NUM_CLK SPI3_IOMUX_PIN_NUM_CLK
#define SPI3_PIN_NUM_HD SPI3_IOMUX_PIN_NUM_HD
#define SPI3_PIN_NUM_WP SPI3_IOMUX_PIN_NUM_WP
#define SPI3_PIN_NUM_CS SPI3_IOMUX_PIN_NUM_CS
#elif CONFIG_IDF_TARGET_ESP32S2
#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
#define FSPI_PIN_NUM_MOSI 35
#define FSPI_PIN_NUM_MISO 37
#define FSPI_PIN_NUM_CLK 36
#define FSPI_PIN_NUM_HD 33
#define FSPI_PIN_NUM_WP 38
#define FSPI_PIN_NUM_CS 34
// Just use the same pins for HSPI
#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#define SPI2_PIN_NUM_MOSI 35
#define SPI2_PIN_NUM_MISO 37
#define SPI2_PIN_NUM_CLK 36
#define SPI2_PIN_NUM_HD 33
#define SPI2_PIN_NUM_WP 38
#define SPI2_PIN_NUM_CS 34
#elif CONFIG_IDF_TARGET_ESP32S3
#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
#define FSPI_PIN_NUM_MOSI 11
#define FSPI_PIN_NUM_MISO 13
#define FSPI_PIN_NUM_CLK 12
#define FSPI_PIN_NUM_HD 9
#define FSPI_PIN_NUM_WP 14
#define FSPI_PIN_NUM_CS 10
// Just use the same pins for HSPI
#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#define SPI2_PIN_NUM_MOSI 11
#define SPI2_PIN_NUM_MISO 13
#define SPI2_PIN_NUM_CLK 12
#define SPI2_PIN_NUM_HD 9
#define SPI2_PIN_NUM_WP 14
#define SPI2_PIN_NUM_CS 10
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61
#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
#define FSPI_PIN_NUM_MOSI 7
#define FSPI_PIN_NUM_MISO 2
#define FSPI_PIN_NUM_CLK 6
#define FSPI_PIN_NUM_HD 4
#define FSPI_PIN_NUM_WP 5
#define FSPI_PIN_NUM_CS 10
// Just use the same pins for HSPI
#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#define SPI2_PIN_NUM_MOSI 7
#define SPI2_PIN_NUM_MISO 2
#define SPI2_PIN_NUM_CLK 6
#define SPI2_PIN_NUM_HD 4
#define SPI2_PIN_NUM_WP 5
#define SPI2_PIN_NUM_CS 10
#elif CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32H21 || CONFIG_IDF_TARGET_ESP32H4
#define FSPI_PIN_NUM_MOSI 5
#define FSPI_PIN_NUM_MISO 0
#define FSPI_PIN_NUM_CLK 4
#define FSPI_PIN_NUM_HD 3
#define FSPI_PIN_NUM_WP 2
#define FSPI_PIN_NUM_CS 1
// Just use the same pins for HSPI
#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#define SPI2_PIN_NUM_MOSI 5
#define SPI2_PIN_NUM_MISO 0
#define SPI2_PIN_NUM_CLK 4
#define SPI2_PIN_NUM_HD 3
#define SPI2_PIN_NUM_WP 2
#define SPI2_PIN_NUM_CS 1
#elif CONFIG_IDF_TARGET_ESP32P4
// Normal IOMUX pins
#define FSPI_PIN_NUM_MOSI 8
#define FSPI_PIN_NUM_MISO 10
#define FSPI_PIN_NUM_CLK 9
#define FSPI_PIN_NUM_HD 6
#define FSPI_PIN_NUM_WP 11
#define FSPI_PIN_NUM_CS 7
// Just use the same pins for HSPI
#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
#define SPI2_PIN_NUM_MOSI 8
#define SPI2_PIN_NUM_MISO 10
#define SPI2_PIN_NUM_CLK 9
#define SPI2_PIN_NUM_HD 6
#define SPI2_PIN_NUM_WP 11
#define SPI2_PIN_NUM_CS 7
#endif
#define TEST_CONFIG_NUM (sizeof(config_list)/sizeof(flashtest_config_t))
@@ -227,7 +191,7 @@ flashtest_config_t config_list[] = {
// .host_id = SPI2_HOST,
// .cs_id = 0,
// // uses GPIO matrix on esp32s2 regardless if FORCE_GPIO_MATRIX
// .cs_io_num = HSPI_PIN_NUM_CS,
// .cs_io_num = SPI2_PIN_NUM_CS,
// .input_delay_ns = 20,
// },
{
@@ -235,7 +199,7 @@ flashtest_config_t config_list[] = {
.freq_mhz = TEST_SPI_SPEED,
.host_id = SPI3_HOST,
.cs_id = 0,
.cs_io_num = VSPI_PIN_NUM_CS,
.cs_io_num = SPI3_PIN_NUM_CS,
.input_delay_ns = 0,
},
};
@@ -247,7 +211,7 @@ flashtest_config_t config_list[] = {
.freq_mhz = TEST_SPI_SPEED,
.host_id = SPI2_HOST,
.cs_id = 0,
.cs_io_num = FSPI_PIN_NUM_CS,
.cs_io_num = SPI2_PIN_NUM_CS,
.input_delay_ns = 0,
},
{
@@ -256,7 +220,7 @@ flashtest_config_t config_list[] = {
.host_id = SPI3_HOST,
.cs_id = 0,
// uses GPIO matrix on esp32s2 regardless of FORCE_GPIO_MATRIX
.cs_io_num = HSPI_PIN_NUM_CS,
.cs_io_num = SPI2_PIN_NUM_CS,
.input_delay_ns = 0,
},
};
@@ -272,7 +236,7 @@ flashtest_config_t config_list[] = {
.freq_mhz = TEST_SPI_SPEED,
.host_id = SPI2_HOST,
.cs_id = 0,
.cs_io_num = FSPI_PIN_NUM_CS,
.cs_io_num = SPI2_PIN_NUM_CS,
.input_delay_ns = 0,
},
};
@@ -288,7 +252,7 @@ flashtest_config_t config_list[] = {
.freq_mhz = TEST_SPI_SPEED,
.host_id = SPI2_HOST,
.cs_id = 0,
.cs_io_num = FSPI_PIN_NUM_CS,
.cs_io_num = SPI2_PIN_NUM_CS,
.input_delay_ns = 0,
},
};

74
components/spi_flash/test_apps/esp_flash/main/test_esp_flash_drv.c
View File

@@ -64,28 +64,28 @@ static void setup_bus(spi_host_device_t host_id)
esp_rom_gpio_connect_out_signal(EXTRA_SPI1_CLK_IO, SPICLK_OUT_IDX, 0, 0);
//currently the SPI bus for main flash chip is initialized through GPIO matrix
} else if (host_id == SPI2_HOST) {
ESP_LOGI(TAG, "setup flash on SPI%u (HSPI) CS0...", host_id + 1);
spi_bus_config_t hspi_bus_cfg = {
.mosi_io_num = HSPI_PIN_NUM_MOSI,
.miso_io_num = HSPI_PIN_NUM_MISO,
.sclk_io_num = HSPI_PIN_NUM_CLK,
.quadhd_io_num = HSPI_PIN_NUM_HD,
.quadwp_io_num = HSPI_PIN_NUM_WP,
ESP_LOGI(TAG, "setup flash on SPI%u CS0...", host_id + 1);
spi_bus_config_t spi2_bus_cfg = {
.mosi_io_num = SPI2_PIN_NUM_MOSI,
.miso_io_num = SPI2_PIN_NUM_MISO,
.sclk_io_num = SPI2_PIN_NUM_CLK,
.quadhd_io_num = SPI2_PIN_NUM_HD,
.quadwp_io_num = SPI2_PIN_NUM_WP,
.max_transfer_sz = 64,
};
esp_err_t ret = spi_bus_initialize(host_id, &hspi_bus_cfg, 0);
esp_err_t ret = spi_bus_initialize(host_id, &spi2_bus_cfg, 0);
TEST_ESP_OK(ret);
} else if (host_id == SPI3_HOST) {
ESP_LOGI(TAG, "setup flash on SPI%u (VSPI) CS0...", host_id + 1);
spi_bus_config_t vspi_bus_cfg = {
.mosi_io_num = VSPI_PIN_NUM_MOSI,
.miso_io_num = VSPI_PIN_NUM_MISO,
.sclk_io_num = VSPI_PIN_NUM_CLK,
.quadhd_io_num = VSPI_PIN_NUM_HD,
.quadwp_io_num = VSPI_PIN_NUM_WP,
ESP_LOGI(TAG, "setup flash on SPI%u CS0...", host_id + 1);
spi_bus_config_t spi3_bus_cfg = {
.mosi_io_num = SPI3_PIN_NUM_MOSI,
.miso_io_num = SPI3_PIN_NUM_MISO,
.sclk_io_num = SPI3_PIN_NUM_CLK,
.quadhd_io_num = SPI3_PIN_NUM_HD,
.quadwp_io_num = SPI3_PIN_NUM_WP,
.max_transfer_sz = 64,
};
esp_err_t ret = spi_bus_initialize(host_id, &vspi_bus_cfg, 0);
esp_err_t ret = spi_bus_initialize(host_id, &spi3_bus_cfg, 0);
TEST_ESP_OK(ret);
} else {
ESP_LOGE(TAG, "invalid bus");
@@ -107,38 +107,38 @@ static void setup_bus(spi_host_device_t host_id)
#endif //CONFIG_ESPTOOLPY_FLASHMODE_QIO || CONFIG_ESPTOOLPY_FLASHMODE_QOUT
//currently the SPI bus for main flash chip is initialized through GPIO matrix
} else if (host_id == SPI2_HOST) {
ESP_LOGI(TAG, "setup flash on SPI%u (FSPI) CS0...", host_id + 1);
spi_bus_config_t fspi_bus_cfg = {
.mosi_io_num = FSPI_PIN_NUM_MOSI,
.miso_io_num = FSPI_PIN_NUM_MISO,
.sclk_io_num = FSPI_PIN_NUM_CLK,
.quadhd_io_num = FSPI_PIN_NUM_HD,
.quadwp_io_num = FSPI_PIN_NUM_WP,
ESP_LOGI(TAG, "setup flash on SPI%u CS0...", host_id + 1);
spi_bus_config_t spi2_bus_cfg = {
.mosi_io_num = SPI2_PIN_NUM_MOSI,
.miso_io_num = SPI2_PIN_NUM_MISO,
.sclk_io_num = SPI2_PIN_NUM_CLK,
.quadhd_io_num = SPI2_PIN_NUM_HD,
.quadwp_io_num = SPI2_PIN_NUM_WP,
.max_transfer_sz = 64,
};
esp_err_t ret = spi_bus_initialize(host_id, &fspi_bus_cfg, 0);
esp_err_t ret = spi_bus_initialize(host_id, &spi2_bus_cfg, 0);
TEST_ESP_OK(ret);
}
#if SOC_SPI_PERIPH_NUM > 2
else if (host_id == SPI3_HOST) {
ESP_LOGI(TAG, "setup flash on SPI%u (HSPI) CS0...", host_id + 1);
spi_bus_config_t hspi_bus_cfg = {
.mosi_io_num = HSPI_PIN_NUM_MOSI,
.miso_io_num = HSPI_PIN_NUM_MISO,
.sclk_io_num = HSPI_PIN_NUM_CLK,
.quadhd_io_num = HSPI_PIN_NUM_HD,
.quadwp_io_num = HSPI_PIN_NUM_WP,
ESP_LOGI(TAG, "setup flash on SPI%u CS0...", host_id + 1);
spi_bus_config_t spi2_bus_cfg = {
.mosi_io_num = SPI2_PIN_NUM_MOSI,
.miso_io_num = SPI2_PIN_NUM_MISO,
.sclk_io_num = SPI2_PIN_NUM_CLK,
.quadhd_io_num = SPI2_PIN_NUM_HD,
.quadwp_io_num = SPI2_PIN_NUM_WP,
.max_transfer_sz = 64,
};
esp_err_t ret = spi_bus_initialize(host_id, &hspi_bus_cfg, 0);
esp_err_t ret = spi_bus_initialize(host_id, &spi2_bus_cfg, 0);
TEST_ESP_OK(ret);
// HSPI have no multiline mode, use GPIO to pull those pins up
gpio_set_direction(HSPI_PIN_NUM_HD, GPIO_MODE_OUTPUT);
gpio_set_level(HSPI_PIN_NUM_HD, 1);
// SPI2 have no multiline mode, use GPIO to pull those pins up
gpio_set_direction(SPI2_PIN_NUM_HD, GPIO_MODE_OUTPUT);
gpio_set_level(SPI2_PIN_NUM_HD, 1);
gpio_set_direction(HSPI_PIN_NUM_WP, GPIO_MODE_OUTPUT);
gpio_set_level(HSPI_PIN_NUM_WP, 1);
gpio_set_direction(SPI2_PIN_NUM_WP, GPIO_MODE_OUTPUT);
gpio_set_level(SPI2_PIN_NUM_WP, 1);
}
#endif
else {

2
docs/en/migration-guides/release-5.x/5.0/system.rst
View File

@@ -61,7 +61,7 @@ The previously deprecated ROM-related header files located in ``components/esp32
PSRAM
^^^^^
- The target-specific header file ``spiram.h`` and the header file ``esp_spiram.h`` have been removed. A new component ``esp_psram`` is created instead. For PSRAM/SPIRAM-related functions, users now include ``esp_psram.h`` and set the ``esp_psram`` component as a component requirement in their ``CMakeLists.txt`` project files.
- The target-specific header file ``spiram.h`` has been removed. A new component ``esp_psram`` is created instead. For PSRAM/SPIRAM-related functions, users now include ``esp_psram.h`` and set the ``esp_psram`` component as a component requirement in their ``CMakeLists.txt`` project files.
- ``esp_spiram_get_chip_size`` and ``esp_spiram_get_size`` have been deleted. You should use ``esp_psram_get_size`` instead.
eFuse

1
docs/en/migration-guides/release-6.x/6.0/index.rst
View File

@@ -13,5 +13,6 @@ Migration from 5.5 to 6.0
protocols
security
tools
storage
system
toolchain

30
docs/en/migration-guides/release-6.x/6.0/peripherals.rst
View File

@@ -179,14 +179,32 @@ LCD
SPI
---
The :ref:`CONFIG_SPI_MASTER_IN_IRAM` option is now invisible by default in menuconfig and depends on :ref:`CONFIG_FREERTOS_IN_IRAM`. This change was made to prevent potential crashes when SPI functions in IRAM call FreeRTOS functions that are placed in flash.
- The :ref:`CONFIG_SPI_MASTER_IN_IRAM` option is now invisible by default in menuconfig and depends on :ref:`CONFIG_FREERTOS_IN_IRAM`. This change was made to prevent potential crashes when SPI functions in IRAM call FreeRTOS functions that are placed in flash.
- To enable SPI master IRAM optimization:
To enable SPI master IRAM optimization:
1. Navigate to ``Component config`` → ``FreeRTOS`` → ``Port`` in menuconfig
2. Enable ``Place FreeRTOS functions in IRAM`` (:ref:`CONFIG_FREERTOS_IN_IRAM`)
3. Navigate to ``Component config`` → ``ESP-Driver:SPI Configurations``
4. Enable ``Place transmitting functions of SPI master into IRAM`` (:ref:`CONFIG_SPI_MASTER_IN_IRAM`)
1. Navigate to ``Component config`` → ``FreeRTOS`` → ``Port`` in menuconfig
2. Enable ``Place FreeRTOS functions in IRAM`` (:ref:`CONFIG_FREERTOS_IN_IRAM`)
3. Navigate to ``Component config`` → ``ESP-Driver:SPI Configurations``
4. Enable ``Place transmitting functions of SPI master into IRAM`` (:ref:`CONFIG_SPI_MASTER_IN_IRAM`)
- Note that enabling :ref:`CONFIG_FREERTOS_IN_IRAM` will increase IRAM usage. Consider this trade-off when optimizing for SPI performance.
- Deprecated HSPI and VSPI related IOMUX pin macros on ESP32 and ESP32S2 have been removed.
PSRAM
-----
Deprecated header file ``esp_spiram.h`` has been removed. Please use ``esp_psram.h`` instead.
SPI Flash Driver
----------------
- Deprecated ``enum`` type ``esp_flash_speed_t`` has been removed. The main flash speed is controlled by :ref:`CONFIG_ESPTOOLPY_FLASHFREQ` option.
- Deprecated header file ``esp_spi_flash.h`` has been removed. Please use ``spi_flash_mmap.h`` instead.
- Deprecated API ``spi_flash_dump_counters`` has been removed. Please use :cpp:func:`esp_flash_dump_counters` instead.
- Deprecated API ``spi_flash_get_counters`` has been removed. Please use :cpp:func:`esp_flash_get_counters` instead.
- Deprecated API ``spi_flash_reset_counters`` has been removed. Please use :cpp:func:`esp_flash_reset_counters` instead.
Note that enabling :ref:`CONFIG_FREERTOS_IN_IRAM` will increase IRAM usage. Consider this trade-off when optimizing for SPI performance.

7
docs/en/migration-guides/release-6.x/6.0/storage.rst Normal file
View File

@@ -0,0 +1,7 @@
Storage
=======
Removed VFS SDMMC Deprecated API
--------------------------------
Deprecated ``esp_vfs_fat_sdmmc_unmount`` function is now removed. Please use ``esp_vfs_fat_sdcard_unmount`` instead.

1
docs/zh_CN/migration-guides/release-6.x/6.0/index.rst
View File

@@ -13,5 +13,6 @@
protocols
security
tools
storage
system
toolchain

9
docs/zh_CN/migration-guides/release-6.x/6.0/storage.rst Normal file
View File

@@ -0,0 +1,9 @@
存储
=======
Removed VFS SDMMC Deprecated API
移除 VFS SDMMC 弃用 API
--------------------------------
已被弃用的 API ``esp_vfs_fat_sdmmc_unmount`` 现已移除，请使用 ``esp_vfs_fat_sdcard_unmount`` 代替。