fix(i2s): fixed mismatch of the i2s and gdma iram-safe config

Closes https://github.com/espressif/esp-idf/issues/15533
This commit is contained in:
laokaiyao
2025-03-18 16:20:15 +08:00
parent 8b80e26f4d
commit b22964cc4f
2 changed files with 2 additions and 1 deletions

View File

@ -3,6 +3,7 @@ menu "ESP-Driver:I2S Configurations"
config I2S_ISR_IRAM_SAFE
bool "I2S ISR IRAM-Safe"
default n
select GDMA_ISR_IRAM_SAFE if SOC_GDMA_SUPPORTED
help
Ensure the I2S interrupt is IRAM-Safe by allowing the interrupt handler to be
executable when the cache is disabled (e.g. SPI Flash write).

View File

@ -40,7 +40,7 @@ extern "C" {
// If ISR handler is allowed to run whilst cache is disabled,
// Make sure all the code and related variables used by the handler are in the SRAM
#if CONFIG_I2S_ISR_IRAM_SAFE
#if CONFIG_I2S_ISR_IRAM_SAFE || CONFIG_GDMA_ISR_IRAM_SAFE
#define I2S_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
#define I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else