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fix(i2c): Fix i2c customize only read one byte issue

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This commit is contained in:
C.S.M
2025-03-31 16:47:07 +08:00
parent 0752abf3c7
commit c29d6575a1
3 changed files with 105 additions and 2 deletions
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13
components/esp_driver_i2c/i2c_master.c
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@@ -294,6 +294,13 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
i2c_master->read_buf_pos = i2c_master->trans_idx;
} else {
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
// If the read position has not been marked, that means the transaction doesn't contain read-ack
// operation, then mark the read position in read-nack operation.
// i2c_master->read_buf_pos will never be 0.
if (i2c_master->read_buf_pos == 0) {
i2c_master->read_buf_pos = i2c_master->trans_idx;
i2c_master->read_len_static = i2c_master->rx_cnt;
}
i2c_master->cmd_idx++;
}
i2c_master->trans_idx++;
@@ -610,6 +617,7 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf
i2c_master->cmd_idx = 0;
i2c_master->rx_cnt = 0;
i2c_master->read_len_static = 0;
i2c_master->read_buf_pos = 0;
I2C_CLOCK_SRC_ATOMIC() {
i2c_hal_set_bus_timing(hal, i2c_dev->scl_speed_hz, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz);
@@ -673,7 +681,10 @@ IRAM_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_master)
i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->read_buf_pos];
portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
i2c_ll_read_rxfifo(hal->dev, i2c_operation->data + i2c_operation->bytes_used, i2c_master->read_len_static);
i2c_ll_read_rxfifo(hal->dev, i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data, 1);
// If the read command only contain nack marker, no read it for the second time.
if (i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data) {
i2c_ll_read_rxfifo(hal->dev, i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data, 1);
}
i2c_master->w_r_size = i2c_master->read_len_static + 1;
i2c_master->contains_read = false;
portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);

2
components/esp_driver_i2c/i2c_slave.c
View File

@@ -297,6 +297,7 @@ static esp_err_t i2c_slave_bus_destroy(i2c_slave_dev_handle_t i2c_slave)
if (i2c_slave->base) {
i2c_ll_disable_intr_mask(i2c_slave->base->hal.dev, I2C_LL_SLAVE_EVENT_INTR);
i2c_common_deinit_pins(i2c_slave->base);
i2c_release_bus_handle(i2c_slave->base);
}
if (i2c_slave->slv_rx_mux) {
vSemaphoreDeleteWithCaps(i2c_slave->slv_rx_mux);
@@ -313,7 +314,6 @@ static esp_err_t i2c_slave_bus_destroy(i2c_slave_dev_handle_t i2c_slave)
if (i2c_slave->slv_evt_queue) {
vQueueDeleteWithCaps(i2c_slave->slv_evt_queue);
}
i2c_release_bus_handle(i2c_slave->base);
}
free(i2c_slave);

92
components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_i2c_slave_v2.c
View File

@@ -329,4 +329,96 @@ static void i2c_master_write_test_with_customize_api(void)
}
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave with customize api", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_test_with_customize_api, i2c_slave_read_test_v2);
static void master_read_slave_test_v2_single_byte(void)
{
uint8_t data_rd[DATA_LENGTH] = {0};
i2c_master_bus_config_t i2c_mst_config = {
.clk_source = I2C_CLK_SRC_DEFAULT,
.i2c_port = TEST_I2C_PORT,
.scl_io_num = I2C_MASTER_SCL_IO,
.sda_io_num = I2C_MASTER_SDA_IO,
.flags.enable_internal_pullup = true,
};
i2c_master_bus_handle_t bus_handle;
TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config, &bus_handle));
i2c_device_config_t dev_cfg = {
.dev_addr_length = I2C_ADDR_BIT_LEN_7,
.device_address = I2C_DEVICE_ADDRESS_NOT_USED,
.scl_speed_hz = 100000,
.scl_wait_us = 20000,
};
i2c_master_dev_handle_t dev_handle;
TEST_ESP_OK(i2c_master_bus_add_device(bus_handle, &dev_cfg, &dev_handle));
unity_wait_for_signal("i2c slave init finish");
uint8_t read_address = (ESP_SLAVE_ADDR << 1 | 1);
i2c_operation_job_t i2c_ops[] = {
{ .command = I2C_MASTER_CMD_START },
{ .command = I2C_MASTER_CMD_WRITE, .write = { .ack_check = true, .data = (uint8_t *) &read_address, .total_bytes = 1 } },
{ .command = I2C_MASTER_CMD_READ, .read = { .ack_value = I2C_NACK_VAL, .data = data_rd, .total_bytes = 1 }},
{ .command = I2C_MASTER_CMD_STOP },
};
i2c_master_execute_defined_operations(dev_handle, i2c_ops, sizeof(i2c_ops) / sizeof(i2c_operation_job_t), 1000);
vTaskDelay(100 / portTICK_PERIOD_MS);
TEST_ASSERT(data_rd[0] == 6);
unity_send_signal("ready to delete master read test");
TEST_ESP_OK(i2c_master_bus_rm_device(dev_handle));
TEST_ESP_OK(i2c_del_master_bus(bus_handle));
}
static void slave_write_buffer_test_v2_single_byte(void)
{
i2c_slave_dev_handle_t handle;
uint8_t data_wr[DATA_LENGTH];
event_queue = xQueueCreate(2, sizeof(i2c_slave_event_t));
assert(event_queue);
i2c_slave_config_t i2c_slv_config = {
.i2c_port = TEST_I2C_PORT,
.clk_source = I2C_CLK_SRC_DEFAULT,
.scl_io_num = I2C_SLAVE_SCL_IO,
.sda_io_num = I2C_SLAVE_SDA_IO,
.slave_addr = ESP_SLAVE_ADDR,
.send_buf_depth = DATA_LENGTH,
.receive_buf_depth = DATA_LENGTH,
.flags.enable_internal_pullup = true,
};
TEST_ESP_OK(i2c_new_slave_device(&i2c_slv_config, &handle));
i2c_slave_event_callbacks_t cbs = {
.on_receive = i2c_slave_receive_cb,
.on_request = i2c_slave_request_cb,
};
TEST_ESP_OK(i2c_slave_register_event_callbacks(handle, &cbs, NULL));
unity_send_signal("i2c slave init finish");
data_wr[0] = 6;
i2c_slave_event_t evt;
uint32_t write_len;
while (true) {
if (xQueueReceive(event_queue, &evt, portMAX_DELAY) == pdTRUE) {
if (evt == I2C_SLAVE_EVT_TX) {
TEST_ESP_OK(i2c_slave_write(handle, data_wr, 1, &write_len, 1000));
break;
}
}
}
unity_wait_for_signal("ready to delete master read test");
vQueueDelete(event_queue);
TEST_ESP_OK(i2c_del_slave_device(handle));
}
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test single byte", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test_v2_single_byte, slave_write_buffer_test_v2_single_byte);
#endif // SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE