espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-31 11:17:20 +02:00
Code Issues Packages Projects Releases Wiki Activity

refactor(drivers)!: remove unnecessary io_loop_back and pull up/down config option

Browse Source
This commit is contained in:
morris
2025-05-13 14:43:29 +08:00
parent 8afb0fb9e6
commit c63f51dcb3
52 changed files with 19 additions and 232 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
components/esp_driver_ana_cmpr/include/driver/ana_cmpr.h
View File

@ -29,9 +29,6 @@ typedef struct {
ana_cmpr_cross_type_t cross_type; /*!< The crossing types that can trigger interrupt */
int intr_priority; /*!< The interrupt priority, range 1~3.
If set to 0, the driver will automatically select a relative low priority (1,2,3) */
struct {
uint32_t io_loop_back: 1; /*!< Deprecated. For debug/test, a signal output from other peripheral can work as comparator input. */
} flags; /*!< Analog comparator driver flags */
} ana_cmpr_config_t;
/**

1
components/esp_driver_cam/dvp/src/esp_cam_ctlr_dvp_cam.c
View File

@ -7,7 +7,6 @@
#include <sys/lock.h>
#include <sys/param.h>
#include "esp_memory_utils.h"
#include "hal/gpio_ll.h"
#include "hal/cam_ll.h"
#include "hal/color_hal.h"
#include "driver/gpio.h"

1
components/esp_driver_cam/isp_dvp/src/esp_cam_ctlr_isp_dvp.c
View File

@ -15,7 +15,6 @@
#include "driver/isp_types.h"
#include "driver/gpio.h"
#include "hal/isp_hal.h"
#include "hal/gpio_hal.h"
#include "hal/isp_ll.h"
#include "hal/mipi_csi_brg_ll.h"
#include "hal/mipi_csi_ll.h"

1
components/esp_driver_dac/test_apps/dac/main/test_dac.c
View File

@ -19,7 +19,6 @@
#include "esp_private/i2s_platform.h"
// Following headers are used to test the conversion frequency
#include "soc/i2s_periph.h"
#include "hal/gpio_hal.h"
#include "driver/pulse_cnt.h"
#include "soc/pcnt_periph.h"
#elif CONFIG_IDF_TARGET_ESP32S2

4
components/esp_driver_gpio/include/esp_private/gpio.h
View File

@ -7,9 +7,9 @@
#pragma once
#include "sdkconfig.h"
#include <esp_types.h>
#include "esp_types.h"
#include "soc/soc_caps.h"
#include "soc/io_mux_reg.h"
#include "driver/gpio.h"
#ifdef __cplusplus

1
components/esp_driver_i2c/i2c_common.c
View File

@ -18,7 +18,6 @@
#include "esp_pm.h"
#include "freertos/FreeRTOS.h"
#include "hal/i2c_hal.h"
#include "hal/gpio_hal.h"
#include "esp_private/periph_ctrl.h"
#include "esp_rom_gpio.h"
#include "i2c_private.h"

1
components/esp_driver_i2c/i2c_master.c
View File

@ -30,7 +30,6 @@
#include "clk_ctrl_os.h"
#include "hal/i2c_types.h"
#include "hal/i2c_hal.h"
#include "hal/gpio_hal.h"
#include "esp_memory_utils.h"
#include "freertos/idf_additions.h"

1
components/esp_driver_i2c/i2c_slave.c
View File

@ -17,7 +17,6 @@
#include "soc/i2c_periph.h"
#include "esp_rom_gpio.h"
#include "driver/gpio.h"
#include "hal/gpio_ll.h"
#include "clk_ctrl_os.h"
#include "esp_private/esp_clk.h"
#include "driver/i2c_slave.h"

1
components/esp_driver_i2c/i2c_slave_v2.c
View File

@ -12,7 +12,6 @@
#include "esp_attr.h"
#include "esp_rom_gpio.h"
#include "driver/gpio.h"
#include "hal/gpio_ll.h"
#include "esp_err.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"

1
components/esp_driver_i2s/i2s_common.c
View File

@ -23,7 +23,6 @@
#include "soc/i2s_periph.h"
#include "soc/soc_caps.h"
#include "hal/gpio_hal.h"
#include "hal/i2s_hal.h"
#include "hal/hal_utils.h"
#include "hal/dma_types.h"

1
components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c
View File

@ -13,7 +13,6 @@
#include "freertos/semphr.h"
#include "sdkconfig.h"
#include "driver/gpio.h"
#include "hal/gpio_hal.h"
#include "hal/dma_types.h"
#include "esp_private/gpio.h"
#include "esp_err.h"

1
components/esp_driver_ledc/src/ledc.c
View File

@ -16,7 +16,6 @@
#include "esp_clk_tree.h"
#include "soc/soc_caps.h"
#include "hal/ledc_hal.h"
#include "hal/gpio_hal.h"
#include "driver/ledc.h"
#include "esp_rom_gpio.h"
#include "clk_ctrl_os.h"

1
components/esp_driver_ledc/test_apps/ledc/main/test_ledc.c
View File

@ -14,7 +14,6 @@
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "unity.h"
#include "hal/gpio_ll.h"
#include "soc/gpio_periph.h"
#include "soc/io_mux_reg.h"
#include "esp_system.h"

4
components/esp_driver_mcpwm/include/driver/mcpwm_cap.h
View File

@ -146,11 +146,7 @@ typedef struct {
struct extra_capture_channel_flags {
uint32_t pos_edge: 1; /*!< Whether to capture on positive edge */
uint32_t neg_edge: 1; /*!< Whether to capture on negative edge */
uint32_t pull_up: 1; /*!< Whether to pull up internally */
uint32_t pull_down: 1; /*!< Whether to pull down internally */
uint32_t invert_cap_signal: 1; /*!< Invert the input capture signal */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t keep_io_conf_at_exit: 1 __attribute__((deprecated)); /*!< Deprecated. Driver won't change the GPIO configuration in deinilization. */
} flags; /*!< Extra configuration flags for capture channel */
} mcpwm_capture_channel_config_t;

3
components/esp_driver_mcpwm/include/driver/mcpwm_fault.h
View File

@ -26,9 +26,6 @@ typedef struct {
int gpio_num; /*!< GPIO used by the fault signal */
struct {
uint32_t active_level: 1; /*!< On which level the fault signal is treated as active */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t pull_up: 1; /*!< Whether to pull up internally */
uint32_t pull_down: 1; /*!< Whether to pull down internally */
} flags; /*!< Extra configuration flags for GPIO fault */
} mcpwm_gpio_fault_config_t;

4
components/esp_driver_mcpwm/include/driver/mcpwm_gen.h
View File

@ -23,10 +23,6 @@ typedef struct {
int gen_gpio_num; /*!< The GPIO number used to output the PWM signal */
struct {
uint32_t invert_pwm: 1; /*!< Whether to invert the PWM signal (done by GPIO matrix) */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t io_od_mode: 1; /*!< Configure the GPIO as open-drain mode */
uint32_t pull_up: 1; /*!< Whether to pull up internally */
uint32_t pull_down: 1; /*!< Whether to pull down internally */
} flags; /*!< Extra configuration flags for generator */
} mcpwm_generator_config_t;

3
components/esp_driver_mcpwm/include/driver/mcpwm_sync.h
View File

@ -48,9 +48,6 @@ typedef struct {
int gpio_num; /*!< GPIO used by sync source */
struct {
uint32_t active_neg: 1; /*!< Whether the sync signal is active on negedge, by default, the sync signal's posedge is treated as active */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t pull_up: 1; /*!< Whether to pull up internally */
uint32_t pull_down: 1; /*!< Whether to pull down internally */
} flags; /*!< Extra configuration flags for GPIO sync source */
} mcpwm_gpio_sync_src_config_t;

16
components/esp_driver_mcpwm/src/mcpwm_cap.c
View File

@ -11,7 +11,6 @@
#include "driver/mcpwm_cap.h"
#include "driver/gpio.h"
#include "esp_private/gpio.h"
#include "hal/gpio_ll.h"
static void mcpwm_capture_default_isr(void *args);
@ -289,21 +288,6 @@ esp_err_t mcpwm_new_capture_channel(mcpwm_cap_timer_handle_t cap_timer, const mc
gpio_func_sel(config->gpio_num, PIN_FUNC_GPIO);
gpio_input_enable(config->gpio_num);
esp_rom_gpio_connect_in_signal(config->gpio_num, mcpwm_periph_signals.groups[group->group_id].captures[cap_chan_id].cap_sig, 0);
if (config->flags.pull_down) {
gpio_pulldown_en(config->gpio_num);
} else {
gpio_pulldown_dis(config->gpio_num);
}
if (config->flags.pull_up) {
gpio_pullup_en(config->gpio_num);
} else {
gpio_pullup_dis(config->gpio_num);
}
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, config->gpio_num);
}
}
cap_chan->gpio_num = config->gpio_num;

17
components/esp_driver_mcpwm/src/mcpwm_fault.c
View File

@ -6,7 +6,6 @@
#include "mcpwm_private.h"
#include "esp_memory_utils.h"
#include "hal/gpio_hal.h"
#include "driver/mcpwm_fault.h"
#include "driver/gpio.h"
#include "esp_private/gpio.h"
@ -96,22 +95,6 @@ esp_err_t mcpwm_new_gpio_fault(const mcpwm_gpio_fault_config_t *config, mcpwm_fa
gpio_input_enable(config->gpio_num);
esp_rom_gpio_connect_in_signal(config->gpio_num, mcpwm_periph_signals.groups[group_id].gpio_faults[fault_id].fault_sig, 0);
if (config->flags.pull_down) {
gpio_pulldown_en(config->gpio_num);
} else {
gpio_pulldown_dis(config->gpio_num);
}
if (config->flags.pull_up) {
gpio_pullup_en(config->gpio_num);
} else {
gpio_pullup_dis(config->gpio_num);
}
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, config->gpio_num);
}
// set fault detection polarity
// different gpio faults share the same config register, using a group level spin lock
portENTER_CRITICAL(&group->spinlock);

9
components/esp_driver_mcpwm/src/mcpwm_gen.c
View File

@ -5,7 +5,6 @@
*/
#include "mcpwm_private.h"
#include "hal/gpio_hal.h"
#include "driver/gpio.h"
#include "driver/mcpwm_gen.h"
#include "esp_private/esp_gpio_reserve.h"
@ -82,14 +81,6 @@ esp_err_t mcpwm_new_generator(mcpwm_oper_handle_t oper, const mcpwm_generator_co
mcpwm_periph_signals.groups[group->group_id].operators[oper_id].generators[gen_id].pwm_sig,
config->flags.invert_pwm, 0);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_ll_input_enable(&GPIO, config->gen_gpio_num);
}
if (config->flags.io_od_mode) {
gpio_ll_od_enable(&GPIO, config->gen_gpio_num);
}
// fill in other generator members
gen->gen_gpio_num = config->gen_gpio_num;
gen->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;

1
components/esp_driver_mcpwm/src/mcpwm_private.h
View File

@ -25,7 +25,6 @@
#include "esp_intr_alloc.h"
#include "esp_heap_caps.h"
#include "esp_pm.h"
#include "soc/io_mux_reg.h"
#include "soc/mcpwm_periph.h"
#include "hal/mcpwm_hal.h"
#include "hal/mcpwm_ll.h"

17
components/esp_driver_mcpwm/src/mcpwm_sync.c
View File

@ -5,7 +5,6 @@
*/
#include "mcpwm_private.h"
#include "hal/gpio_hal.h"
#include "driver/mcpwm_sync.h"
#include "driver/gpio.h"
#include "esp_private/gpio.h"
@ -176,22 +175,6 @@ esp_err_t mcpwm_new_gpio_sync_src(const mcpwm_gpio_sync_src_config_t *config, mc
esp_rom_gpio_connect_in_signal(config->gpio_num, mcpwm_periph_signals.groups[group_id].gpio_synchros[sync_id].sync_sig, 0);
if (config->flags.pull_down) {
gpio_pulldown_en(config->gpio_num);
} else {
gpio_pulldown_dis(config->gpio_num);
}
if (config->flags.pull_up) {
gpio_pullup_en(config->gpio_num);
} else {
gpio_pullup_dis(config->gpio_num);
}
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, config->gpio_num);
}
// different ext sync share the same config register, using a group level spin lock
portENTER_CRITICAL(&group->spinlock);
mcpwm_ll_invert_gpio_sync_input(group->hal.dev, sync_id, config->flags.active_neg);

2
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_cap.c
View File

@ -38,7 +38,6 @@ TEST_CASE("mcpwm_capture_install_uninstall", "[mcpwm]")
.gpio_num = TEST_CAP_GPIO,
.prescale = 2,
.flags.pos_edge = true,
.flags.pull_up = true,
};
mcpwm_cap_channel_handle_t cap_channels[total_cap_timers][SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER];
for (int i = 0; i < total_cap_timers; i++) {
@ -98,7 +97,6 @@ TEST_CASE("mcpwm_capture_ext_gpio", "[mcpwm]")
.prescale = 1,
.flags.pos_edge = true,
.flags.neg_edge = true,
.flags.pull_up = true,
};
TEST_ESP_OK(mcpwm_new_capture_channel(cap_timer, &cap_chan_config, &pps_channel));

1
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_fault.c
View File

@ -72,7 +72,6 @@ TEST_CASE("mcpwm_gpio_fault_event_callbacks", "[mcpwm]")
.group_id = 0,
.gpio_num = fault_gpio,
.flags.active_level = true, // active on high level
.flags.pull_down = true,
};
TEST_ESP_OK(mcpwm_new_gpio_fault(&gpio_fault_config, &fault));

3
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_gen.c
View File

@ -1018,8 +1018,6 @@ TEST_CASE("mcpwm_generator_action_on_fault_trigger_event", "[mcpwm]")
mcpwm_gpio_fault_config_t gpio_trigger_config = {
.group_id = 0,
.flags.active_level = 1,
.flags.pull_down = 1,
.flags.pull_up = 0,
};
for (int i = 0 ; i < 3; i++) {
gpio_trigger_config.gpio_num = fault_gpio_num[i];
@ -1253,7 +1251,6 @@ TEST_CASE("mcpwm_generator_action_on_gpio_sync_trigger_event", "[mcpwm]")
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0,
.gpio_num = sync_gpio,
.flags.pull_down = true, // internally pull down
};
TEST_ESP_OK(mcpwm_new_gpio_sync_src(&gpio_sync_config, &gpio_sync));

1
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_iram.c
View File

@ -63,7 +63,6 @@ TEST_CASE("mcpwm_capture_iram_safe", "[mcpwm]")
.prescale = 1,
.flags.pos_edge = true,
.flags.neg_edge = true,
.flags.pull_up = true,
};
TEST_ESP_OK(mcpwm_new_capture_channel(cap_timer, &cap_chan_config, &pps_channel));

1
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_oper.c
View File

@ -167,7 +167,6 @@ TEST_CASE("mcpwm_operator_brake_on_gpio_fault", "[mcpwm]")
mcpwm_gpio_fault_config_t gpio_fault_config = {
.group_id = 0,
.flags.active_level = 1,
.flags.pull_down = true,
};
mcpwm_fault_handle_t gpio_cbc_fault = NULL;
mcpwm_fault_handle_t gpio_ost_fault = NULL;

1
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_sync.c
View File

@ -137,7 +137,6 @@ TEST_CASE("mcpwm_gpio_sync_timer_phase_lock", "[mcpwm]")
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0,
.gpio_num = gpio_num,
.flags.pull_down = true, // internally pull down
};
TEST_ESP_OK(mcpwm_new_gpio_sync_src(&gpio_sync_config, &gpio_sync_src));
// put the GPIO into initial state

2
components/esp_driver_parlio/include/driver/parlio_rx.h
View File

@ -39,8 +39,6 @@ typedef struct {
uint32_t clk_gate_en : 1; /*!< Enable RX clock gating, only available when the clock direction is output(not supported on ESP32-C6)
the output clock will be controlled by the valid gpio,
i.e. high level of valid gpio to enable the clock output, low to disable */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t io_no_init: 1 __attribute__((deprecated)); /*!< Deprecated. Driver won't change the GPIO configuration in inilization. */
uint32_t allow_pd: 1; /*!< Set to allow power down. When this flag set, the driver will backup/restore the PARLIO registers before/after entering/exist sleep mode.
By this approach, the system can power off PARLIO's power domain.
This can save power, but at the expense of more RAM being consumed. */

1
components/esp_driver_parlio/include/driver/parlio_tx.h
View File

@ -41,7 +41,6 @@ typedef struct {
uint32_t clk_gate_en: 1; /*!< Enable TX clock gating,
the output clock will be controlled by the MSB bit of the data bus,
i.e. by data_gpio_nums[PARLIO_TX_UNIT_MAX_DATA_WIDTH-1]. High level to enable the clock output, low to disable */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t allow_pd: 1; /*!< Set to allow power down. When this flag set, the driver will backup/restore the PARLIO registers before/after entering/exist sleep mode.
By this approach, the system can power off PARLIO's power domain.
This can save power, but at the expense of more RAM being consumed. */

1
components/esp_driver_parlio/src/parlio_priv.h
View File

@ -28,7 +28,6 @@
#include "freertos/idf_additions.h"
#include "soc/soc_caps.h"
#include "soc/gdma_channel.h"
#include "soc/io_mux_reg.h"
#include "soc/parlio_periph.h"
#include "hal/parlio_types.h"
#include "hal/parlio_hal.h"

24
components/esp_driver_parlio/src/parlio_rx.c
View File

@ -246,12 +246,6 @@ static esp_err_t parlio_rx_unit_set_gpio(parlio_rx_unit_handle_t rx_unit, const
ESP_RETURN_ON_FALSE(config->clk_in_gpio_num >= 0, ESP_ERR_INVALID_ARG, TAG, "clk_in_gpio_num must be set while the clock input from external");
/* Connect the clock in signal to the GPIO matrix if it is set */
gpio_input_enable(config->clk_in_gpio_num);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_output_enable(config->clk_in_gpio_num);
}
esp_rom_gpio_connect_in_signal(config->clk_in_gpio_num,
parlio_periph_signals.groups[group_id].rx_units[unit_id].clk_in_sig, false);
}
@ -260,12 +254,6 @@ static esp_err_t parlio_rx_unit_set_gpio(parlio_rx_unit_handle_t rx_unit, const
if (config->clk_out_gpio_num >= 0) {
#if SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT
gpio_func_sel(config->clk_out_gpio_num, PIN_FUNC_GPIO);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_input_enable(config->clk_out_gpio_num);
}
// connect the signal to the GPIO by matrix, it will also enable the output path properly
esp_rom_gpio_connect_out_signal(config->clk_out_gpio_num,
parlio_periph_signals.groups[group_id].rx_units[unit_id].clk_out_sig, false, false);
@ -277,12 +265,6 @@ static esp_err_t parlio_rx_unit_set_gpio(parlio_rx_unit_handle_t rx_unit, const
/* Initialize the valid GPIO as input */
if (config->valid_gpio_num >= 0) {
gpio_input_enable(config->valid_gpio_num);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_output_enable(config->valid_gpio_num);
}
/* Not connect the signal here, the signal is lazy connected until the delimiter takes effect */
}
@ -291,12 +273,6 @@ static esp_err_t parlio_rx_unit_set_gpio(parlio_rx_unit_handle_t rx_unit, const
/* Loop the data_gpio_nums to connect data and valid signals via GPIO matrix */
if (config->data_gpio_nums[i] >= 0) {
gpio_input_enable(config->data_gpio_nums[i]);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_output_enable(config->data_gpio_nums[i]);
}
esp_rom_gpio_connect_in_signal(config->data_gpio_nums[i],
parlio_periph_signals.groups[group_id].rx_units[unit_id].data_sigs[i], false);
} else {

22
components/esp_driver_parlio/src/parlio_tx.c
View File

@ -87,12 +87,6 @@ static esp_err_t parlio_tx_unit_configure_gpio(parlio_tx_unit_t *tx_unit, const
for (size_t i = 0; i < config->data_width; i++) {
if (config->data_gpio_nums[i] >= 0) {
gpio_func_sel(config->data_gpio_nums[i], PIN_FUNC_GPIO);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_input_enable(config->data_gpio_nums[i]);
}
// connect the signal to the GPIO by matrix, it will also enable the output path properly
esp_rom_gpio_connect_out_signal(config->data_gpio_nums[i],
parlio_periph_signals.groups[group_id].tx_units[unit_id].data_sigs[i], false, false);
@ -102,10 +96,6 @@ static esp_err_t parlio_tx_unit_configure_gpio(parlio_tx_unit_t *tx_unit, const
if (config->valid_gpio_num >= 0) {
gpio_func_sel(config->valid_gpio_num, PIN_FUNC_GPIO);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_input_enable(config->valid_gpio_num);
}
#if !PARLIO_LL_TX_DATA_LINE_AS_VALID_SIG
// Configure CS signal if supported
// Note: the default value of CS signal is low, so we need to invert the CS to keep compatible with the default value
@ -123,24 +113,12 @@ static esp_err_t parlio_tx_unit_configure_gpio(parlio_tx_unit_t *tx_unit, const
}
if (config->clk_out_gpio_num >= 0) {
gpio_func_sel(config->clk_out_gpio_num, PIN_FUNC_GPIO);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_input_enable(config->clk_out_gpio_num);
}
// connect the signal to the GPIO by matrix, it will also enable the output path properly
esp_rom_gpio_connect_out_signal(config->clk_out_gpio_num,
parlio_periph_signals.groups[group_id].tx_units[unit_id].clk_out_sig, false, false);
}
if (config->clk_in_gpio_num >= 0) {
gpio_input_enable(config->clk_in_gpio_num);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_output_enable(config->clk_in_gpio_num);
}
esp_rom_gpio_connect_in_signal(config->clk_in_gpio_num,
parlio_periph_signals.groups[group_id].tx_units[unit_id].clk_in_sig, false);
}

1
components/esp_driver_parlio/test_apps/parlio/main/test_parlio_rx.c
View File

@ -16,7 +16,6 @@
#include "driver/i2s_tdm.h"
#include "driver/spi_master.h"
#include "driver/gpio.h"
#include "hal/gpio_hal.h"
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
#include "soc/soc_caps.h"

14
components/esp_driver_pcnt/include/driver/pulse_cnt.h
View File

@ -76,16 +76,13 @@ typedef struct {
* @brief PCNT channel configuration
*/
typedef struct {
int edge_gpio_num; /*!< GPIO number used by the edge signal, input mode with pull up enabled. Set to -1 if unused */
int level_gpio_num; /*!< GPIO number used by the level signal, input mode with pull up enabled. Set to -1 if unused */
int edge_gpio_num; /*!< GPIO number used by the edge signal. Set to -1 if unused */
int level_gpio_num; /*!< GPIO number used by the level signal. Set to -1 if unused */
struct {
uint32_t invert_edge_input: 1; /*!< Invert the input edge signal */
uint32_t invert_level_input: 1; /*!< Invert the input level signal */
uint32_t virt_edge_io_level: 1; /*!< Virtual edge IO level, 0: low, 1: high. Only valid when edge_gpio_num is set to -1 */
uint32_t virt_level_io_level: 1; /*!< Virtual level IO level, 0: low, 1: high. Only valid when level_gpio_num is set to -1 */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well.
Note that this flag is deprecated, will be removed in IDF v6.0.
Instead, you can configure the output mode by calling gpio_config() first, and then do PCNT channel configuration. Necessary configurations for the IO to be used as the PCNT input will be appended. */
} flags; /*!< Channel config flags */
} pcnt_chan_config_t;
@ -147,12 +144,9 @@ esp_err_t pcnt_unit_set_glitch_filter(pcnt_unit_handle_t unit, const pcnt_glitch
* @brief PCNT clear signal configuration
*/
typedef struct {
int clear_signal_gpio_num; /*!< GPIO number used by the clear signal, the default active level is high, input mode with pull down enabled */
int clear_signal_gpio_num; /*!< GPIO number used by the clear signal, the default active level is high */
struct {
uint32_t invert_clear_signal: 1; /*!< Invert the clear input signal and set input mode with pull up */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well.
Note that this flag is deprecated, will be removed in IDF v6.0.
Instead, you can configure the output mode by calling gpio_config() first, and then do PCNT channel configuration. Necessary configurations for the IO to be used as the PCNT input will be appended. */
uint32_t invert_clear_signal: 1; /*!< Invert the clear input signal */
} flags; /*!< clear signal config flags */
} pcnt_clear_signal_config_t;

36
components/esp_driver_pcnt/src/pulse_cnt.c
View File

@ -25,13 +25,11 @@
#include "soc/gpio_pins.h"
#include "hal/pcnt_hal.h"
#include "hal/pcnt_ll.h"
#include "hal/gpio_hal.h"
#include "esp_private/esp_clk.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/sleep_retention.h"
#include "driver/gpio.h"
#include "esp_private/gpio.h"
#include "hal/gpio_ll.h" // for io_loop_back flag only
#include "driver/pulse_cnt.h"
#include "esp_memory_utils.h"
@ -324,8 +322,6 @@ esp_err_t pcnt_del_unit(pcnt_unit_handle_t unit)
if (unit->clear_signal_gpio_num >= 0) {
uint32_t clear_signal_idx = pcnt_periph_signals.groups[group_id].units[unit_id].clear_sig;
esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT, clear_signal_idx, 0);
gpio_pullup_dis(unit->clear_signal_gpio_num);
gpio_pulldown_dis(unit->clear_signal_gpio_num);
}
#endif // SOC_PCNT_SUPPORT_CLEAR_SIGNAL
@ -348,27 +344,13 @@ esp_err_t pcnt_unit_set_clear_signal(pcnt_unit_handle_t unit, const pcnt_clear_s
int io_num = config->clear_signal_gpio_num;
ESP_RETURN_ON_FALSE(GPIO_IS_VALID_GPIO(io_num), ESP_ERR_INVALID_ARG, TAG, "gpio num is invalid");
if (!config->flags.invert_clear_signal) {
gpio_pulldown_en(io_num);
gpio_pullup_dis(io_num);
} else {
gpio_pullup_en(io_num);
gpio_pulldown_dis(io_num);
}
gpio_func_sel(io_num, PIN_FUNC_GPIO);
gpio_input_enable(io_num);
esp_rom_gpio_connect_in_signal(io_num, clear_signal_idx, config->flags.invert_clear_signal);
unit->clear_signal_gpio_num = config->clear_signal_gpio_num;
// io_loop_back is a deprecated flag, workaround for compatibility
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, io_num);
}
} else {
ESP_RETURN_ON_FALSE(unit->clear_signal_gpio_num >= 0, ESP_ERR_INVALID_STATE, TAG, "clear signal not set yet");
esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT, clear_signal_idx, 0);
gpio_pullup_dis(unit->clear_signal_gpio_num);
gpio_pulldown_dis(unit->clear_signal_gpio_num);
unit->clear_signal_gpio_num = -1;
}
return ESP_OK;
@ -785,18 +767,11 @@ esp_err_t pcnt_new_channel(pcnt_unit_handle_t unit, const pcnt_chan_config_t *co
// GPIO configuration
if (config->edge_gpio_num >= 0) {
gpio_pullup_en(config->edge_gpio_num);
gpio_pulldown_dis(config->edge_gpio_num);
gpio_func_sel(config->edge_gpio_num, PIN_FUNC_GPIO);
gpio_input_enable(config->edge_gpio_num);
esp_rom_gpio_connect_in_signal(config->edge_gpio_num,
pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].pulse_sig,
config->flags.invert_edge_input);
// io_loop_back is a deprecated flag, workaround for compatibility
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, config->edge_gpio_num);
}
} else {
// using virtual IO
esp_rom_gpio_connect_in_signal(config->flags.virt_edge_io_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT,
@ -805,18 +780,11 @@ esp_err_t pcnt_new_channel(pcnt_unit_handle_t unit, const pcnt_chan_config_t *co
}
if (config->level_gpio_num >= 0) {
gpio_pullup_en(config->level_gpio_num);
gpio_pulldown_dis(config->level_gpio_num);
gpio_func_sel(config->level_gpio_num, PIN_FUNC_GPIO);
gpio_input_enable(config->level_gpio_num);
esp_rom_gpio_connect_in_signal(config->level_gpio_num,
pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].control_sig,
config->flags.invert_level_input);
// io_loop_back is a deprecated flag, workaround for compatibility
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, config->level_gpio_num);
}
} else {
// using virtual IO
esp_rom_gpio_connect_in_signal(config->flags.virt_level_io_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT,
@ -856,15 +824,11 @@ esp_err_t pcnt_del_channel(pcnt_channel_handle_t chan)
esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ONE_INPUT,
pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].control_sig,
0);
gpio_pullup_dis(chan->level_gpio_num);
gpio_pulldown_dis(chan->level_gpio_num);
}
if (chan->edge_gpio_num >= 0) {
esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ONE_INPUT,
pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].pulse_sig,
0);
gpio_pullup_dis(chan->edge_gpio_num);
gpio_pulldown_dis(chan->edge_gpio_num);
}
free(chan);

1
components/esp_driver_rmt/include/driver/rmt_rx.h
View File

@ -41,7 +41,6 @@ typedef struct {
struct {
uint32_t invert_in: 1; /*!< Whether to invert the incoming RMT channel signal */
uint32_t with_dma: 1; /*!< If set, the driver will allocate an RMT channel with DMA capability */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
uint32_t allow_pd: 1; /*!< If set, driver allows the power domain to be powered off when system enters sleep mode.
This can save power, but at the expense of more RAM being consumed to save register context. */
} flags; /*!< RX channel config flags */

2
components/esp_driver_rmt/include/driver/rmt_tx.h
View File

@ -42,8 +42,6 @@ typedef struct {
struct {
uint32_t invert_out: 1; /*!< Whether to invert the RMT channel signal before output to GPIO pad */
uint32_t with_dma: 1; /*!< If set, the driver will allocate an RMT channel with DMA capability */
uint32_t io_loop_back: 1; /*!< The signal output from the GPIO will be fed to the input path as well */
uint32_t io_od_mode: 1; /*!< Configure the GPIO as open-drain mode */
uint32_t allow_pd: 1; /*!< If set, driver allows the power domain to be powered off when system enters sleep mode.
This can save power, but at the expense of more RAM being consumed to save register context. */
} flags; /*!< TX channel config flags */

7
components/esp_driver_rmt/src/rmt_rx.c
View File

@ -8,7 +8,6 @@
#include "esp_cache.h"
#include "esp_rom_gpio.h"
#include "soc/rmt_periph.h"
#include "hal/gpio_hal.h"
#include "driver/gpio.h"
#include "driver/rmt_rx.h"
#include "rmt_private.h"
@ -294,17 +293,11 @@ esp_err_t rmt_new_rx_channel(const rmt_rx_channel_config_t *config, rmt_channel_
// GPIO Matrix/MUX configuration
gpio_func_sel(config->gpio_num, PIN_FUNC_GPIO);
gpio_input_enable(config->gpio_num);
gpio_pullup_en(config->gpio_num);
esp_rom_gpio_connect_in_signal(config->gpio_num,
rmt_periph_signals.groups[group_id].channels[channel_id + RMT_RX_CHANNEL_OFFSET_IN_GROUP].rx_sig,
config->flags.invert_in);
rx_channel->base.gpio_num = config->gpio_num;
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_ll_output_enable(&GPIO, config->gpio_num);
}
// initialize other members of rx channel
portMUX_INITIALIZE(&rx_channel->base.spinlock);
atomic_init(&rx_channel->base.fsm, RMT_FSM_INIT);

9
components/esp_driver_rmt/src/rmt_tx.c
View File

@ -7,7 +7,6 @@
#include "esp_rom_gpio.h"
#include "esp_memory_utils.h"
#include "soc/rtc.h"
#include "hal/gpio_hal.h"
#include "esp_cache.h"
#include "driver/gpio.h"
#include "driver/rmt_tx.h"
@ -349,14 +348,6 @@ esp_err_t rmt_new_tx_channel(const rmt_tx_channel_config_t *config, rmt_channel_
config->flags.invert_out, false);
tx_channel->base.gpio_num = config->gpio_num;
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_ll_input_enable(&GPIO, config->gpio_num);
}
if (config->flags.io_od_mode) {
gpio_ll_od_enable(&GPIO, config->gpio_num);
}
portMUX_INITIALIZE(&tx_channel->base.spinlock);
atomic_init(&tx_channel->base.fsm, RMT_FSM_INIT);
tx_channel->base.hw_mem_base = &RMTMEM.channels[channel_id + RMT_TX_CHANNEL_OFFSET_IN_GROUP].symbols[0];

1
components/esp_driver_sdio/src/sdio_slave.c
View File

@ -85,7 +85,6 @@ The driver of FIFOs works as below:
#include "esp_intr_alloc.h"
#include "esp_log.h"
#include "hal/sdio_slave_hal.h"
#include "hal/gpio_hal.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "esp_private/periph_ctrl.h"

1
components/esp_driver_sdm/include/driver/sdm.h
View File

@ -28,7 +28,6 @@ typedef struct {
uint32_t sample_rate_hz; /*!< Over sample rate in Hz, it determines the frequency of the carrier pulses */
struct {
uint32_t invert_out: 1; /*!< Whether to invert the output signal */
uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
} flags; /*!< Extra flags */
} sdm_config_t;

5
components/esp_driver_sdm/src/sdm.c
View File

@ -22,7 +22,6 @@
#include "esp_clk_tree.h"
#include "driver/gpio.h"
#include "driver/sdm.h"
#include "hal/gpio_hal.h"
#include "hal/sdm_hal.h"
#include "hal/sdm_ll.h"
#include "hal/hal_utils.h"
@ -233,10 +232,6 @@ esp_err_t sdm_new_channel(const sdm_config_t *config, sdm_channel_handle_t *ret_
ESP_GOTO_ON_ERROR(io_mux_set_clock_source((soc_module_clk_t)(group->clk_src)), err, TAG, "set IO MUX clock source failed");
gpio_func_sel(config->gpio_num, PIN_FUNC_GPIO);
// deprecated, to be removed in in esp-idf v6.0
if (config->flags.io_loop_back) {
gpio_input_enable(config->gpio_num);
}
// connect the signal to the GPIO by matrix, it will also enable the output path properly
esp_rom_gpio_connect_out_signal(config->gpio_num, sigma_delta_periph_signals.channels[chan_id].sd_sig, config->flags.invert_out, false);
chan->gpio_num = config->gpio_num;

2
components/esp_driver_sdmmc/Kconfig
View File

@ -1,4 +1,4 @@
menu "ESP-Driver: SD Host SDMMC Controller Configurations"
menu "ESP-Driver:SD Host SDMMC Controller Configurations"
depends on SOC_SDMMC_HOST_SUPPORTED

1
components/esp_driver_sdmmc/test_apps/sdmmc/components/sdmmc_tests/sdmmc_test_begin_end_sd.c
View File

@ -14,7 +14,6 @@
#include "sd_protocol_defs.h"
#include "sdmmc_cmd.h"
#include "sdmmc_test_begin_end_sd.h"
#include "hal/gpio_hal.h"
#include "sd_pwr_ctrl.h"
#include "sd_pwr_ctrl_by_on_chip_ldo.h"

1
components/esp_driver_twai/twai_private.h
View File

@ -26,7 +26,6 @@
#include "esp_err.h"
#include "soc/soc_caps.h"
#include "soc/twai_periph.h"
#include "soc/io_mux_reg.h"
#include "hal/twai_hal.h"
#include "esp_intr_alloc.h"
#include "esp_heap_caps.h"

1
docs/en/api-reference/peripherals/mcpwm.rst
View File

@ -879,7 +879,6 @@ Sync Timers by GPIO
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0, // GPIO fault should be in the same group of the above timers
.gpio_num = EXAMPLE_SYNC_GPIO,
.flags.pull_down = true,
.flags.active_neg = false, // By default, a posedge pulse can trigger a sync event
};
ESP_ERROR_CHECK(mcpwm_new_gpio_sync_src(&gpio_sync_config, &gpio_sync_source));

1
docs/zh_CN/api-reference/peripherals/mcpwm.rst
View File

@ -879,7 +879,6 @@ MCPWM 定时器接收到同步信号后，定时器将强制进入一个预定
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0, // GPIO 故障应与以上定时器位于同一组中
.gpio_num = EXAMPLE_SYNC_GPIO,
.flags.pull_down = true,
.flags.active_neg = false, // 默认情况下，一个上升沿脉冲可以触发一个同步事件
};
ESP_ERROR_CHECK(mcpwm_new_gpio_sync_src(&gpio_sync_config, &gpio_sync_source));

6
examples/peripherals/mcpwm/mcpwm_bldc_hall_control/main/mcpwm_bldc_hall_control_example_main.c
View File

@ -227,9 +227,10 @@ void app_main(void)
.gpio_num = BLDC_DRV_FAULT_GPIO,
.group_id = 0,
.flags.active_level = 0, // low level means fault, refer to DRV8302 datasheet
.flags.pull_up = true, // internally pull up
};
ESP_ERROR_CHECK(mcpwm_new_gpio_fault(&gpio_fault_config, &over_cur_fault));
// pull up the GPIO internally
ESP_ERROR_CHECK(gpio_set_pull_mode(BLDC_DRV_FAULT_GPIO, GPIO_PULLUP_ONLY));
ESP_LOGI(TAG, "Set brake mode on the fault event");
mcpwm_brake_config_t brake_config = {
@ -311,7 +312,6 @@ void app_main(void)
mcpwm_cap_channel_handle_t cap_channels[3];
mcpwm_capture_channel_config_t cap_channel_config = {
.prescale = 1,
.flags.pull_up = true,
.flags.neg_edge = true,
.flags.pos_edge = true,
};
@ -319,6 +319,8 @@ void app_main(void)
for (int i = 0; i < 3; i++) {
cap_channel_config.gpio_num = cap_chan_gpios[i];
ESP_ERROR_CHECK(mcpwm_new_capture_channel(cap_timer, &cap_channel_config, &cap_channels[i]));
// pull up the GPIO internally
ESP_ERROR_CHECK(gpio_set_pull_mode(cap_chan_gpios[i], GPIO_PULLUP_ONLY));
}
ESP_LOGI(TAG, "Register event callback for capture channels");

4
examples/peripherals/mcpwm/mcpwm_capture_hc_sr04/main/mcpwm_capture_hc_sr04.c
View File

@ -71,10 +71,10 @@ void app_main(void)
// capture on both edge
.flags.neg_edge = true,
.flags.pos_edge = true,
// pull up internally
.flags.pull_up = true,
};
ESP_ERROR_CHECK(mcpwm_new_capture_channel(cap_timer, &cap_ch_conf, &cap_chan));
// pull up the GPIO internally
ESP_ERROR_CHECK(gpio_set_pull_mode(HC_SR04_ECHO_GPIO, GPIO_PULLUP_ONLY));
ESP_LOGI(TAG, "Register capture callback");
TaskHandle_t cur_task = xTaskGetCurrentTaskHandle();

3
examples/peripherals/mcpwm/mcpwm_sync/main/mcpwm_sync_example_main.c
View File

@ -39,10 +39,11 @@ static void example_setup_sync_strategy(mcpwm_timer_handle_t timers[])
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0, // GPIO fault should be in the same group of the above timers
.gpio_num = EXAMPLE_SYNC_GPIO,
.flags.pull_down = true,
.flags.active_neg = false, // by default, a posedge pulse can trigger a sync event
};
ESP_ERROR_CHECK(mcpwm_new_gpio_sync_src(&gpio_sync_config, &gpio_sync_source));
// pull-down the GPIO to ensure a stable posedge pulse
ESP_ERROR_CHECK(gpio_set_pull_mode(EXAMPLE_SYNC_GPIO, GPIO_PULLDOWN_ONLY));
ESP_LOGI(TAG, "Set timers to sync on the GPIO");
mcpwm_timer_sync_phase_config_t sync_phase_config = {

4
examples/peripherals/rmt/onewire/main/onewire_example_main.c
View File

@ -7,6 +7,7 @@
#include "freertos/task.h"
#include "esp_log.h"
#include "esp_check.h"
#include "driver/gpio.h"
#include "onewire_bus.h"
#include "ds18b20.h"
@ -28,6 +29,9 @@ void app_main(void)
ESP_ERROR_CHECK(onewire_new_bus_rmt(&bus_config, &rmt_config, &bus));
ESP_LOGI(TAG, "1-Wire bus installed on GPIO%d", EXAMPLE_ONEWIRE_BUS_GPIO);
// in case the external device didn't have a pull-up resistor, we also enable the internal pull-up resistor
ESP_ERROR_CHECK(gpio_pullup_en(EXAMPLE_ONEWIRE_BUS_GPIO));
int ds18b20_device_num = 0;
ds18b20_device_handle_t ds18b20s[EXAMPLE_ONEWIRE_MAX_DS18B20];
onewire_device_iter_handle_t iter = NULL;