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feat(driver_spi): c61 eco3 support master rx sample phase config
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@@ -719,7 +719,7 @@ static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active)
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*/
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static inline void spi_ll_master_set_rx_timing_mode(spi_dev_t *hw, spi_sampling_point_t sample_point)
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{
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//This is not supported
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hw->clock.clk_edge_sel = (sample_point == SPI_SAMPLING_POINT_PHASE_1);
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}
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/**
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@@ -727,7 +727,7 @@ static inline void spi_ll_master_set_rx_timing_mode(spi_dev_t *hw, spi_sampling_
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*/
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static inline bool spi_ll_master_is_rx_std_sample_supported(void)
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{
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return false;
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return true;
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}
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/**
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