Merge branch 'refactor/ana_cmpr_driver_v5.2' into 'release/v5.2'

refactor(ana_cmpr): enhanced the driver implementation (v5.2)

See merge request espressif/esp-idf!38406
This commit is contained in:
morris
2025-04-15 19:07:07 +08:00
10 changed files with 40 additions and 28 deletions

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -119,7 +119,7 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
ANA_CMPR_NULL_POINTER_CHECK(ret_cmpr);
ana_cmpr_unit_t unit = config->unit;
ANA_CMPR_UNIT_CHECK(unit);
ESP_RETURN_ON_FALSE(config->intr_priority >= 0 && config->intr_priority <= 7, ESP_ERR_INVALID_ARG, TAG, "interrupt priority should be within 0~7");
ESP_RETURN_ON_FALSE(config->intr_priority >= 0 && config->intr_priority <= 3, ESP_ERR_INVALID_ARG, TAG, "interrupt priority should be within 0~3");
ESP_RETURN_ON_FALSE(!s_ana_cmpr[unit], ESP_ERR_INVALID_STATE, TAG,
"unit has been allocated already");
esp_err_t ret = ESP_OK;
@ -134,6 +134,7 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
s_ana_cmpr[unit]->intr_priority = config->intr_priority;
s_ana_cmpr[unit]->is_enabled = false;
s_ana_cmpr[unit]->pm_lock = NULL;
s_ana_cmpr[unit]->unit = unit;
#if CONFIG_PM_ENABLE
/* Create PM lock */
@ -163,6 +164,9 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
#endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
/* Record the interrupt mask, the interrupt will be lazy installed when register the callbacks */
s_ana_cmpr[unit]->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(s_ana_cmpr[unit]->dev, config->cross_type);
// disable the interrupt by default, and clear pending status
analog_cmpr_ll_enable_intr(s_ana_cmpr[unit]->dev, ANALOG_CMPR_LL_ALL_INTR_MASK(unit), false);
analog_cmpr_ll_clear_intr(s_ana_cmpr[unit]->dev, ANALOG_CMPR_LL_ALL_INTR_MASK(unit));
portEXIT_CRITICAL(&s_spinlock);
if (config->ref_src == ANA_CMPR_REF_SRC_INTERNAL) {

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -15,7 +15,6 @@ extern "C" {
/**
* @brief Analog comparator unit configuration
*
*/
typedef struct {
ana_cmpr_unit_t unit; /*!< Analog comparator unit */
@ -28,8 +27,8 @@ typedef struct {
* for external reference, the reference signal should be connect to `ANA_CMPRx_EXT_REF_GPIO`
*/
ana_cmpr_cross_type_t cross_type; /*!< The crossing types that can trigger interrupt */
int intr_priority; /*!< The interrupt priority, range 0~7, if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3)
* otherwise the larger the higher, 7 is NMI */
int intr_priority; /*!< The interrupt priority, range 1~3.
If set to 0, the driver will automatically select a relative low priority (1,2,3) */
struct {
uint32_t io_loop_back:1; /*!< Enable this field when the other signals that output on the comparision pins are supposed to be fed back.
* Normally used for debug/test scenario */
@ -38,7 +37,6 @@ typedef struct {
/**
* @brief Analog comparator internal reference configuration
*
*/
typedef struct {
ana_cmpr_ref_voltage_t ref_volt; /*!< The internal reference voltage. It can be specified to a certain fixed percentage of
@ -48,15 +46,12 @@ typedef struct {
/**
* @brief Analog comparator debounce filter configuration
*
*/
typedef struct {
uint32_t wait_us; /*!< The wait time of re-enabling the interrupt after the last triggering,
* it is used to avoid the spurious triggering while the source signal crossing the reference signal.
* The value should regarding how fast the source signal changes, e.g., a rapid signal requires
* a small wait time, otherwise the next crosses may be missed.
* (Unit: micro second)
*/
uint32_t wait_us; /*!< The wait time to prevent frequent interrupts caused by signal noise or bouncing.
During the specified wait_us period, no new interrupts will be triggered.
Set the value according to the signal characteristics. A rapid signal requires a small wait time,
otherwise the next cross event may be missed. */
} ana_cmpr_debounce_config_t;
/**

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@ -8,5 +8,5 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS "."
PRIV_REQUIRES unity driver
PRIV_REQUIRES unity driver esp_pm
WHOLE_ARCHIVE)

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@ -1,12 +1,12 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "test_ana_cmpr.h"
TEST_CASE("ana_cmpr_unit_install_uninstall", "[ana_cmpr]")
TEST_CASE("ana_cmpr unit install/uninstall", "[ana_cmpr]")
{
ana_cmpr_handle_t cmpr = NULL;
ana_cmpr_config_t config = {
@ -45,10 +45,11 @@ TEST_CASE("ana_cmpr_unit_install_uninstall", "[ana_cmpr]")
config.ref_src = ANA_CMPR_REF_SRC_EXTERNAL;
TEST_ESP_OK(ana_cmpr_new_unit(&config, &cmpr));
TEST_ESP_ERR(ESP_ERR_INVALID_STATE, ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
TEST_ESP_ERR(ESP_ERR_INVALID_ARG, ana_cmpr_del_unit(NULL));
TEST_ESP_OK(ana_cmpr_del_unit(cmpr));
}
TEST_CASE("ana_cmpr_internal_reference", "[ana_cmpr]")
TEST_CASE("ana_cmpr internal reference", "[ana_cmpr]")
{
int src_chan = test_init_src_chan_gpio();
@ -67,7 +68,7 @@ TEST_CASE("ana_cmpr_internal_reference", "[ana_cmpr]")
};
TEST_ESP_OK(ana_cmpr_set_internal_reference(cmpr, &ref_cfg));
ana_cmpr_debounce_config_t dbc_cfg = {
.wait_us = 10.0,
.wait_us = 10,
};
TEST_ESP_OK(ana_cmpr_set_debounce(cmpr, &dbc_cfg));
ana_cmpr_event_callbacks_t cbs = {

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -13,6 +13,11 @@
#include "esp_rom_sys.h"
#include "soc/soc_caps.h"
#include "driver/ana_cmpr.h"
#include "driver/gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Test default on cross callback
@ -41,3 +46,7 @@ int test_init_src_chan_gpio(void);
* @param val 0 to set low, others to set high
*/
void test_simulate_src_signal(int src_chan, uint32_t val);
#ifdef __cplusplus
}
#endif

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@ -1,11 +1,10 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "test_ana_cmpr.h"
#include "unity_test_utils.h"
#include "unity_test_utils_cache.h"
typedef struct {
@ -33,7 +32,7 @@ static void IRAM_ATTR test_ana_cmpr_iram_safety(void *args)
ana_cmpr_set_cross_type(data->handle, ANA_CMPR_CROSS_POS);
}
TEST_CASE("ana_cmpr_internal_reference_iram_safe", "[ana_cmpr]")
TEST_CASE("ana_cmpr works with cache disabled", "[ana_cmpr]")
{
test_ana_cmpr_data_t test_data = {
.handle = NULL,

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -17,7 +17,7 @@ static size_t before_free_32bit;
static void check_leak(size_t before_free, size_t after_free, const char *type)
{
ssize_t delta = after_free - before_free;
printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\\n", type, before_free, after_free, delta);
printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta);
TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak");
}

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@ -1,5 +1,6 @@
CONFIG_PM_ENABLE=y
CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
CONFIG_PM_DFS_INIT_AUTO=y
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

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@ -14,6 +14,8 @@
#define ANALOG_CMPR_LL_GET_HW(unit) (&ANALOG_CMPR[unit])
#define ANALOG_CMPR_LL_EVENT_CROSS (1 << 0)
#define ANALOG_CMPR_LL_ALL_INTR_MASK(unit) (ANALOG_CMPR_LL_EVENT_CROSS)
#ifdef __cplusplus
extern "C" {
#endif

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@ -18,11 +18,12 @@ extern "C" {
#define ANALOG_CMPR_LL_GET_HW(unit) (&ANALOG_CMPR[unit])
#define ANALOG_CMPR_LL_GET_UNIT(hw) ((hw) == (&ANALOG_CMPR[0]) ? 0 : 1)
#define ANALOG_CMPR_LL_EVENT_CROSS (1 << 0)
#define ANALOG_CMPR_LL_ETM_EVENTS_PER_UNIT (2)
#define ANALOG_CMPR_LL_NEG_CROSS_MASK(unit) (1UL << ((int)unit * 3))
#define ANALOG_CMPR_LL_NEG_CROSS_MASK(unit) (1UL << ((int)unit * 3 + 0))
#define ANALOG_CMPR_LL_POS_CROSS_MASK(unit) (1UL << ((int)unit * 3 + 1))
#define ANALOG_CMPR_LL_ANY_CROSS_MASK(unit) (1UL << ((int)unit * 3 + 2))
#define ANALOG_CMPR_LL_ALL_INTR_MASK(unit) (ANALOG_CMPR_LL_NEG_CROSS_MASK(unit) | ANALOG_CMPR_LL_POS_CROSS_MASK(unit) | ANALOG_CMPR_LL_ANY_CROSS_MASK(unit))
#define ANALOG_CMPR_LL_ETM_SOURCE(unit, type) (GPIO_EVT_ZERO_DET_POS0 + (unit) * 2 + (type))