espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-29 18:27:20 +02:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'rebase/add_ble_version_support_for_c6_eco1' into 'release/v5.1'

Browse Source 
ble:add version num support for esp32c6 chip v5.1

See merge request espressif/esp-idf!23610
This commit is contained in:
Island
2023-07-04 12:03:36 +08:00
parent e70c174643 3d181f5346
commit d4bfed373e
3 changed files with 12 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
components/bt/controller/esp32c6/bt.c
View File

@ -50,6 +50,8 @@
#include "esp_private/periph_ctrl.h"
#include "esp_sleep.h"
#include "hal/efuse_hal.h"
/* Macro definition
************************************************************************
*/
@ -586,6 +588,7 @@ void controller_sleep_deinit(void)
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
{
uint8_t mac[6];
uint32_t chip_version;
esp_err_t ret = ESP_OK;
ble_npl_count_info_t npl_info;
@ -647,7 +650,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
/* Enable BT-related clocks */
modem_clock_module_enable(PERIPH_BT_MODULE);
modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, 249);
chip_version = efuse_hal_chip_revision();
if (chip_version == 0) {
modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (160 - 1));
} else{
modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (2 - 1));
}
esp_phy_modem_init();
esp_phy_enable();
esp_btbb_enable();

4
components/bt/include/esp32c6/include/esp_bt.h
View File

@ -15,6 +15,7 @@
#include "nimble/nimble_npl.h"
#include "esp_bt_cfg.h"
#include "hal/efuse_hal.h"
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#include "driver/uart.h"
@ -23,7 +24,6 @@
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Bluetooth mode for controller enable/disable
*/
@ -258,7 +258,7 @@ typedef struct {
.dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \
.ble_scan_classify_filter_enable = 0, \
.main_xtal_freq = CONFIG_XTAL_FREQ, \
.version_num = 0, \
.version_num = efuse_hal_chip_revision(), \
.cpu_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, \
.ignore_wl_for_direct_adv = 0, \
.enable_pcl = DEFAULT_BT_LE_POWER_CONTROL_ENABLED, \

2
components/bt/include/esp32c6/include/esp_bt_cfg.h
View File

@ -196,7 +196,7 @@ extern "C" {
#define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000)
#define RTC_FREQ_N (160000) /* in Hz */
#define RTC_FREQ_N (250000) /* in Hz */
#define BLE_LL_TX_PWR_DBM_N (9)