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Merge branch 'bugfix/enable_additional_lp_io_wakeup' into 'master'

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fix(lp_io): enable setting edge type wakeup sources for targets that support this

See merge request espressif/esp-idf!35122
This commit is contained in:
Marius Vikhammer
2024-12-26 10:41:23 +08:00
parent fc45b4ffbe c35f188efb
commit d8de8c6e40
11 changed files with 23 additions and 4 deletions
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2
components/esp_driver_gpio/src/rtc_io.c
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@@ -254,9 +254,11 @@ esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num)
esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
#if !SOC_RTCIO_EDGE_WAKE_SUPPORTED
if (intr_type == GPIO_INTR_POSEDGE || intr_type == GPIO_INTR_NEGEDGE || intr_type == GPIO_INTR_ANYEDGE) {
return ESP_ERR_INVALID_ARG; // Dont support this mode.
}
#endif //!SOC_RTCIO_EDGE_WAKE_SUPPORTED
RTCIO_ENTER_CRITICAL();
rtcio_hal_wakeup_enable(rtc_io_number_get(gpio_num), intr_type);
RTCIO_EXIT_CRITICAL();

4
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
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@@ -571,6 +571,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32c5/include/soc/soc_caps.h
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@@ -245,6 +245,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@@ -555,6 +555,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32c6/include/soc/soc_caps.h
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@@ -230,6 +230,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
View File

@@ -463,6 +463,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32c61/include/soc/soc_caps.h
View File

@@ -206,6 +206,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

4
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
View File

@@ -711,6 +711,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32p4/include/soc/soc_caps.h
View File

@@ -275,6 +275,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

2
examples/system/ulp/lp_core/gpio_wakeup/main/lp_core_gpio_wake_up_example_main.c
View File

@@ -34,7 +34,7 @@ static void wakeup_gpio_init(void)
rtc_gpio_set_direction(WAKEUP_PIN, RTC_GPIO_MODE_INPUT_ONLY);
rtc_gpio_pulldown_dis(WAKEUP_PIN);
rtc_gpio_pullup_en(WAKEUP_PIN);
rtc_gpio_wakeup_enable(WAKEUP_PIN, GPIO_INTR_LOW_LEVEL);
rtc_gpio_wakeup_enable(WAKEUP_PIN, GPIO_INTR_NEGEDGE);
}
void app_main(void)

3
examples/system/ulp/lp_core/gpio_wakeup/main/ulp/main.c
View File

@@ -14,9 +14,6 @@ int main (void)
{
ulp_lp_core_wakeup_main_processor();
/* Wakeup interrupt is a level interrupt, wait 1 sec to
allow user to release button to avoid waking up the ULP multiple times */
ulp_lp_core_delay_us(1000*1000);
ulp_lp_core_gpio_clear_intr_status();
return 0;