mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-05 13:44:32 +02:00
esp_system: create ld template to abstract few common settings
PMS aware chips require prefetch padding size for instruction fetch, or some memory alignment considerations. These settings are now exposed through kconfig options (hidden) and used through common ld template. This shall help to add and manage future chips support easily for these considerations. Closes IDF-3624
This commit is contained in:
@@ -113,9 +113,15 @@ menu "ESP System Settings"
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menu "Memory protection"
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config ESP_SYSTEM_MEMPROT_DEPCHECK
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bool
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default y if IDF_TARGET_ESP32S2
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default y if IDF_TARGET_ESP32C3
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default y if IDF_TARGET_ESP32H2
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config ESP_SYSTEM_MEMPROT_FEATURE
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bool "Enable memory protection"
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depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32H2
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depends on ESP_SYSTEM_MEMPROT_DEPCHECK
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default "y"
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help
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If enabled, the permission control module watches all the memory access and fires the panic handler
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@@ -133,6 +139,20 @@ menu "ESP System Settings"
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Once locked, memory protection settings cannot be changed anymore.
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The lock is reset only on the chip startup.
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config ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE
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# Hidden option for linker script usage
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int
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depends on ESP_SYSTEM_MEMPROT_DEPCHECK
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default 16
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config ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE
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# Hidden option for linker script usage
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int
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depends on ESP_SYSTEM_MEMPROT_DEPCHECK
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default 4 if IDF_TARGET_ESP32S2
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default 256 if IDF_TARGET_ESP32S3
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default 512
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endmenu # Memory protection
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config ESP_SYSTEM_EVENT_QUEUE_SIZE
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@@ -53,7 +53,7 @@ $(COMPONENT_LIBRARY): $(ld_output)
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$(ld_output): $(ld_input) ../include/sdkconfig.h
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mkdir -p $(COMPONENT_BUILD_DIR)/ld
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$(CC) -I ../include -C -P -x c -E $< -o $@
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$(CC) -I ../include -I $(COMPONENT_PATH)/ld -C -P -x c -E $< -o $@
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COMPONENT_EXTRA_CLEAN := $(ld_output) $(sections_ld)
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endif
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@@ -20,6 +20,7 @@
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to simple macros with numeric values, and/or #if/#endif blocks.
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*/
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#include "sdkconfig.h"
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#include "ld.common"
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/* If BT is not built at all */
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#ifndef CONFIG_BT_RESERVE_DRAM
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@@ -349,7 +349,7 @@ SECTIONS
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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. += _esp_flash_mmap_prefetch_pad_size;
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_text_end = ABSOLUTE(.);
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_etext = .;
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@@ -1,3 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* ESP32-C3 Linker Script Memory Layout
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* This file describes the memory layout (memory blocks) by virtual memory addresses.
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@@ -7,6 +13,7 @@
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*/
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#include "sdkconfig.h"
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#include "ld.common"
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#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
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#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
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@@ -1,3 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Default entry point */
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ENTRY(call_start_cpu0);
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@@ -228,7 +234,7 @@ SECTIONS
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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. += _esp_flash_mmap_prefetch_pad_size;
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_text_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.);
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@@ -368,9 +374,9 @@ SECTIONS
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/* Marks the end of IRAM code segment */
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.iram0.text_end (NOLOAD) :
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{
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/* C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
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. += 16;
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. = ALIGN (0x200);
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/* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
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. += _esp_memprot_prefetch_pad_size;
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. = ALIGN(_esp_memprot_align_size);
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/* iram_end_test section exists for use by memprot unit tests only */
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*(.iram_end_test)
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_iram_text_end = ABSOLUTE(.);
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@@ -1,3 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* ESP32-H2 Linker Script Memory Layout
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* This file describes the memory layout (memory blocks) by virtual memory addresses.
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@@ -7,6 +13,7 @@
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*/
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#include "sdkconfig.h"
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#include "ld.common"
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#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
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#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
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@@ -1,3 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Default entry point */
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ENTRY(call_start_cpu0);
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@@ -365,8 +371,9 @@ SECTIONS
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/* Marks the end of IRAM code segment */
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.iram0.text_end (NOLOAD) :
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{
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/* C3 memprot requires 512 B alignment for split lines */
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. = ALIGN (0x200);
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/* ESP32-H2 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
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. += _esp_memprot_prefetch_pad_size;
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. = ALIGN(_esp_memprot_align_size);
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/* iram_end_test section exists for use by memprot unit tests only */
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*(.iram_end_test)
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_iram_text_end = ABSOLUTE(.);
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@@ -13,6 +13,7 @@
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Restrict to simple macros with numeric values, and/or #if/#endif blocks.
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*/
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#include "sdkconfig.h"
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#include "ld.common"
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#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
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#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
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@@ -1,3 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Default entry point: */
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ENTRY(call_start_cpu0);
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@@ -177,7 +183,7 @@ SECTIONS
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_coredump_iram_end = 0;
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/* align + add 16B for CPU dummy speculative instr. fetch */
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. = ALIGN(4) + 16;
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. = ALIGN(_esp_memprot_align_size) + _esp_memprot_prefetch_pad_size;
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/* iram_end_test section exists for use by memprot unit tests only */
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*(.iram_end_test)
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_iram_text_end = ABSOLUTE(.);
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@@ -363,7 +369,7 @@ SECTIONS
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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. += _esp_flash_mmap_prefetch_pad_size;
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_text_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.);
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@@ -12,6 +12,7 @@
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*/
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#include "sdkconfig.h"
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#include "ld.common"
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#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
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#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
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@@ -1,3 +1,9 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Default entry point */
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ENTRY(call_start_cpu0);
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@@ -264,7 +270,7 @@ SECTIONS
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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. += _esp_flash_mmap_prefetch_pad_size;
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_text_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.);
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@@ -376,7 +382,11 @@ SECTIONS
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/* Marks the end of IRAM code segment */
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.iram0.text_end (NOLOAD) :
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{
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. = ALIGN (4);
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/* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
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. += _esp_memprot_prefetch_pad_size;
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. = ALIGN(_esp_memprot_align_size);
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/* iram_end_test section exists for use by memprot unit tests only */
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*(.iram_end_test)
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_iram_text_end = ABSOLUTE(.);
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} > iram0_0_seg
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@@ -22,7 +22,8 @@ idf_build_get_property(config_dir CONFIG_DIR)
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# Preprocess memory.ld.in linker script to include configuration, becomes memory.ld
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add_custom_command(
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OUTPUT ${ld_output}
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COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o ${ld_output} -I ${config_dir} ${ld_input}
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COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o ${ld_output} -I ${config_dir}
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-I "${CMAKE_CURRENT_LIST_DIR}" ${ld_input}
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MAIN_DEPENDENCY ${ld_input}
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DEPENDS ${sdkconfig_header}
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COMMENT "Generating memory.ld linker script..."
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24
components/esp_system/ld/ld.common
Normal file
24
components/esp_system/ld/ld.common
Normal file
@@ -0,0 +1,24 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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/* CPU instruction prefetch padding size for flash mmap scenario */
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_esp_flash_mmap_prefetch_pad_size = 16;
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/* CPU instruction prefetch padding size for memory protection scenario */
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#ifdef CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE
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_esp_memprot_prefetch_pad_size = CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE;
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#else
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_esp_memprot_prefetch_pad_size = 0;
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#endif
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/* Memory alignment size for PMS */
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#ifdef CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE
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_esp_memprot_align_size = CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE;
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#else
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_esp_memprot_align_size = 0;
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#endif
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