spi_flash: add support for 32Mbit address GD flash, for GD25Q256

components/spi_flash/esp_flash_api.c

@@ -215,6 +215,16 @@ esp_err_t IRAM_ATTR esp_flash_init(esp_flash_t *chip)
         return err;
     }
 
+    if (chip->chip_drv->get_chip_caps == NULL) {
+        // chip caps get failed, pass the flash capability check.
+        ESP_EARLY_LOGW(TAG, "get_chip_caps function pointer hasn't been initialized");
+    } else {
+        if (((chip->chip_drv->get_chip_caps(chip) & SPI_FLASH_CHIP_CAP_32MB_SUPPORT) == 0) && (size > (16 *1024 * 1024))) {
+            ESP_EARLY_LOGW(TAG, "Detected flash size > 16 MB, but access beyond 16 MB is not supported for this flash model yet.");
+            size = (16 * 1024 * 1024);
+        }
+    }
+
     ESP_LOGI(TAG, "flash io: %s", io_mode_str[chip->read_mode]);
     err = rom_spiflash_api_funcs->start(chip);
     if (err != ESP_OK) {
@@ -358,6 +368,7 @@ esp_err_t IRAM_ATTR esp_flash_get_size(esp_flash_t *chip, uint32_t *out_size)
     err = chip->chip_drv->detect_size(chip, &detect_size);
     if (err == ESP_OK) {
         chip->size = detect_size;
+        *out_size = chip->size;
     }
     return rom_spiflash_api_funcs->end(chip, err);
 }
@@ -837,6 +848,14 @@ IRAM_ATTR esp_err_t esp_flash_set_io_mode(esp_flash_t* chip, bool qe)
 esp_err_t esp_flash_suspend_cmd_init(esp_flash_t* chip)
 {
     ESP_EARLY_LOGW(TAG, "Flash suspend feature is enabled");
+    if (chip->chip_drv->get_chip_caps == NULL) {
+        // chip caps get failed, pass the flash capability check.
+        ESP_EARLY_LOGW(TAG, "get_chip_caps function pointer hasn't been initialized");
+    } else {
+        if ((chip->chip_drv->get_chip_caps(chip) & SPI_FLASH_CHIP_CAP_SUSPEND) == 0) {
+            ESP_EARLY_LOGW(TAG, "Suspend and resume may not supported for this flash model yet.");
+        }
+    }
     return chip->chip_drv->sus_setup(chip);
 }
 

components/spi_flash/include/spi_flash_chip_driver.h

@@ -14,6 +14,7 @@
 
 #pragma once
 #include "esp_flash.h"
+#include "esp_attr.h"
 
 struct esp_flash_t;
 typedef struct esp_flash_t esp_flash_t;
@@ -33,6 +34,12 @@ typedef enum {
     SPI_FLASH_REG_STATUS = 1,
 } spi_flash_register_t;
 
+typedef enum {
+   SPI_FLASH_CHIP_CAP_SUSPEND = BIT(0),            ///< Flash chip support suspend feature.
+   SPI_FLASH_CHIP_CAP_32MB_SUPPORT = BIT(1),       ///< Flash chip driver support flash size larger than 32M Bytes.
+} spi_flash_caps_t;
+FLAG_ATTR(spi_flash_caps_t)
+
 /** @brief SPI flash chip driver definition structure.
  *
  * The chip driver structure contains chip-specific pointers to functions to perform SPI flash operations, and some
@@ -188,6 +195,11 @@ struct spi_flash_chip_t {
 
     /** Setup flash suspend configuration. */
     esp_err_t (*sus_setup)(esp_flash_t *chip);
+
+    /**
+     * Get the capabilities of the flash chip. See SPI_FLASH_CHIP_CAP_* macros as reference.
+     */
+    spi_flash_caps_t (*get_chip_caps)(esp_flash_t *chip);
 };
 
 /* Pointer to an array of pointers to all known drivers for flash chips. This array is used

components/spi_flash/include/spi_flash_chip_generic.h

@@ -358,7 +358,7 @@ esp_err_t spi_flash_common_set_io_mode(esp_flash_t *chip, esp_flash_wrsr_func_t
  * transactions. Also prepare the command to be sent in read functions.
  *
  * @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
- * @param addr_32bit Whether 32 bit commands will be used (Currently only W25Q256 is supported)
+ * @param addr_32bit Whether 32 bit commands will be used (Currently only W25Q256 and GD25Q256 are supported)
  *
  * @return
  *      - ESP_OK if success

components/spi_flash/spi_flash_chip_boya.c

@@ -34,6 +34,14 @@ esp_err_t spi_flash_chip_boya_probe(esp_flash_t *chip, uint32_t flash_id)
     return ESP_OK;
 }
 
+spi_flash_caps_t spi_flash_chip_boya_get_caps(esp_flash_t *chip)
+{
+    spi_flash_caps_t caps_flags = 0;
+    // 32-bit-address flash is not supported
+    // flash-suspend is not supported
+    return caps_flags;
+}
+
 static const char chip_name[] = "boya";
 
 // The BOYA chip can use the functions for generic chips except from set read mode and probe,
@@ -71,4 +79,5 @@ const spi_flash_chip_t esp_flash_chip_boya = {
     .read_reg = spi_flash_chip_generic_read_reg,
     .yield = spi_flash_chip_generic_yield,
     .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
+    .get_chip_caps = spi_flash_chip_boya_get_caps,
 };

components/spi_flash/spi_flash_chip_gd.c

@@ -13,10 +13,38 @@
 // limitations under the License.
 
 #include <stdlib.h>
+#include <string.h>
+#include <sys/param.h> // For MIN/MAX
+#include "esp_log.h"
 #include "spi_flash_chip_generic.h"
 #include "spi_flash_chip_gd.h"
 #include "spi_flash_defs.h"
 
+#define ADDR_32BIT(addr)            (addr >= (1<<24))
+
+#define REGION_32BIT(start, len)    ((start) + (len) > (1<<24))
+
+extern esp_err_t spi_flash_chip_winbond_read(esp_flash_t *chip, void *buffer, uint32_t address, uint32_t length);
+extern esp_err_t spi_flash_chip_winbond_page_program(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
+extern esp_err_t spi_flash_chip_winbond_erase_sector(esp_flash_t *chip, uint32_t start_address);
+extern esp_err_t spi_flash_chip_winbond_erase_block(esp_flash_t *chip, uint32_t start_address);
+
+#define spi_flash_chip_gd_read spi_flash_chip_winbond_read
+#define spi_flash_chip_gd_page_program spi_flash_chip_winbond_page_program
+#define spi_flash_chip_gd_erase_sector spi_flash_chip_winbond_erase_sector
+#define spi_flash_chip_gd_erase_block spi_flash_chip_winbond_erase_block
+
+spi_flash_caps_t spi_flash_chip_gd_get_caps(esp_flash_t *chip)
+{
+    spi_flash_caps_t caps_flags = 0;
+    // 32M-bits address support
+    if ((chip->chip_id & 0xFF) >= 0x19) {
+        caps_flags |= SPI_FLASH_CHIP_CAP_32MB_SUPPORT;
+    }
+    // flash-suspend is not supported
+    return caps_flags;
+}
+
 #ifndef CONFIG_SPI_FLASH_ROM_IMPL
 
 #define FLASH_ID_MASK       0xFF00
@@ -86,8 +114,8 @@ const spi_flash_chip_t esp_flash_chip_gd = {
     .reset = spi_flash_chip_generic_reset,
     .detect_size = spi_flash_chip_generic_detect_size,
     .erase_chip = spi_flash_chip_generic_erase_chip,
-    .erase_sector = spi_flash_chip_generic_erase_sector,
-    .erase_block = spi_flash_chip_generic_erase_block,
+    .erase_sector = spi_flash_chip_gd_erase_sector,
+    .erase_block = spi_flash_chip_gd_erase_block,
     .sector_size = 4 * 1024,
     .block_erase_size = 64 * 1024,
 
@@ -99,9 +127,9 @@ const spi_flash_chip_t esp_flash_chip_gd = {
     .get_protected_regions = NULL,
     .set_protected_regions = NULL,
 
-    .read = spi_flash_chip_generic_read,
+    .read = spi_flash_chip_gd_read,
     .write = spi_flash_chip_generic_write,
-    .program_page = spi_flash_chip_generic_page_program,
+    .program_page = spi_flash_chip_gd_page_program,
     .page_size = 256,
     .write_encrypted = spi_flash_chip_generic_write_encrypted,
 
@@ -112,4 +140,5 @@ const spi_flash_chip_t esp_flash_chip_gd = {
     .read_reg = spi_flash_chip_generic_read_reg,
     .yield = spi_flash_chip_generic_yield,
     .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
+    .get_chip_caps = spi_flash_chip_gd_get_caps,
 };

components/spi_flash/spi_flash_chip_generic.c

@@ -463,6 +463,20 @@ esp_err_t spi_flash_chip_generic_set_io_mode(esp_flash_t *chip)
 }
 #endif // CONFIG_SPI_FLASH_ROM_IMPL
 
+spi_flash_caps_t spi_flash_chip_generic_get_caps(esp_flash_t *chip)
+{
+    // For generic part flash capability, take the XMC chip as reference.
+    spi_flash_caps_t caps_flags = 0;
+    // 32M-bits address support
+
+    // flash suspend support
+    // Only `XMC` support suspend for now.
+    if (chip->chip_id >> 16 == 0x20) {
+        caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
+    }
+    return caps_flags;
+}
+
 static const char chip_name[] = "generic";
 
 const spi_flash_chip_t esp_flash_chip_generic = {
@@ -501,6 +515,7 @@ const spi_flash_chip_t esp_flash_chip_generic = {
     .read_reg = spi_flash_chip_generic_read_reg,
     .yield = spi_flash_chip_generic_yield,
     .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
+    .get_chip_caps = spi_flash_chip_generic_get_caps,
 };
 
 #ifndef CONFIG_SPI_FLASH_ROM_IMPL

components/spi_flash/spi_flash_chip_issi.c

@@ -58,6 +58,14 @@ esp_err_t spi_flash_chip_issi_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t
     return ret;
 }
 
+spi_flash_caps_t spi_flash_chip_issi_get_caps(esp_flash_t *chip)
+{
+    spi_flash_caps_t caps_flags = 0;
+    // 32-bit-address flash is not supported
+    // flash-suspend is not supported
+    return caps_flags;
+}
+
 static const char chip_name[] = "issi";
 
 // The issi chip can use the functions for generic chips except from set read mode and probe,
@@ -95,4 +103,5 @@ const spi_flash_chip_t esp_flash_chip_issi = {
     .read_reg = spi_flash_chip_generic_read_reg,
     .yield = spi_flash_chip_generic_yield,
     .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
+    .get_chip_caps = spi_flash_chip_issi_get_caps,
 };

components/spi_flash/spi_flash_chip_mxic.c

@@ -39,6 +39,14 @@ esp_err_t spi_flash_chip_issi_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t
 
 static const char chip_name[] = "mxic";
 
+spi_flash_caps_t spi_flash_chip_mxic_get_caps(esp_flash_t *chip)
+{
+    spi_flash_caps_t caps_flags = 0;
+    // 32-bit-address flash is not supported
+    // flash-suspend is not supported
+    return caps_flags;
+}
+
 // The mxic chip can use the functions for generic chips except from set read mode and probe,
 // So we only replace these two functions.
 const spi_flash_chip_t esp_flash_chip_mxic = {
@@ -74,4 +82,5 @@ const spi_flash_chip_t esp_flash_chip_mxic = {
     .read_reg = spi_flash_chip_mxic_read_reg,
     .yield = spi_flash_chip_generic_yield,
     .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
+    .get_chip_caps = spi_flash_chip_mxic_get_caps,
 };

components/spi_flash/spi_flash_chip_winbond.c

@@ -76,18 +76,22 @@ esp_err_t spi_flash_chip_winbond_read(esp_flash_t *chip, void *buffer, uint32_t
 
 esp_err_t spi_flash_chip_winbond_page_program(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length)
 {
-    esp_err_t err;
+    esp_err_t err = ESP_OK;
+    bool addr_4b = ADDR_32BIT(address);
+    // Separate the behaviour of 4B address and not 4B address to decline the influnece for performance.
+    if (addr_4b) {
+        err = chip->chip_drv->wait_idle(chip, chip->chip_drv->timeout->idle_timeout);
+        if (err == ESP_OK) {
+            // Perform the actual Page Program command
+            err = spi_flash_command_winbond_program_4B(chip, buffer, address, length);
+            if (err != ESP_OK) {
+                return err;
+            }
 
-    err = chip->chip_drv->wait_idle(chip, chip->chip_drv->timeout->idle_timeout);
-
-    if (err == ESP_OK) {
-        // Perform the actual Page Program command
-        err = spi_flash_command_winbond_program_4B(chip, buffer, address, length);
-        if (err != ESP_OK) {
-            return err;
+            err = chip->chip_drv->wait_idle(chip, chip->chip_drv->timeout->page_program_timeout);
         }
-
-        err = chip->chip_drv->wait_idle(chip, chip->chip_drv->timeout->page_program_timeout);
+    } else {
+        spi_flash_chip_generic_page_program(chip, buffer, address, length);
     }
     return err;
 }
@@ -140,6 +144,17 @@ esp_err_t spi_flash_chip_winbond_erase_block(esp_flash_t *chip, uint32_t start_a
     return err;
 }
 
+spi_flash_caps_t spi_flash_chip_winbond_get_caps(esp_flash_t *chip)
+{
+    spi_flash_caps_t caps_flags = 0;
+    // 32M-bits address support
+    if ((chip->chip_id & 0xFF) >= 0x19) {
+        caps_flags |= SPI_FLASH_CHIP_CAP_32MB_SUPPORT;
+    }
+    // flash-suspend is not supported
+    return caps_flags;
+}
+
 static const char chip_name[] = "winbond";
 
 // The issi chip can use the functions for generic chips except from set read mode and probe,
@@ -177,15 +192,15 @@ const spi_flash_chip_t esp_flash_chip_winbond = {
     .read_reg = spi_flash_chip_generic_read_reg,
     .yield = spi_flash_chip_generic_yield,
     .sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
+    .get_chip_caps = spi_flash_chip_winbond_get_caps,
 };
 
 
 static esp_err_t spi_flash_command_winbond_program_4B(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length)
 {
-    bool addr_4b = ADDR_32BIT(address);
     spi_flash_trans_t t = {
-        .command = (addr_4b? CMD_PROGRAM_PAGE_4B: CMD_PROGRAM_PAGE),
-        .address_bitlen = (addr_4b? 32: 24),
+        .command = (CMD_PROGRAM_PAGE_4B),
+        .address_bitlen = 32,
         .address = address,
         .mosi_len = length,
         .mosi_data = buffer,

docs/en/api-reference/storage/spi_flash.rst

@@ -42,6 +42,7 @@ The Quad mode (QIO/QOUT) the following chip types are supported:
 The 32-bit address range of following chip type is supported:
 
 1. W25Q256
+2. GD25Q256
 
 Initializing a flash device
 ---------------------------