espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-04 13:14:32 +02:00
Code Issues Packages Projects Releases Wiki Activity

change(sysview): set default core name as core0

Browse Source
This commit is contained in:
Erhan Kurubas
2025-06-11 22:18:53 +02:00
committed by BOT
parent a01bd5070b
commit e8d5bdd51c
1 changed files with 2 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
components/app_trace/sys_view/Sample/FreeRTOSV10.4/Config/esp/SEGGER_SYSVIEW_Config_FreeRTOS.c
View File

@@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: BSD-1-Clause * SPDX-License-Identifier: BSD-1-Clause
* *
* SPDX-FileContributor: 2017-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileContributor: 2017-2025 Espressif Systems (Shanghai) CO LTD
*/ */
/********************************************************************* /*********************************************************************
* SEGGER Microcontroller GmbH * * SEGGER Microcontroller GmbH *
@@ -83,11 +83,7 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
// The target device name // The target device name
#define SYSVIEW_DEVICE_NAME CONFIG_IDF_TARGET #define SYSVIEW_DEVICE_NAME CONFIG_IDF_TARGET
// The target core name // The target core name
#if CONFIG_IDF_TARGET_ARCH_XTENSA #define SYSVIEW_CORE_NAME "core0" // In dual core, this will be renamed by OpenOCD as core1
#define SYSVIEW_CORE_NAME "xtensa"
#elif CONFIG_IDF_TARGET_ARCH_RISCV
#define SYSVIEW_CORE_NAME "riscv"
#endif
// Determine which timer to use as timestamp source // Determine which timer to use as timestamp source
#if CONFIG_APPTRACE_SV_TS_SOURCE_CCOUNT #if CONFIG_APPTRACE_SV_TS_SOURCE_CCOUNT