System/memprot: ESP32C3 IRAM section alignment fix (LD)

IRAM section didn't contain sufficient padding for possible CPU instruction prefetch,
ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module.
This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words)

Closes IDF-3554
This commit is contained in:
Martin Vychodil
2021-07-25 12:39:48 +02:00
parent 75940e9364
commit e9dc39730f

View File

@ -392,7 +392,8 @@ SECTIONS
/* Marks the end of IRAM code segment */
.iram0.text_end (NOLOAD) :
{
/* C3 memprot requires 512 B alignment for split lines */
/* C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
. += 16;
. = ALIGN (0x200);
/* iram_end_test section exists for use by memprot unit tests only */
*(.iram_end_test)