espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-02 20:24:32 +02:00
Code Issues Packages Projects Releases Wiki Activity

driver: test: Ensure UART is fully idle before starting loopback RX/TX test

Browse Source 
Possible fix for sporadic failures of this test in CI, may be due to a byte already
being queued in one of the FIFOs
This commit is contained in:
Angus Gratton
2019-12-12 17:20:39 +11:00
committed by Angus Gratton
parent b79a6c2576
commit ee7cd4e1d8
1 changed files with 5 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
components/driver/test/test_uart.c
View File

@@ -250,6 +250,11 @@ TEST_CASE("uart read write test", "[uart]")
TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 20, NULL, 0));
TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
TEST_ESP_OK(uart_set_loop_back(uart_num, true));
TEST_ESP_OK(uart_wait_tx_done(uart_num, portMAX_DELAY));
vTaskDelay(1 / portTICK_PERIOD_MS); // make sure last byte has flushed from TX FIFO
TEST_ESP_OK(uart_flush_input(uart_num));
xTaskCreate(uart_write_task, "uart_write_task", 2048 * 4, (void *)uart_num, 5, NULL);
int len_tmp = 0;
int rd_len = 1024;