fast_gpio: support esp32c2/esp8684

This commit is contained in:
morris
2021-12-24 11:10:38 +08:00
parent 1a9dbf9e2f
commit f028107359
8 changed files with 74 additions and 21 deletions

View File

@@ -4,7 +4,6 @@ set(srcs
"gpio.c"
"i2c.c"
"ledc.c"
"pcnt.c"
"periph_ctrl.c"
"rtc_io.c"
"rtc_module.c"
@@ -38,14 +37,25 @@ if(CONFIG_SOC_DEDICATED_GPIO_SUPPORTED)
list(APPEND srcs "dedic_gpio.c")
endif()
if(CONFIG_SOC_SIGMADELTA_SUPPORTED)
list(APPEND srcs "sigmadelta.c")
endif()
if(CONFIG_SOC_RMT_SUPPORTED)
list(APPEND srcs "rmt.c")
endif()
if(CONFIG_SOC_PCNT_SUPPORTED)
list(APPEND srcs "pcnt.c")
endif()
if(${target} STREQUAL "esp32")
# SDMMC and MCPWM are in ESP32 only.
list(APPEND srcs "dac_common.c"
"sdio_slave.c"
"sdmmc_host.c"
"i2s.c"
"rmt.c"
"sigmadelta.c"
"sdmmc_transaction.c"
"touch_sensor_common.c"
"esp32/touch_sensor.c"
@@ -59,9 +69,7 @@ if(IDF_TARGET STREQUAL "esp32s2")
list(APPEND srcs "dac_common.c"
"spi_slave_hd.c"
"touch_sensor_common.c"
"sigmadelta.c"
"i2s.c"
"rmt.c"
"twai.c"
"esp32s2/rtc_tempsensor.c"
"esp32s2/touch_sensor.c"
@@ -74,8 +82,6 @@ endif()
if(${target} STREQUAL "esp32s3")
list(APPEND srcs "sdmmc_host.c"
"sdmmc_transaction.c"
"rmt.c"
"sigmadelta.c"
"usb_serial_jtag.c"
"spi_slave_hd.c"
"touch_sensor_common.c"
@@ -88,8 +94,6 @@ if(IDF_TARGET STREQUAL "esp32c3")
list(APPEND srcs "spi_slave_hd.c"
"usb_serial_jtag.c"
"i2s.c"
"rmt.c"
"sigmadelta.c"
"esp32c3/adc2_init_cal.c"
"esp32c3/rtc_tempsensor.c"
"twai.c")
@@ -98,15 +102,12 @@ endif()
if(IDF_TARGET STREQUAL "esp32h2")
list(APPEND srcs "spi_slave_hd.c"
"i2s.c"
"rmt.c"
"sigmadelta.c"
"esp32h2/rtc_tempsensor.c"
"twai.c")
endif()
if(IDF_TARGET STREQUAL "esp8684")
list(APPEND srcs "gdma.c"
"spi_slave_hd.c")
list(APPEND srcs "spi_slave_hd.c")
endif()
idf_component_register(SRCS "${srcs}"

View File

@@ -12,8 +12,6 @@
#include "esp_attr.h"
#include "soc/soc_caps.h"
#if SOC_DEDICATED_GPIO_SUPPORTED
#ifdef __cplusplus
extern "C" {
#endif
@@ -165,5 +163,3 @@ esp_err_t dedic_gpio_bundle_set_interrupt_and_callback(dedic_gpio_bundle_handle_
#ifdef __cplusplus
}
#endif
#endif //SOC_DEDICATED_GPIO_SUPPORTED

View File

@@ -7,7 +7,6 @@
#include "esp_log.h"
#include "esp_check.h"
#include "soc/soc_caps.h"
#if SOC_PCNT_SUPPORTED
#include "esp_private/periph_ctrl.h"
#include "driver/pcnt.h"
#include "hal/pcnt_hal.h"
@@ -542,5 +541,3 @@ void pcnt_isr_service_uninstall()
{
_pcnt_isr_service_uninstall(PCNT_PORT_0);
}
#endif // #if SOC_PCNT_SUPPORTED

View File

@@ -7,7 +7,6 @@
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "unity.h"
#include "test_utils.h"
#include "esp_rom_sys.h"
#include "soc/soc_caps.h"
#include "hal/cpu_ll.h"

View File

@@ -1,5 +1,6 @@
set(srcs
"adc_periph.c"
"dedic_gpio_periph.c"
"gdma_periph.c"
"gpio_periph.c"
"interrupts.c"

View File

@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/gpio_sig_map.h"
#include "soc/dedic_gpio_periph.h"
const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = {
.module = -1,
.irq = -1,
.cores = {
[0] = {
.in_sig_per_channel = {
[0] = CPU_GPIO_IN0_IDX,
[1] = CPU_GPIO_IN1_IDX,
[2] = CPU_GPIO_IN2_IDX,
[3] = CPU_GPIO_IN3_IDX,
[4] = CPU_GPIO_IN4_IDX,
[5] = CPU_GPIO_IN5_IDX,
[6] = CPU_GPIO_IN6_IDX,
[7] = CPU_GPIO_IN7_IDX,
},
.out_sig_per_channel = {
[0] = CPU_GPIO_OUT0_IDX,
[1] = CPU_GPIO_OUT1_IDX,
[2] = CPU_GPIO_OUT2_IDX,
[3] = CPU_GPIO_OUT3_IDX,
[4] = CPU_GPIO_OUT4_IDX,
[5] = CPU_GPIO_OUT5_IDX,
[6] = CPU_GPIO_OUT6_IDX,
[7] = CPU_GPIO_OUT7_IDX,
}
},
},
};

View File

@@ -11,6 +11,10 @@ config SOC_ADC_SUPPORTED
bool
default y
config SOC_DEDICATED_GPIO_SUPPORTED
bool
default y
config SOC_GDMA_SUPPORTED
bool
default y
@@ -199,6 +203,18 @@ config SOC_GPIO_SUPPORT_SLP_SWITCH
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8
config SOC_DEDIC_GPIO_IN_CHANNELS_NUM
int
default 8
config SOC_DEDIC_PERIPH_ALWAYS_ENABLE
bool
default y
config SOC_I2C_NUM
int
default 1

View File

@@ -12,6 +12,7 @@
#define SOC_CPU_CORES_NUM 1
#define SOC_ADC_SUPPORTED 1
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
#define SOC_BT_SUPPORTED 0 // Enable during bringup, IDF-4357
#define SOC_WIFI_SUPPORTED 0 // Enable during bringup, IDF-3905
@@ -107,6 +108,11 @@
// Support to configure sleep status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */
#define SOC_DEDIC_PERIPH_ALWAYS_ENABLE (1) /*!< The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled */
/*-------------------------- I2C CAPS ----------------------------------------*/
// TODO IDF-3918
#define SOC_I2C_NUM (1U)