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rom, spi_flash: add a patch for esp_flash_erase_region for C3, S3

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Submitted in https://github.com/espressif/esp-idf/pull/7314
Closes https://github.com/espressif/esp-idf/issues/7272
This commit is contained in:
Ivan Grokhotkov
2021-07-24 13:28:25 +02:00
parent 1d933ad02c
commit f4852bc055
5 changed files with 27 additions and 2 deletions
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1
components/esp_rom/esp32c3/esp_rom_caps.h
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@@ -20,3 +20,4 @@
#define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM
#define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking
#define ESP_ROM_USB_SERIAL_DEVICE_NUM (3) // UART uses USB_SERIAL_JTAG port in ROM.
#define ESP_ROM_HAS_ERASE_0_REGION_BUG (1) // ROM has esp_flash_erase_region(size=0) bug

2
components/esp_rom/esp32c3/ld/esp32c3.rom.ld
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@@ -260,7 +260,7 @@ PROVIDE( esp_flash_chip_driver_initialized = 0x400002fc );
PROVIDE( esp_flash_read_id = 0x40000300 );
PROVIDE( esp_flash_get_size = 0x40000304 );
PROVIDE( esp_flash_erase_chip = 0x40000308 );
PROVIDE( esp_flash_erase_region = 0x4000030c );
PROVIDE( rom_esp_flash_erase_region = 0x4000030c );
PROVIDE( esp_flash_get_chip_write_protect = 0x40000310 );
PROVIDE( esp_flash_set_chip_write_protect = 0x40000314 );
PROVIDE( esp_flash_get_protectable_regions = 0x40000318 );

1
components/esp_rom/esp32s3/esp_rom_caps.h
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@@ -20,3 +20,4 @@
#define ESP_ROM_SUPPORT_MULTIPLE_UART (1) // ROM has multiple UARTs available for logging
#define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM
#define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking
#define ESP_ROM_HAS_ERASE_0_REGION_BUG (1) // ROM has esp_flash_erase_region(size=0) bug

2
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
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@@ -470,7 +470,7 @@ PROVIDE ( em_base_reg_lut = 0x3ff08258 );
PROVIDE ( esp_crc8 = 0x40047854 );
PROVIDE ( esp_flash_chip_driver_initialized = 0x4004e88c );
PROVIDE ( esp_flash_erase_chip = 0x4004e998 );
PROVIDE ( esp_flash_erase_region = 0x4004ea00 );
PROVIDE ( rom_esp_flash_erase_region = 0x4004ea00 );
PROVIDE ( esp_flash_get_chip_write_protect = 0x4004eb70 );
PROVIDE ( esp_flash_get_io_mode = 0x4004efa4 );
PROVIDE ( esp_flash_get_protectable_regions = 0x4004ec00 );

23
components/spi_flash/esp_flash_api.c
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@@ -23,6 +23,7 @@
#include "sdkconfig.h"
#include "esp_flash_internal.h"
#include "spi_flash_defs.h"
#include "esp_rom_caps.h"
static const char TAG[] = "spi_flash";
@@ -507,6 +508,28 @@ esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, ui
return rom_spiflash_api_funcs->flash_end_flush_cache(chip, err, bus_acquired, start, len);
}
#endif // !CONFIG_SPI_FLASH_ROM_IMPL
#if defined(CONFIG_SPI_FLASH_ROM_IMPL) && ESP_ROM_HAS_ERASE_0_REGION_BUG
/* ROM esp_flash_erase_region implementation doesn't handle 0 erase size correctly.
* Check the size and call ROM function instead of overriding it completely.
* The behavior is slightly different from esp_flash_erase_region above, thought:
* here the check for 0 size is done first, but in esp_flash_erase_region the check is
* done after the other arguments are checked.
*/
extern esp_err_t rom_esp_flash_erase_region(esp_flash_t *chip, uint32_t start, uint32_t len);
esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, uint32_t len)
{
if (len == 0) {
return ESP_OK;
}
return rom_esp_flash_erase_region(chip, start, len);
}
#endif // defined(CONFIG_SPI_FLASH_ROM_IMPL) && ESP_ROM_HAS_ERASE_0_REGION_BUG
#ifndef CONFIG_SPI_FLASH_ROM_IMPL
esp_err_t IRAM_ATTR esp_flash_get_chip_write_protect(esp_flash_t *chip, bool *out_write_protected)
{
esp_err_t err = rom_spiflash_api_funcs->chip_check(&chip);