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Merge branch 'bugfix/lcd_rgb_pclk_default_to_low_v4.4' into 'release/v4.4'

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lcd: rgb pclk idle default to low && RMT IR protocol example for esp32s3 (v4.4)

See merge request espressif/esp-idf!16211
This commit is contained in:
Michael (XIAO Xufeng)
2021-12-08 07:01:08 +00:00
parent 220a91ae30 7ae887dead
commit f4e5948102
8 changed files with 46 additions and 32 deletions
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0
components/esp_lcd/src/esp_lcd_panel_commands.h → components/esp_lcd/include/esp_lcd_panel_commands.h
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10
components/esp_lcd/include/esp_lcd_panel_rgb.h
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@@ -18,10 +18,10 @@ extern "C" {
#if SOC_LCD_RGB_SUPPORTED
/**
* @brief LCD RGB timing structure
*
* @verbatim
* Total Width
* <--------------------------------------------------->
* Hsync width HBP Active Width HFP
* HSYNC width HBP Active Width HFP
* <---><--><--------------------------------------><--->
* ____ ____|_______________________________________|____|
* |___| | | |
@@ -36,7 +36,7 @@ extern "C" {
* | /|\ | | / / / / / / / / / / / / / / / / / / / | |
* | | | |/ / / / / / / / / / / / / / / / / / / /| |
* Total | | | |/ / / / / / / / / / / / / / / / / / / /| |
* Heigh | | | |/ / / / / / / / / / / / / / / / / / / /| |
* Height | | | |/ / / / / / / / / / / / / / / / / / / /| |
* |Active| | |/ / / / / / / / / / / / / / / / / / / /| |
* |Heigh | | |/ / / / / / Active Display Area / / / /| |
* | | | |/ / / / / / / / / / / / / / / / / / / /| |
@@ -48,7 +48,7 @@ extern "C" {
* | /|\ | |
* | VFP | | |
* \|/ \|/_____|______________________________________________________|
*
* @endverbatim
*/
typedef struct {
unsigned int pclk_hz; /*!< Frequency of pixel clock */
@@ -65,7 +65,7 @@ typedef struct {
unsigned int vsync_idle_low: 1; /*!< The vsync signal is low in IDLE state */
unsigned int de_idle_high: 1; /*!< The de signal is high in IDLE state */
unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
unsigned int pclk_idle_low: 1; /*!< The PCLK stays at low level in IDLE phase */
unsigned int pclk_idle_high: 1; /*!< The PCLK stays at high level in IDLE phase */
} flags;
} esp_lcd_rgb_timing_t;

2
components/esp_lcd/src/esp_lcd_rgb_panel.c
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@@ -250,7 +250,7 @@ static esp_err_t rgb_panel_init(esp_lcd_panel_t *panel)
lcd_ll_set_pixel_clock_prescale(rgb_panel->hal.dev, pclk_prescale);
rgb_panel->timings.pclk_hz = rgb_panel->resolution_hz / pclk_prescale;
// pixel clock phase and polarity
lcd_ll_set_clock_idle_level(rgb_panel->hal.dev, !rgb_panel->timings.flags.pclk_idle_low);
lcd_ll_set_clock_idle_level(rgb_panel->hal.dev, rgb_panel->timings.flags.pclk_idle_high);
lcd_ll_set_pixel_clock_edge(rgb_panel->hal.dev, rgb_panel->timings.flags.pclk_active_neg);
// enable RGB mode and set data width
lcd_ll_enable_rgb_mode(rgb_panel->hal.dev, true);

4
components/hal/esp32s3/include/hal/lcd_ll.h
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@@ -35,7 +35,6 @@ static inline void lcd_ll_set_group_clock_src(lcd_cam_dev_t *dev, lcd_clock_sour
{
// lcd_clk = module_clock_src / (div_num + div_b / div_a)
HAL_ASSERT(div_num >= 2);
dev->lcd_clock.lcd_clk_sel = src;
HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_clock, lcd_clkm_div_num, div_num);
dev->lcd_clock.lcd_clkm_div_a = div_a;
dev->lcd_clock.lcd_clkm_div_b = div_b;
@@ -43,9 +42,6 @@ static inline void lcd_ll_set_group_clock_src(lcd_cam_dev_t *dev, lcd_clock_sour
case LCD_CLK_SRC_PLL160M:
dev->lcd_clock.lcd_clk_sel = 3;
break;
case LCD_CLK_SRC_APLL:
dev->lcd_clock.lcd_clk_sel = 2;
break;
case LCD_CLK_SRC_XTAL:
dev->lcd_clock.lcd_clk_sel = 1;
break;

17
components/hal/include/hal/lcd_types.h
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@@ -13,12 +13,17 @@ extern "C" {
/**
* @brief LCD clock source
* @note User should select the clock source based on the real requirement:
*
* | LCD clock source | Features | Power Management |
* |---------------------|--------------------------|----------------------------|
* | LCD_CLK_SRC_PLL160M | High resolution, fixed | ESP_PM_APB_FREQ_MAX lock |
* | LCD_CLK_SRC_APLL | Configurable resolution | ESP_PM_NO_LIGHT_SLEEP lock |
* | LCD_CLK_SRC_XTAL | Medium resolution, fixed | No PM lock |
* @verbatim embed:rst:leading-asterisk
* +---------------------+-------------------------+----------------------------+
* | LCD clock source | Features | Power Management |
* +=====================+=========================+============================+
* | LCD_CLK_SRC_PLL160M | High resolution | ESP_PM_APB_FREQ_MAX lock |
* +---------------------+-------------------------+----------------------------+
* | LCD_CLK_SRC_APLL | Configurable resolution | ESP_PM_NO_LIGHT_SLEEP lock |
* +---------------------+-------------------------+----------------------------+
* | LCD_CLK_SRC_XTAL | Medium resolution | No PM lock |
* +---------------------+-------------------------+----------------------------+
* @endverbatim
*/
typedef enum {
LCD_CLK_SRC_PLL160M, /*!< Select PLL160M as the source clock */

28
examples/peripherals/rmt/ir_protocols/README.md
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@@ -1,3 +1,5 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-C3 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |
# IR Protocol Example
(See the README.md file in the upper level 'examples' directory for more information about examples.)
@@ -12,31 +14,33 @@ The example supports building and parsing both normal and extended NEC/RC5 proto
### Hardware Required
* A development board with ESP32 SoC (e.g. ESP32-DevKitC or ESP-WROVER-KIT)
* A development board with supported SoC mentioned in the above `Supported Targets` table
* An USB cable for power supply and programming
* A 5mm infrared LED (e.g. IR333C) used to transmit encoded IR signals
* An infrared receiver module (e.g. IRM-3638T), which integrates a demodulator and AGC circuit.
Example connection :
| ESP32 | IR333C | IRM-3638T |
| -------- | ------ | --------- |
| GPIO18 | Tx | × |
| GPIO19 | × | Rx |
| VCC 5V | √ | × |
| VCC 3.3V | × | √ |
| GND | GND | GND |
| ESP chip | IR333C | IRM-3638T |
| --------------------------- | ------ | --------- |
| CONFIG_EXAMPLE_RMT_TX_GPIO | Tx | × |
| CONFIG_EXAMPLE_RMT_RX_GPIO | × | Rx |
| VCC 5V | √ | × |
| VCC 3.3V | × | √ |
| GND | GND | GND |
### Configure the Project
Open the project configuration menu (`idf.py menuconfig`).
Open the project configuration menu (`idf.py menuconfig`).
In the `Example Configuration` menu:
* Select the infrared protocol used in the example under `Infrared Protocol` option.
* Set the GPIO number used for transmitting the IR signal under `RMT TX GPIO` option.
* Set the GPIO number used for receiving the demodulated IR signal under `RMT RX GPIO` option.
* Set the RMT TX channel number under `RMT TX Channel Number` option.
* Set the RMT RX channel number under `RMT RX Channel Number` option.
### Build and Flash
@@ -44,11 +48,7 @@ Run `idf.py -p PORT flash monitor` to build, flash and monitor the project.
(To exit the serial monitor, type ``Ctrl-]``.)
See the Getting Started Guide for all the steps to configure and use the ESP-IDF to build projects.
* [ESP-IDF Getting Started Guide on ESP32](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html)
* [ESP-IDF Getting Started Guide on ESP32-S2](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html)
* [ESP-IDF Getting Started Guide on ESP32-C3](https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/get-started/index.html)
See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects.
## Example Output

13
examples/peripherals/rmt/ir_protocols/main/Kconfig.projbuild
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@@ -30,4 +30,17 @@ menu "Example Configuration"
default 19
help
Set the GPIO number used for receiving the RMT signal.
config EXAMPLE_RMT_TX_CHANNEL
int "RMT TX Channel Number"
default 0
help
Set the RMT TX channel number.
config EXAMPLE_RMT_RX_CHANNEL
int "RMT RX Channel Number"
default 4 if IDF_TARGET_ESP32S3
default 2
help
Set the RMT RX channel number.
endmenu

4
examples/peripherals/rmt/ir_protocols/main/ir_protocols_main.c
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@@ -17,8 +17,8 @@
static const char *TAG = "example";
static rmt_channel_t example_tx_channel = RMT_CHANNEL_0;
static rmt_channel_t example_rx_channel = RMT_CHANNEL_2;
static rmt_channel_t example_tx_channel = CONFIG_EXAMPLE_RMT_TX_CHANNEL;
static rmt_channel_t example_rx_channel = CONFIG_EXAMPLE_RMT_RX_CHANNEL;
/**
* @brief RMT Receive Task