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Merge branch 'bugfix/lcd_rgb_pclk_default_to_low_v4.4' into 'release/v4.4'
lcd: rgb pclk idle default to low && RMT IR protocol example for esp32s3 (v4.4) See merge request espressif/esp-idf!16211
This commit is contained in:
@@ -18,10 +18,10 @@ extern "C" {
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#if SOC_LCD_RGB_SUPPORTED
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#if SOC_LCD_RGB_SUPPORTED
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/**
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/**
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* @brief LCD RGB timing structure
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* @brief LCD RGB timing structure
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*
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* @verbatim
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* Total Width
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* Total Width
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* <--------------------------------------------------->
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* <--------------------------------------------------->
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* Hsync width HBP Active Width HFP
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* HSYNC width HBP Active Width HFP
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* <---><--><--------------------------------------><--->
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* <---><--><--------------------------------------><--->
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* ____ ____|_______________________________________|____|
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* ____ ____|_______________________________________|____|
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* |___| | | |
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* |___| | | |
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@@ -36,7 +36,7 @@ extern "C" {
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* | /|\ | | / / / / / / / / / / / / / / / / / / / | |
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* | /|\ | | / / / / / / / / / / / / / / / / / / / | |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* Total | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* Total | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* Heigh | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* Height | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* |Active| | |/ / / / / / / / / / / / / / / / / / / /| |
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* |Active| | |/ / / / / / / / / / / / / / / / / / / /| |
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* |Heigh | | |/ / / / / / Active Display Area / / / /| |
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* |Heigh | | |/ / / / / / Active Display Area / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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@@ -48,7 +48,7 @@ extern "C" {
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* | /|\ | |
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* | /|\ | |
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* | VFP | | |
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* | VFP | | |
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* \|/ \|/_____|______________________________________________________|
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* \|/ \|/_____|______________________________________________________|
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*
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* @endverbatim
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*/
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*/
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typedef struct {
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typedef struct {
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unsigned int pclk_hz; /*!< Frequency of pixel clock */
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unsigned int pclk_hz; /*!< Frequency of pixel clock */
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@@ -65,7 +65,7 @@ typedef struct {
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unsigned int vsync_idle_low: 1; /*!< The vsync signal is low in IDLE state */
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unsigned int vsync_idle_low: 1; /*!< The vsync signal is low in IDLE state */
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unsigned int de_idle_high: 1; /*!< The de signal is high in IDLE state */
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unsigned int de_idle_high: 1; /*!< The de signal is high in IDLE state */
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unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
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unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
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unsigned int pclk_idle_low: 1; /*!< The PCLK stays at low level in IDLE phase */
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unsigned int pclk_idle_high: 1; /*!< The PCLK stays at high level in IDLE phase */
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} flags;
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} flags;
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} esp_lcd_rgb_timing_t;
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} esp_lcd_rgb_timing_t;
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@@ -250,7 +250,7 @@ static esp_err_t rgb_panel_init(esp_lcd_panel_t *panel)
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lcd_ll_set_pixel_clock_prescale(rgb_panel->hal.dev, pclk_prescale);
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lcd_ll_set_pixel_clock_prescale(rgb_panel->hal.dev, pclk_prescale);
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rgb_panel->timings.pclk_hz = rgb_panel->resolution_hz / pclk_prescale;
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rgb_panel->timings.pclk_hz = rgb_panel->resolution_hz / pclk_prescale;
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// pixel clock phase and polarity
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// pixel clock phase and polarity
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lcd_ll_set_clock_idle_level(rgb_panel->hal.dev, !rgb_panel->timings.flags.pclk_idle_low);
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lcd_ll_set_clock_idle_level(rgb_panel->hal.dev, rgb_panel->timings.flags.pclk_idle_high);
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lcd_ll_set_pixel_clock_edge(rgb_panel->hal.dev, rgb_panel->timings.flags.pclk_active_neg);
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lcd_ll_set_pixel_clock_edge(rgb_panel->hal.dev, rgb_panel->timings.flags.pclk_active_neg);
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// enable RGB mode and set data width
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// enable RGB mode and set data width
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lcd_ll_enable_rgb_mode(rgb_panel->hal.dev, true);
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lcd_ll_enable_rgb_mode(rgb_panel->hal.dev, true);
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@@ -35,7 +35,6 @@ static inline void lcd_ll_set_group_clock_src(lcd_cam_dev_t *dev, lcd_clock_sour
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{
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{
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// lcd_clk = module_clock_src / (div_num + div_b / div_a)
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// lcd_clk = module_clock_src / (div_num + div_b / div_a)
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HAL_ASSERT(div_num >= 2);
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HAL_ASSERT(div_num >= 2);
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dev->lcd_clock.lcd_clk_sel = src;
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_clock, lcd_clkm_div_num, div_num);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->lcd_clock, lcd_clkm_div_num, div_num);
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dev->lcd_clock.lcd_clkm_div_a = div_a;
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dev->lcd_clock.lcd_clkm_div_a = div_a;
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dev->lcd_clock.lcd_clkm_div_b = div_b;
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dev->lcd_clock.lcd_clkm_div_b = div_b;
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@@ -43,9 +42,6 @@ static inline void lcd_ll_set_group_clock_src(lcd_cam_dev_t *dev, lcd_clock_sour
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case LCD_CLK_SRC_PLL160M:
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case LCD_CLK_SRC_PLL160M:
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dev->lcd_clock.lcd_clk_sel = 3;
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dev->lcd_clock.lcd_clk_sel = 3;
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break;
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break;
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case LCD_CLK_SRC_APLL:
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dev->lcd_clock.lcd_clk_sel = 2;
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break;
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case LCD_CLK_SRC_XTAL:
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case LCD_CLK_SRC_XTAL:
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dev->lcd_clock.lcd_clk_sel = 1;
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dev->lcd_clock.lcd_clk_sel = 1;
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break;
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break;
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@@ -13,12 +13,17 @@ extern "C" {
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/**
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/**
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* @brief LCD clock source
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* @brief LCD clock source
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* @note User should select the clock source based on the real requirement:
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* @note User should select the clock source based on the real requirement:
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*
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* @verbatim embed:rst:leading-asterisk
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* +---------------------+-------------------------+----------------------------+
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* | LCD clock source | Features | Power Management |
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* | LCD clock source | Features | Power Management |
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* |---------------------|--------------------------|----------------------------|
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* +=====================+=========================+============================+
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* | LCD_CLK_SRC_PLL160M | High resolution, fixed | ESP_PM_APB_FREQ_MAX lock |
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* | LCD_CLK_SRC_PLL160M | High resolution | ESP_PM_APB_FREQ_MAX lock |
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* +---------------------+-------------------------+----------------------------+
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* | LCD_CLK_SRC_APLL | Configurable resolution | ESP_PM_NO_LIGHT_SLEEP lock |
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* | LCD_CLK_SRC_APLL | Configurable resolution | ESP_PM_NO_LIGHT_SLEEP lock |
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* | LCD_CLK_SRC_XTAL | Medium resolution, fixed | No PM lock |
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* +---------------------+-------------------------+----------------------------+
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* | LCD_CLK_SRC_XTAL | Medium resolution | No PM lock |
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* +---------------------+-------------------------+----------------------------+
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* @endverbatim
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*/
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*/
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typedef enum {
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typedef enum {
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LCD_CLK_SRC_PLL160M, /*!< Select PLL160M as the source clock */
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LCD_CLK_SRC_PLL160M, /*!< Select PLL160M as the source clock */
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@@ -1,3 +1,5 @@
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| Supported Targets | ESP32 | ESP32-S2 | ESP32-C3 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- |
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# IR Protocol Example
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# IR Protocol Example
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(See the README.md file in the upper level 'examples' directory for more information about examples.)
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(See the README.md file in the upper level 'examples' directory for more information about examples.)
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@@ -12,17 +14,17 @@ The example supports building and parsing both normal and extended NEC/RC5 proto
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### Hardware Required
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### Hardware Required
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* A development board with ESP32 SoC (e.g. ESP32-DevKitC or ESP-WROVER-KIT)
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* A development board with supported SoC mentioned in the above `Supported Targets` table
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* An USB cable for power supply and programming
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* An USB cable for power supply and programming
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* A 5mm infrared LED (e.g. IR333C) used to transmit encoded IR signals
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* A 5mm infrared LED (e.g. IR333C) used to transmit encoded IR signals
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* An infrared receiver module (e.g. IRM-3638T), which integrates a demodulator and AGC circuit.
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* An infrared receiver module (e.g. IRM-3638T), which integrates a demodulator and AGC circuit.
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Example connection :
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Example connection :
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| ESP32 | IR333C | IRM-3638T |
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| ESP chip | IR333C | IRM-3638T |
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| -------- | ------ | --------- |
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| --------------------------- | ------ | --------- |
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| GPIO18 | Tx | × |
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| CONFIG_EXAMPLE_RMT_TX_GPIO | Tx | × |
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| GPIO19 | × | Rx |
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| CONFIG_EXAMPLE_RMT_RX_GPIO | × | Rx |
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| VCC 5V | √ | × |
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| VCC 5V | √ | × |
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| VCC 3.3V | × | √ |
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| VCC 3.3V | × | √ |
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| GND | GND | GND |
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| GND | GND | GND |
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@@ -37,6 +39,8 @@ In the `Example Configuration` menu:
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* Select the infrared protocol used in the example under `Infrared Protocol` option.
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* Select the infrared protocol used in the example under `Infrared Protocol` option.
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* Set the GPIO number used for transmitting the IR signal under `RMT TX GPIO` option.
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* Set the GPIO number used for transmitting the IR signal under `RMT TX GPIO` option.
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* Set the GPIO number used for receiving the demodulated IR signal under `RMT RX GPIO` option.
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* Set the GPIO number used for receiving the demodulated IR signal under `RMT RX GPIO` option.
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* Set the RMT TX channel number under `RMT TX Channel Number` option.
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* Set the RMT RX channel number under `RMT RX Channel Number` option.
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### Build and Flash
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### Build and Flash
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@@ -44,11 +48,7 @@ Run `idf.py -p PORT flash monitor` to build, flash and monitor the project.
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(To exit the serial monitor, type ``Ctrl-]``.)
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(To exit the serial monitor, type ``Ctrl-]``.)
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See the Getting Started Guide for all the steps to configure and use the ESP-IDF to build projects.
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See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects.
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* [ESP-IDF Getting Started Guide on ESP32](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html)
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* [ESP-IDF Getting Started Guide on ESP32-S2](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html)
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* [ESP-IDF Getting Started Guide on ESP32-C3](https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/get-started/index.html)
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## Example Output
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## Example Output
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@@ -30,4 +30,17 @@ menu "Example Configuration"
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default 19
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default 19
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help
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help
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Set the GPIO number used for receiving the RMT signal.
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Set the GPIO number used for receiving the RMT signal.
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config EXAMPLE_RMT_TX_CHANNEL
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int "RMT TX Channel Number"
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default 0
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help
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Set the RMT TX channel number.
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config EXAMPLE_RMT_RX_CHANNEL
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int "RMT RX Channel Number"
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default 4 if IDF_TARGET_ESP32S3
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default 2
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help
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Set the RMT RX channel number.
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endmenu
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endmenu
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@@ -17,8 +17,8 @@
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static const char *TAG = "example";
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static const char *TAG = "example";
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static rmt_channel_t example_tx_channel = RMT_CHANNEL_0;
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static rmt_channel_t example_tx_channel = CONFIG_EXAMPLE_RMT_TX_CHANNEL;
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static rmt_channel_t example_rx_channel = RMT_CHANNEL_2;
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static rmt_channel_t example_rx_channel = CONFIG_EXAMPLE_RMT_RX_CHANNEL;
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/**
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/**
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* @brief RMT Receive Task
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* @brief RMT Receive Task
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Reference in New Issue
Block a user