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adc: fix adc digital not reset issue

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This commit is contained in:
Armando
2022-03-09 18:56:34 +08:00
parent 6217fb46db
commit f8c098658c
3 changed files with 8 additions and 1 deletions
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4
components/driver/esp32c3/adc.c
View File

@@ -229,8 +229,10 @@ esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config)
};
adc_hal_context_config(&s_adc_digi_ctx->hal, &config);
//enable SARADC module clock
//enable ADC digital part
periph_module_enable(PERIPH_SARADC_MODULE);
//reset ADC digital part
periph_module_reset(PERIPH_SARADC_MODULE);
adc_hal_calibration_init(ADC_NUM_1);
adc_hal_calibration_init(ADC_NUM_2);

4
components/hal/esp32s2/include/hal/clk_gate_ll.h
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@@ -29,6 +29,8 @@ extern "C" {
static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
{
switch (periph) {
case PERIPH_SARADC_MODULE:
return DPORT_APB_SARADC_CLK_EN;
case PERIPH_LEDC_MODULE:
return DPORT_LEDC_CLK_EN;
case PERIPH_UART0_MODULE:
@@ -109,6 +111,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
(void)enable; // unused
switch (periph) {
case PERIPH_SARADC_MODULE:
return DPORT_APB_SARADC_RST;
case PERIPH_LEDC_MODULE:
return DPORT_LEDC_RST;
case PERIPH_UART0_MODULE:

1
components/soc/esp32s2/include/soc/periph_defs.h
View File

@@ -55,6 +55,7 @@ typedef enum {
PERIPH_AES_DMA_MODULE,
PERIPH_SHA_DMA_MODULE,
PERIPH_DEDIC_GPIO_MODULE,
PERIPH_SARADC_MODULE,
PERIPH_MODULE_MAX
} periph_module_t;