b8ea51b2aa
Merge branch 'bugfix/ledc_update_duty_wait_v5.4' into 'release/v5.4'
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fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 (v5.4)
See merge request espressif/esp-idf!41273
2025-08-15 18:15:59 +08:00
a194b02246
fix(ledc): duty_start bit should wait for its self-clear before next set on esp32
2025-08-14 19:07:06 +08:00
67a2dfa293
fix(lp_io): w1ts/w1tc register access performance is improved
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by avoiding "read-modify-write" operation. The registers designed to be
write only.
2025-08-13 21:24:19 +08:00
5583e8d95e
fix(driver_spi): master driver change esp32p4 default src to pll
2025-07-30 10:14:01 +08:00
e839ed589c
Merge branch 'feature/enable_support_for_deterministic_mode_and_ecdsa_192_v5.4' into 'release/v5.4'
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enable support for deterministic mode and ecdsa 192 in ESP32H2 (v5.4)
See merge request espressif/esp-idf!39541
2025-07-11 13:47:39 +08:00
cc6b993b60
Merge branch 'feat/enable_wakeup_tests_for_more_chips_v5.4' into 'release/v5.4'
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feat(esp_hw_support): enable wakeup tests for more chips (v5.4)
See merge request espressif/esp-idf!40046
2025-07-11 13:40:33 +08:00
cebbedbac2
feat: enable support for deterministic mode for esp32h2
2025-07-09 13:05:56 +08:00
9a2997e25c
feat(lcd_cam): add lc_dma_int value atomic protect for lcd and cam
2025-07-07 15:33:43 +08:00
435cf83a52
Merge branch 'refactor/p4_touch_channel_increase_1_v5.4' into 'release/v5.4'
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refactor(touch): adjust touch channel number on P4 from 0-13 to 1-14 (v5.4)
See merge request espressif/esp-idf!39792
2025-06-30 10:19:58 +08:00
34b8f67a89
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4
2025-06-25 18:22:02 +08:00
5bc5a1474c
fix(hal): fix pmu_ll_ext1_clear_wakeup_status API
2025-06-23 09:54:07 +08:00
c8a6d41c27
refactor(touch): adjust touch channel number on P4 from 0-13 to 1-14
2025-06-19 14:17:49 +08:00
871aeae6ad
Merge branch 'fix/lp_periph_use_int_raw_v5.4' into 'release/v5.4'
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change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status (v5.4)
See merge request espressif/esp-idf!39249
2025-05-27 11:11:29 +08:00
afa7b83ed7
Merge branch 'bugfix/gpio_dump_io_config_v5.4' into 'release/v5.4'
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fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 (v5.4)
See merge request espressif/esp-idf!37778
2025-05-26 19:45:25 +08:00
cf0c42936b
Merge branch 'fix/fix_esp32p4_stuck_in_pd_ana_v5.4' into 'release/v5.4'
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fix(esp_hw_support): fix esp32p4 may get stuck when entering deepsleep (v5.4)
See merge request espressif/esp-idf!39282
2025-05-26 19:44:17 +08:00
e27321ab51
fix(esp_hw_support): fix esp32p4 may get stuck when entering deepsleep
2025-05-20 15:52:52 +08:00
8f231272f6
fix(gpio): fix IO output enable control
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oen_sel and oen_inv_sel fields from func_out_sel_cfg register
2025-05-20 15:30:26 +08:00
f61b453a25
fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access
2025-05-20 15:30:26 +08:00
6cffc5c994
fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32
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Closes https://github.com/espressif/esp-idf/issues/14931
2025-05-20 15:30:14 +08:00
6b75576db2
change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status
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This commit updates the LP I2C and LP UART drivers to use the raw
interrupt status without enabling the interrupts.
2025-05-19 10:33:21 +02:00
1811757ad9
fix(esp_hw_support): Fix deepsleep leakage after initializing USB HS phy
2025-05-15 16:05:05 +08:00
d62e3c7d14
Merge branch 'contrib/github_pr_15638_v5.4' into 'release/v5.4'
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fix(i2c): Fix clear bus issue in legacy i2c driver, etc. (backport v5.4)
See merge request espressif/esp-idf!38828
2025-05-09 10:38:11 +08:00
94cbc9bbac
fix(i2c): Fix that fsm reset cause i2c scl frequency changed on esp32s2
2025-04-29 16:58:36 +08:00
81860c55d6
feat(esp_hw_support): use non-lock regi2c fast-up cpll/mpll enable process after sleep wakeup
2025-04-25 17:13:22 +08:00
c04ae03729
fix(ADC): fix P4 ADC oneshot error when reread
2025-04-23 11:33:06 +08:00
7643f77225
feat(esp_hw_support): enable auto clock gating for multi peripherals
2025-04-16 15:08:51 +08:00
ef1a5075f5
Merge branch 'refactor/ana_cmpr_driver_v5.4' into 'release/v5.4'
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refactor(ana_cmpr): enhanced the driver implementation (v5.4)
See merge request espressif/esp-idf!38388
2025-04-15 13:15:23 +08:00
d20d3c7a60
fix(ana_cmpr): ETM event not work for Unit 1
2025-04-14 17:13:48 +08:00
8e1f47ef04
fix(lpwdt): P4 LP-WDT now takes into account the EFUSE_WDT_DELAY forthe timeout
2025-04-14 14:52:15 +08:00
5190ce55a0
Merge branch 'fix/usb-hal-dwc-host-channel-num_v5.4' into 'release/v5.4'
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fix(usb/hal/dwc): Correct host channel number calculation (backport v5.4)
See merge request espressif/esp-idf!37367
2025-04-11 11:27:34 +08:00
19e864060a
Merge branch 'fix/rmii_ref_ckl_v5.4' into 'release/v5.4'
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fix(esp_eth): fixed ESP32P4 EMAC REF RMII CLK output mode (v5.4)
See merge request espressif/esp-idf!38039
2025-04-07 13:58:48 +08:00
c9c0e8b63e
fix(usb/hal/dwc): Correct host channel number calculation
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The hardware field `ghwcfg2.numhstchnl` is zero-based, meaning the actual
number of available host channels is `numhstchnl + 1`. This off-by-one
error caused the USB Host controller to report N-1 channels instead of N,
leading to premature "No more HCD channels available" errors when
connecting multiple devices.
This issue affects ESP32-S2, ESP32-S3, and ESP32-P4.
2025-04-03 23:53:01 +08:00
7e1238de97
Merge branch 'fix/parlio_add_gdma_fifo_reset_v5.4' into 'release/v5.4'
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fix(parlio_tx): add clock and fifo reset in disable function (v5.4)
See merge request espressif/esp-idf!36273
2025-04-03 10:27:04 +08:00
7fe190313c
Merge branch 'feat/p4_adc_calibration' into 'release/v5.4'
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Feature/esp32 p4 adc calibration (backport v5.4)
See merge request espressif/esp-idf!36179
2025-04-02 11:04:46 +08:00
ff8c836be3
Merge branch 'feat/allow_setting_rmt_group_prescale_v5.4' into 'release/v5.4'
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refactor(rmt): set group clock prescale dynamically (v5.4)
See merge request espressif/esp-idf!36737
2025-04-02 10:15:16 +08:00
13baf981ca
Merge branch 'bugfix/sdmmc_high_prio_timeout_v5.4' into 'release/v5.4'
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fix(sdmmc): move DMA descriptor refilling into the ISR (v5.4)
See merge request espressif/esp-idf!37694
2025-04-02 10:13:22 +08:00
d74f12dea7
feat(adc): support ADC calibration on ESP32P4
2025-04-01 15:07:56 +08:00
300adf0045
fix(esp_eth): fixed emac_ll_pause_frame_enable for ESP32P4
2025-04-01 08:32:09 +02:00
e544d57179
fix(esp_eth): fixed ESP32P4 EMAC REF RMII CLK output mode
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fixed units returned and used by periph_rtc_mpll_freq_set function
2025-04-01 08:32:09 +02:00
beee8e047e
Merge branch 'contrib/github_pr_15499_v5.4' into 'release/v5.4'
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Add missing break statements to usb_serial_jtag_ll_phy_select (GitHub PR) (v5.4)
See merge request espressif/esp-idf!38124
2025-04-01 11:14:52 +08:00
57a83359d5
Merge branch 'bugfix/clear_ledc_gamma_ram_v5.4' into 'release/v5.4'
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fix(ledc): left-off gamma ram registers should be cleared (v5.4)
See merge request espressif/esp-idf!37572
2025-04-01 11:13:32 +08:00
4e7c593098
fix(parlio): fix rempty interrupt during resetting fifo
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Move the fifo reset to after disabling the tx core clock.
And add external non-free running clock src test.
2025-04-01 11:11:44 +08:00
21792d572e
fix(parlio_tx): add clock and fifo reset in disable function
2025-04-01 11:11:44 +08:00
8bce1430ee
Merge branch 'bugfix/lp_uart_baudrate_limitation_v5.4' into 'release/v5.4'
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fix(uart): LP UART does not have the pre-divider for its clock source (v5.4)
See merge request espressif/esp-idf!37594
2025-04-01 10:35:29 +08:00
e743875cd8
fix: add missing break statements to usb_serial_jtag_ll_phy_select,
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Closes https://github.com/espressif/esp-idf/pull/15499
2025-04-01 10:09:47 +08:00
2bed64fafc
fix(axi_icm): qos can be applied to read and write independently
2025-03-12 21:36:53 +08:00
4bd2322993
fix(sdmmc): move DMA descriptor refilling into the ISR
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Previously, as DMA descriptors were processed, the task performing
SDMMC transfer would get woken up and would refill the descriptors.
This design didn't work correctly when higher priority tasks occupied
the CPU for too long, resulting in SDMMC transfer timing out.
This change moves DMA descriptor refilling into SDMMC ISR. Now the
"DMA done" interrupt is delivered back to task context only when
the entire transfer is completed.
Closes https://github.com/espressif/esp-idf/issues/13934
2025-03-12 10:30:53 +08:00
e774dbfd0f
fix(uart): LP UART does not have the pre-divider for its clock source
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Closes https://github.com/espressif/esp-idf/issues/15427
2025-03-10 15:29:09 +08:00
9aaa4f9e9c
fix(ledc): overflowed integer argument in ledc_hal_clear_left_off_fade_param
2025-03-07 20:33:01 +08:00
fc5d2e1bae
refactor(rmt): set group clock prescale dynamically
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Closes https://github.com/espressif/esp-idf/issues/14760
2025-02-26 14:17:12 +08:00
morris
Song Ruo Jing
wanckl
Jiang Jiang Jian
nilesh.kale
gaoxu
yanzihan@espressif.com
wuzhenghui
laokaiyao
Sudeep Mohanty
C.S.M
Marius Vikhammer
igor.masar
Ondrej Kosta
Chen Jichang
Renze Nicolai
Ivan Grokhotkov