Merge branch 'fix/bypass_some_restore_process_if_sleep_rejected_v5.4' into 'release/v5.4'

fix(esp_hw_support): skip some wakeup steps if sleep is rejected (v5.4) See merge request espressif/esp-idf!34622
Merge branch 'bugfix/backport_some_wifi_fixes_v5.4' into 'release/v5.4'
2026-08-03 20:35:33 +02:00 · 2024-11-09 00:37:21 +08:00 · 2024-11-09 00:33:43 +08:00 · 2024-11-09 00:05:31 +08:00 · 2024-11-08 23:28:38 +08:00 · 2024-11-08 22:28:10 +08:00
656 changed files with 18434 additions and 5972 deletions
@@ -1,4 +1,4 @@
 [codespell]
 skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*,*.pem
-ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart,wheight,wel,ot,fane,assertIn,registr,oen
+ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart,wheight,wel,ot,fane,assertIn,registr,oen,parms
 write-changes = true
@@ -2,248 +2,5 @@
 #
 #    https://docs.gitlab.com/ee/user/project/code_owners.html#the-syntax-of-code-owners-files
 #
-# If more than one rule matches a given file, the latest rule is used.
-# The file should be generally kept sorted, except when it is necessary
-# to use a different order due to the fact above. In that case, use
-# '# sort-order-reset' comment line to reset the sort order.
-#
-# Recipes for a few common cases:
-#
-# 1. Specific directory with all its contents:
-#
-#    /components/app_trace/
-#
-#    Note the trailing slash!
-#
-# 2. File with certain extension in any subdirectory of a certain directory:
-#
-#    /examples/**/*.py
-#
-#    This includes an *.py files in /examples/ directory as well.
-#
-# 3. Contents of a directory with a certain name, anywhere in the tree:
-#
-#    test_*_host/
-#
-#    Will match everything under components/efuse/test_efuse_host/,
-#    components/heap/test_multi_heap_host/, components/lwip/test_afl_host/, etc.
-#
-# 4. Same as above, except limited to a specific place in the tree:
-#
-#    /components/esp32*/
-#
-#    Matches everything under /components/esp32, /components/esp32s2, etc.
-#    Doesn't match /tools/some-test/components/esp32s5.
-#
-# 5. Specific file:
-#
-#    /tools/tools.json
-#
-# 6. File with a certain name anywhere in the tree
-#
-#    .gitignore
-#

-* @esp-idf-codeowners/other
-
-/.*                                   @esp-idf-codeowners/tools
-/.codespellrc                         @esp-idf-codeowners/ci
-/.github/workflows/                   @esp-idf-codeowners/ci
-/.gitlab-ci.yml                       @esp-idf-codeowners/ci
-/.gitlab/ci/                          @esp-idf-codeowners/ci
-/.pre-commit-config.yaml              @esp-idf-codeowners/ci
-/.readthedocs.yml                     @esp-idf-codeowners/docs
-/.vale.ini                            @esp-idf-codeowners/docs
-/CMakeLists.txt                       @esp-idf-codeowners/build-config
-/COMPATIBILITY*.md                    @esp-idf-codeowners/peripherals
-/CONTRIBUTING.md                      @esp-idf-codeowners/docs
-/Kconfig                              @esp-idf-codeowners/build-config
-/README*.md                           @esp-idf-codeowners/docs
-/ROADMAP*.md                          @esp-idf-codeowners/docs
-/SUPPORT_POLICY*.md                   @esp-idf-codeowners/docs
-/add_path.sh                          @esp-idf-codeowners/tools
-/conftest.py                          @esp-idf-codeowners/ci
-/export.*                             @esp-idf-codeowners/tools
-/install.*                            @esp-idf-codeowners/tools
-/pytest.ini                           @esp-idf-codeowners/ci
-/sdkconfig.rename                     @esp-idf-codeowners/build-config
-/sonar-project.properties             @esp-idf-codeowners/ci
-
-# sort-order-reset
-
-/components/app_trace/                @esp-idf-codeowners/debugging
-/components/app_update/               @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/bootloader*/              @esp-idf-codeowners/system @esp-idf-codeowners/security
-/components/bootloader_support/bootloader_flash/    @esp-idf-codeowners/peripherals
-/components/bt/                       @esp-idf-codeowners/bluetooth
-/components/cmock/                    @esp-idf-codeowners/system
-/components/console/                  @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities/console
-/components/cxx/                      @esp-idf-codeowners/system
-/components/driver/                   @esp-idf-codeowners/peripherals
-/components/efuse/                    @esp-idf-codeowners/system
-/components/esp_adc/                  @esp-idf-codeowners/peripherals
-/components/esp_app_format/           @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/esp_bootloader_format/    @esp-idf-codeowners/system @esp-idf-codeowners/app-utilities
-/components/esp_coex/                 @esp-idf-codeowners/wifi @esp-idf-codeowners/bluetooth @esp-idf-codeowners/ieee802154
-/components/esp_common/               @esp-idf-codeowners/system
-/components/esp_driver_*/             @esp-idf-codeowners/peripherals
-/components/esp_driver_sdmmc/         @esp-idf-codeowners/peripherals @esp-idf-codeowners/storage
-/components/esp_eth/                  @esp-idf-codeowners/network
-/components/esp_event/                @esp-idf-codeowners/system
-/components/esp_gdbstub/              @esp-idf-codeowners/debugging
-/components/esp_hid/                  @esp-idf-codeowners/bluetooth
-/components/esp_http_client/          @esp-idf-codeowners/app-utilities
-/components/esp_http_server/          @esp-idf-codeowners/app-utilities
-/components/esp_https_ota/            @esp-idf-codeowners/app-utilities
-/components/esp_https_server/         @esp-idf-codeowners/app-utilities
-/components/esp_hw_support/           @esp-idf-codeowners/system @esp-idf-codeowners/peripherals
-/components/esp_hw_support/lowpower/  @esp-idf-codeowners/power-management
-/components/esp_lcd/                  @esp-idf-codeowners/peripherals
-/components/esp_local_ctrl/           @esp-idf-codeowners/app-utilities
-/components/esp_mm/                   @esp-idf-codeowners/peripherals
-/components/esp_netif/                @esp-idf-codeowners/network
-/components/esp_netif_stack/          @esp-idf-codeowners/network
-/components/esp_partition/            @esp-idf-codeowners/storage
-/components/esp_phy/                  @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
-/components/esp_pm/                   @esp-idf-codeowners/power-management @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/system
-/components/esp_psram/                @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
-/components/esp_ringbuf/              @esp-idf-codeowners/system
-/components/esp_rom/                  @esp-idf-codeowners/system @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi
-/components/esp_security/             @esp-idf-codeowners/security
-/components/esp_system/               @esp-idf-codeowners/system
-/components/esp_timer/                @esp-idf-codeowners/system
-/components/esp-tls/                  @esp-idf-codeowners/app-utilities
-/components/esp_vfs_*/                @esp-idf-codeowners/storage
-/components/esp_vfs_console/          @esp-idf-codeowners/storage @esp-idf-codeowners/system
-/components/esp_wifi/                 @esp-idf-codeowners/wifi
-/components/espcoredump/              @esp-idf-codeowners/debugging
-/components/esptool_py/               @esp-idf-codeowners/tools
-/components/fatfs/                    @esp-idf-codeowners/storage
-/components/freertos/                 @esp-idf-codeowners/system
-/components/hal/                      @esp-idf-codeowners/peripherals
-/components/hal/test_apps/crypto/     @esp-idf-codeowners/peripherals @esp-idf-codeowners/security
-/components/heap/                     @esp-idf-codeowners/system
-/components/http_parser/              @esp-idf-codeowners/app-utilities
-/components/idf_test/                 @esp-idf-codeowners/ci
-/components/ieee802154/               @esp-idf-codeowners/ieee802154
-/components/json/                     @esp-idf-codeowners/app-utilities
-/components/linux/                    @esp-idf-codeowners/system
-/components/log/                      @esp-idf-codeowners/system
-/components/lwip/                     @esp-idf-codeowners/lwip
-/components/mbedtls/                  @esp-idf-codeowners/app-utilities/mbedtls @esp-idf-codeowners/security
-/components/mqtt/                     @esp-idf-codeowners/network
-/components/newlib/                   @esp-idf-codeowners/system @esp-idf-codeowners/toolchain
-/components/nvs_flash/                @esp-idf-codeowners/storage
-/components/nvs_sec_provider/         @esp-idf-codeowners/storage @esp-idf-codeowners/security
-/components/openthread/               @esp-idf-codeowners/ieee802154
-/components/partition_table/          @esp-idf-codeowners/system
-/components/perfmon/                  @esp-idf-codeowners/debugging
-/components/protobuf-c/               @esp-idf-codeowners/app-utilities
-/components/protocomm/                @esp-idf-codeowners/app-utilities/provisioning
-/components/pthread/                  @esp-idf-codeowners/system
-/components/riscv/                    @esp-idf-codeowners/system
-/components/rt/                       @esp-idf-codeowners/system
-/components/sdmmc/                    @esp-idf-codeowners/storage
-/components/soc/                      @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
-/components/spi_flash/                @esp-idf-codeowners/peripherals
-/components/spiffs/                   @esp-idf-codeowners/storage
-/components/tcp_transport/            @esp-idf-codeowners/network
-/components/touch_element/            @esp-idf-codeowners/peripherals
-/components/ulp/                      @esp-idf-codeowners/system
-/components/unity/                    @esp-idf-codeowners/ci
-/components/usb/                      @esp-idf-codeowners/peripherals/usb
-/components/vfs/                      @esp-idf-codeowners/storage
-/components/wear_levelling/           @esp-idf-codeowners/storage
-/components/wifi_provisioning/        @esp-idf-codeowners/app-utilities/provisioning
-/components/wpa_supplicant/           @esp-idf-codeowners/wifi @esp-idf-codeowners/app-utilities/mbedtls
-/components/xtensa/                   @esp-idf-codeowners/system
-
-/docs/                                      @esp-idf-codeowners/docs
-/docs/docs_not_updated/                     @esp-idf-codeowners/all-maintainers
-/docs/**/api-guides/tools/                  @esp-idf-codeowners/tools
-/docs/en/api-guides/core_dump.rst           @esp-idf-codeowners/debugging
-/docs/**/api-guides/wifi*                   @esp-idf-codeowners/wifi
-/docs/**/api-guides/esp-wifi-mesh.rst       @esp-idf-codeowners/wifi
-/docs/en/api-guides/jtag-debugging/         @esp-idf-codeowners/debugging
-/docs/**/api-reference/bluetooth/           @esp-idf-codeowners/bluetooth
-/docs/**/api-reference/network/             @esp-idf-codeowners/network @esp-idf-codeowners/wifi
-/docs/**/api-reference/peripherals/         @esp-idf-codeowners/peripherals
-/docs/**/api-reference/peripherals/usb*     @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/docs/**/api-reference/peripherals/usb*/    @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/docs/**/api-reference/protocols/           @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/docs/**/api-reference/provisioning/        @esp-idf-codeowners/app-utilities/provisioning
-/docs/**/api-reference/storage/             @esp-idf-codeowners/storage
-/docs/**/api-reference/system/              @esp-idf-codeowners/system
-/docs/**/security/                          @esp-idf-codeowners/security
-/docs/**/migration-guides/                  @esp-idf-codeowners/docs @esp-idf-codeowners/all-maintainers
-/docs/**/contribute/install-pre-commit-hook.rst @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-/examples/README.md           @esp-idf-codeowners/docs @esp-idf-codeowners/ci
-/examples/**/*.py             @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-/examples/bluetooth/          @esp-idf-codeowners/bluetooth
-/examples/build_system/       @esp-idf-codeowners/build-config
-/examples/common_components/  @esp-idf-codeowners/system @esp-idf-codeowners/wifi @esp-idf-codeowners/lwip @esp-idf-codeowners/network
-/examples/custom_bootloader/  @esp-idf-codeowners/system
-/examples/cxx/                @esp-idf-codeowners/system
-/examples/ethernet/           @esp-idf-codeowners/network
-/examples/get-started/        @esp-idf-codeowners/system
-/examples/ieee802154/         @esp-idf-codeowners/ieee802154
-/examples/mesh/               @esp-idf-codeowners/wifi
-/examples/network/            @esp-idf-codeowners/network @esp-idf-codeowners/wifi
-/examples/openthread/         @esp-idf-codeowners/ieee802154
-/examples/peripherals/        @esp-idf-codeowners/peripherals
-/examples/peripherals/usb/    @esp-idf-codeowners/peripherals @esp-idf-codeowners/peripherals/usb
-/examples/phy/                @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
-/examples/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/examples/provisioning/       @esp-idf-codeowners/app-utilities/provisioning
-/examples/security/           @esp-idf-codeowners/security
-/examples/storage/            @esp-idf-codeowners/storage
-/examples/system/             @esp-idf-codeowners/system
-/examples/system/ota/         @esp-idf-codeowners/app-utilities
-/examples/wifi/               @esp-idf-codeowners/wifi
-/examples/zigbee/             @esp-idf-codeowners/ieee802154
-
-/tools/                       @esp-idf-codeowners/tools
-/tools/ble/                   @esp-idf-codeowners/app-utilities
-/tools/catch/                 @esp-idf-codeowners/ci
-/tools/ci/                    @esp-idf-codeowners/ci
-/tools/cmake/                 @esp-idf-codeowners/build-config
-/tools/cmake/toolchain-*.cmake      @esp-idf-codeowners/toolchain
-/tools/esp_app_trace/         @esp-idf-codeowners/debugging
-/tools/esp_prov/              @esp-idf-codeowners/app-utilities
-/tools/gdb_panic_server.py    @esp-idf-codeowners/debugging
-/tools/kconfig*/              @esp-idf-codeowners/build-config
-/tools/ldgen/                 @esp-idf-codeowners/build-config
-/tools/mass_mfg/              @esp-idf-codeowners/app-utilities
-/tools/mocks/                 @esp-idf-codeowners/system
-
-/tools/test_apps/                    @esp-idf-codeowners/ci
-/tools/test_apps/README.md           @esp-idf-codeowners/docs @esp-idf-codeowners/ci
-
-## Note: owners here should be the same as the owners for the same example subdir, above
-/tools/test_apps/build_system/       @esp-idf-codeowners/build-config
-/tools/test_apps/configs/            @esp-idf-codeowners/system
-/tools/test_apps/linux_compatible/   @esp-idf-codeowners/system
-/tools/test_apps/peripherals/        @esp-idf-codeowners/peripherals
-/tools/test_apps/phy/                @esp-idf-codeowners/bluetooth @esp-idf-codeowners/wifi @esp-idf-codeowners/ieee802154
-/tools/test_apps/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
-/tools/test_apps/security/           @esp-idf-codeowners/security
-/tools/test_apps/storage/            @esp-idf-codeowners/storage
-/tools/test_apps/system/             @esp-idf-codeowners/system
-
-/tools/test_apps/**/*.py             @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-/tools/test_build_system/     @esp-idf-codeowners/tools @esp-idf-codeowners/build-config
-
-/tools/tools.json             @esp-idf-codeowners/tools @esp-idf-codeowners/toolchain @esp-idf-codeowners/debugging
-
-/tools/unit-test-app/         @esp-idf-codeowners/system @esp-idf-codeowners/tools
-
-# sort-order-reset
-
-/components/**/test_apps/**/*.py     @esp-idf-codeowners/ci @esp-idf-codeowners/tools
-
-# ignore lists
-/tools/ci/check_copyright_config.yaml                   @esp-idf-codeowners/all-maintainers
-/tools/ci/check_copyright_ignore.txt                    @esp-idf-codeowners/all-maintainers
-/tools/ci/mypy_ignore_list.txt                          @esp-idf-codeowners/tools
+* @esp-idf-codeowners/all-maintainers
@@ -1,7 +1,7 @@
 .build_template:
  stage: build
  extends:
-    - .after_script:build:ccache:upload-when-fail
+    - .after_script:build:ccache-show-stats:upload-failed-job-logs
  image: $ESP_ENV_IMAGE
  tags:
    - build
@@ -16,7 +16,7 @@
  extends:
    - .build_template
    - .before_script:build
-    - .after_script:build:ccache
+    - .after_script:build:ccache-show-stats
  dependencies: # set dependencies to null to avoid missing artifacts issue
  needs:
    - job: fast_template_app
@@ -246,15 +246,16 @@ pytest_build_system_macos:
  extends:
    - .test_build_system_template
    - .before_script:build:macos
-    - .after_script:build:macos:upload-when-fail
+    - .after_script:build:macos:upload-failed-job-logs:ccache-show-stats
    - .rules:build:macos
  tags:
    - macos_shell
  parallel: 3
  variables:
    PYENV_VERSION: "3.8"
-    CI_CCACHE_DISABLE: "1"  # ccache: error: Read-only file system
-
+    # CCACHE_DIR: "/cache/idf_ccache". On macOS, you cannot write to this folder due to insufficient permissions.
+    CCACHE_DIR: "" # ccache will use "$HOME/Library/Caches/ccache".
+    CCACHE_MAXSIZE: "5G" # To preserve the limited Macbook storage. CCACHE automatically prunes old caches to fit the set limit.
 build_docker:
  extends:
    - .before_script:minimal
@@ -61,9 +61,6 @@ variables:
  SONARQUBE_SCANNER_IMAGE: "${CI_DOCKER_REGISTRY}/sonarqube-scanner:5"
  PRE_COMMIT_IMAGE: "${CI_DOCKER_REGISTRY}/esp-idf-pre-commit:1"

-  # target test repo parameters
-  TEST_ENV_CONFIG_REPO: "https://gitlab-ci-token:${BOT_TOKEN}@${CI_SERVER_HOST}:${CI_SERVER_PORT}/qa/ci-test-runner-configs.git"
-
  # cache python dependencies
  PIP_CACHE_DIR: "$CI_PROJECT_DIR/.cache/pip"

@@ -230,13 +227,14 @@ variables:
    - *setup_tools_and_idf_python_venv
    - fetch_submodules

-.after_script:build:macos:upload-when-fail:
+.after_script:build:macos:upload-failed-job-logs:ccache-show-stats:
  after_script:
    # macos is running shell executor, which means it would use
    # the system installed /usr/local/bin/python3 by default.
    # Ensure pyenv and PYENV_VERSION installed
    - eval "$(pyenv init -)"
    - *upload_failed_job_log_artifacts
+    - *show_ccache_statistics

 .before_script:build:
  before_script:
@@ -247,11 +245,11 @@ variables:
    - export EXTRA_CFLAGS=${PEDANTIC_CFLAGS}
    - export EXTRA_CXXFLAGS=${PEDANTIC_CXXFLAGS}

-.after_script:build:ccache:
+.after_script:build:ccache-show-stats:
  after_script:
    - *show_ccache_statistics

-.after_script:build:ccache:upload-when-fail:
+.after_script:build:ccache-show-stats:upload-failed-job-logs:
  after_script:
    - *show_ccache_statistics
    - *upload_failed_job_log_artifacts
@@ -183,12 +183,24 @@ baseline_manifest_sha:
  tags: [fast_run, shiny]
  script:
    - |
-      if [ -n "$CI_MERGE_REQUEST_DIFF_BASE_SHA" ]; then
+      # merged results pipelines, by default
+      # diff between target-branch-head and merged-result-head
+      if [ -n "$CI_MERGE_REQUEST_TARGET_BRANCH_SHA" ]; then
+        git fetch origin $CI_MERGE_REQUEST_TARGET_BRANCH_SHA --depth=1
+        git checkout FETCH_HEAD
+        idf-build-apps dump-manifest-sha \
+          --manifest-files $(find . -name ".build-test-rules.yml" | xargs) \
+          --output .manifest_sha
+      # merge request pipelines, when the mr got conflicts
+      # diff between diff-base-sha and merge-request-head
+      elif [ -n "$CI_MERGE_REQUEST_DIFF_BASE_SHA" ]; then
        git fetch origin $CI_MERGE_REQUEST_DIFF_BASE_SHA --depth=1
        git checkout FETCH_HEAD
        idf-build-apps dump-manifest-sha \
          --manifest-files $(find . -name ".build-test-rules.yml" | xargs) \
          --output .manifest_sha
+      # other pipelines, like the protected branches pipelines
+      # not triggered in this job
      fi
  artifacts:
    paths:
@@ -261,14 +261,14 @@
    - <<: *if-dev-push
      changes: *patterns-python-files

-.rules:patterns:static-code-analysis-preview:
-  rules:
-    - <<: *if-dev-push
-      changes: *patterns-c-files
-    - <<: *if-dev-push
-      changes: *patterns-python-files
-    - <<: *if-dev-push
-      changes: *patterns-sonarqube-files
+#.rules:patterns:static-code-analysis-preview:
+#  rules:
+#    - <<: *if-dev-push
+#      changes: *patterns-c-files
+#    - <<: *if-dev-push
+#      changes: *patterns-python-files
+#    - <<: *if-dev-push
+#      changes: *patterns-sonarqube-files

 .rules:patterns:idf-pytest-plugin:
  rules:
@@ -38,84 +38,84 @@ check_pylint:
      fi
    - if [ -z "$files" ]; then echo "No python files found"; exit 0; fi
    - run_cmd pylint --exit-zero --load-plugins=pylint_gitlab --output-format=gitlab-codeclimate:pylint.json $files
-
-# build stage
-# Sonarqube related jobs put here for this reason:
-# Here we have two jobs. code_quality_check and code_quality_report.
 #
-# code_quality_check will analyze the code changes between your MR and
-# code repo stored in sonarqube server. The analysis result is only shown in
-# the comments under this MR and won't be transferred to the server.
+## build stage
+## Sonarqube related jobs put here for this reason:
+## Here we have two jobs. code_quality_check and code_quality_report.
+##
+## code_quality_check will analyze the code changes between your MR and
+## code repo stored in sonarqube server. The analysis result is only shown in
+## the comments under this MR and won't be transferred to the server.
+##
+## code_quality_report will analyze and transfer both of the newly added code
+## and the analysis result to the server.
+##
+## Put in the front to ensure that the newly merged code can be stored in
+## sonarqube server ASAP, in order to avoid reporting unrelated code issues
+#.sonar_scan_template:
+#  stage: build
+#  extends: .pre_check_template
+#  # full clone since this image does not support fetch --shallow-since-cutoff
+#  # shiny runners are used for full clone
+#  tags: [build, shiny]
+#  image: $SONARQUBE_SCANNER_IMAGE
+#  before_script:
+#    - source tools/ci/utils.sh
+#    - export PYTHONPATH="$CI_PROJECT_DIR/tools:$CI_PROJECT_DIR/tools/ci/python_packages:$PYTHONPATH"
+#    - fetch_submodules
+#    # Exclude the submodules, all paths ends with /**
+#    - submodules=$(get_all_submodules)
+#    # get all exclude paths specified in tools/ci/sonar_exclude_list.txt | ignore lines start with # | xargs | replace all <space> to <comma>
+#    - custom_excludes=$(cat $CI_PROJECT_DIR/tools/ci/sonar_exclude_list.txt | grep -v '^#' | xargs | sed -e 's/ /,/g')
+#    # Exclude the report dir as well
+#    - export EXCLUSIONS="$custom_excludes,$submodules"
+#    - export SONAR_SCANNER_OPTS="-Xmx2048m"
+#  variables:
+#    GIT_DEPTH: 0
+#    REPORT_PATTERN: clang_tidy_reports/**/*.txt
+#  artifacts:
+#    paths:
+#      - $REPORT_PATTERN
+#    expire_in: 1 week
+#    when: always
+#  dependencies:  # Here is not a hard dependency relationship, could be skipped when only python files changed. so we do not use "needs" here.
+#    - clang_tidy_check
 #
-# code_quality_report will analyze and transfer both of the newly added code
-# and the analysis result to the server.
+#code_quality_check:
+#  extends:
+#    - .sonar_scan_template
+#    - .rules:patterns:static-code-analysis-preview
+#  allow_failure: true  # it's using exit code to indicate the code analysis result,
+#                       # we don't want to block ci when critical issues founded
+#  script:
+#    - export CI_MERGE_REQUEST_COMMITS=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py commits --src-branch ${CI_COMMIT_REF_NAME} | tr '\n' ',')
+#    # test if this branch have merge request, if not, exit 0
+#    - test -n "$CI_MERGE_REQUEST_IID" || exit 0
+#    - test -n "$CI_MERGE_REQUEST_COMMITS" || exit 0
+#    - sonar-scanner
+#      -Dsonar.analysis.mode=preview
+#      -Dsonar.branch.name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
+#      -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
+#      -Dsonar.exclusions=$EXCLUSIONS
+#      -Dsonar.gitlab.ci_merge_request_iid=$CI_MERGE_REQUEST_IID
+#      -Dsonar.gitlab.commit_sha=$CI_MERGE_REQUEST_COMMITS
+#      -Dsonar.gitlab.merge_request_discussion=true
+#      -Dsonar.gitlab.ref_name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
+#      -Dsonar.host.url=$SONAR_HOST_URL
+#      -Dsonar.login=$SONAR_LOGIN
 #
-# Put in the front to ensure that the newly merged code can be stored in
-# sonarqube server ASAP, in order to avoid reporting unrelated code issues
-.sonar_scan_template:
-  stage: build
-  extends: .pre_check_template
-  # full clone since this image does not support fetch --shallow-since-cutoff
-  # shiny runners are used for full clone
-  tags: [build, shiny]
-  image: $SONARQUBE_SCANNER_IMAGE
-  before_script:
-    - source tools/ci/utils.sh
-    - export PYTHONPATH="$CI_PROJECT_DIR/tools:$CI_PROJECT_DIR/tools/ci/python_packages:$PYTHONPATH"
-    - fetch_submodules
-    # Exclude the submodules, all paths ends with /**
-    - submodules=$(get_all_submodules)
-    # get all exclude paths specified in tools/ci/sonar_exclude_list.txt | ignore lines start with # | xargs | replace all <space> to <comma>
-    - custom_excludes=$(cat $CI_PROJECT_DIR/tools/ci/sonar_exclude_list.txt | grep -v '^#' | xargs | sed -e 's/ /,/g')
-    # Exclude the report dir as well
-    - export EXCLUSIONS="$custom_excludes,$submodules"
-    - export SONAR_SCANNER_OPTS="-Xmx2048m"
-  variables:
-    GIT_DEPTH: 0
-    REPORT_PATTERN: clang_tidy_reports/**/*.txt
-  artifacts:
-    paths:
-      - $REPORT_PATTERN
-    expire_in: 1 week
-    when: always
-  dependencies:  # Here is not a hard dependency relationship, could be skipped when only python files changed. so we do not use "needs" here.
-    - clang_tidy_check
-
-code_quality_check:
-  extends:
-    - .sonar_scan_template
-    - .rules:patterns:static-code-analysis-preview
-  allow_failure: true  # it's using exit code to indicate the code analysis result,
-                       # we don't want to block ci when critical issues founded
-  script:
-    - export CI_MERGE_REQUEST_COMMITS=$(python ${CI_PROJECT_DIR}/tools/ci/ci_get_mr_info.py commits --src-branch ${CI_COMMIT_REF_NAME} | tr '\n' ',')
-    # test if this branch have merge request, if not, exit 0
-    - test -n "$CI_MERGE_REQUEST_IID" || exit 0
-    - test -n "$CI_MERGE_REQUEST_COMMITS" || exit 0
-    - sonar-scanner
-      -Dsonar.analysis.mode=preview
-      -Dsonar.branch.name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-      -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-      -Dsonar.exclusions=$EXCLUSIONS
-      -Dsonar.gitlab.ci_merge_request_iid=$CI_MERGE_REQUEST_IID
-      -Dsonar.gitlab.commit_sha=$CI_MERGE_REQUEST_COMMITS
-      -Dsonar.gitlab.merge_request_discussion=true
-      -Dsonar.gitlab.ref_name=$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME
-      -Dsonar.host.url=$SONAR_HOST_URL
-      -Dsonar.login=$SONAR_LOGIN
-
-code_quality_report:
-  extends:
-    - .sonar_scan_template
-    - .rules:protected
-  allow_failure: true  # it's using exit code to indicate the code analysis result,
-                       # we don't want to block ci when critical issues founded
-  script:
-    - sonar-scanner
-      -Dsonar.branch.name=$CI_COMMIT_REF_NAME
-      -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
-      -Dsonar.exclusions=$EXCLUSIONS
-      -Dsonar.gitlab.commit_sha=$PIPELINE_COMMIT_SHA
-      -Dsonar.gitlab.ref_name=$CI_COMMIT_REF_NAME
-      -Dsonar.host.url=$SONAR_HOST_URL
-      -Dsonar.login=$SONAR_LOGIN
+#code_quality_report:
+#  extends:
+#    - .sonar_scan_template
+#    - .rules:protected
+#  allow_failure: true  # it's using exit code to indicate the code analysis result,
+#                       # we don't want to block ci when critical issues founded
+#  script:
+#    - sonar-scanner
+#      -Dsonar.branch.name=$CI_COMMIT_REF_NAME
+#      -Dsonar.cxx.clangtidy.reportPath=$REPORT_PATTERN
+#      -Dsonar.exclusions=$EXCLUSIONS
+#      -Dsonar.gitlab.commit_sha=$PIPELINE_COMMIT_SHA
+#      -Dsonar.gitlab.ref_name=$CI_COMMIT_REF_NAME
+#      -Dsonar.host.url=$SONAR_HOST_URL
+#      -Dsonar.login=$SONAR_LOGIN
@@ -3,7 +3,7 @@
 *
 * SPDX-License-Identifier: BSD-1-Clause
 *
- * SPDX-FileContributor: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2017-2024 Espressif Systems (Shanghai) CO LTD
 */
 /*********************************************************************
 *                    SEGGER Microcontroller GmbH                     *
@@ -58,6 +58,7 @@ File    : SEGGER_SYSVIEW_Config_FreeRTOS.c
 Purpose : Sample setup configuration of SystemView with FreeRTOS.
 Revision: $Rev: 7745 $
 */
+#include <string.h>
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"
 #include "SEGGER_SYSVIEW.h"
@@ -156,15 +157,16 @@ static esp_apptrace_lock_t s_sys_view_lock = {.mux = portMUX_INITIALIZER_UNLOCKE
 *    Sends SystemView description strings.
 */
 static void _cbSendSystemDesc(void) {
-    char irq_str[32];
+    char irq_str[32] = "I#";
    SEGGER_SYSVIEW_SendSysDesc("N="SYSVIEW_APP_NAME",D="SYSVIEW_DEVICE_NAME",C="SYSVIEW_CORE_NAME",O=FreeRTOS");
-    snprintf(irq_str, sizeof(irq_str), "I#%d=SysTick", SYSTICK_INTR_ID);
+    strcat(itoa(SYSTICK_INTR_ID, irq_str + 2, 10), "=SysTick");
    SEGGER_SYSVIEW_SendSysDesc(irq_str);
    size_t isr_count = sizeof(esp_isr_names)/sizeof(esp_isr_names[0]);
    for (size_t i = 0; i < isr_count; ++i) {
        if (esp_isr_names[i] == NULL || (ETS_INTERNAL_INTR_SOURCE_OFF + i) == SYSTICK_INTR_ID)
            continue;
-        snprintf(irq_str, sizeof(irq_str), "I#%d=%s", ETS_INTERNAL_INTR_SOURCE_OFF + i, esp_isr_names[i]);
+        strcat(itoa(ETS_INTERNAL_INTR_SOURCE_OFF + i, irq_str + 2, 10), "=");
+        strncat(irq_str, esp_isr_names[i], sizeof(irq_str) - strlen(irq_str) - 1);
        SEGGER_SYSVIEW_SendSysDesc(irq_str);
    }
 }
@@ -58,6 +58,7 @@ foreach(component ${proj_components})
 endforeach()

 set(BOOTLOADER_BUILD 1)
+set(NON_OS_BUILD 1)
 include("${IDF_PATH}/tools/cmake/project.cmake")
 set(common_req log esp_rom esp_common esp_hw_support newlib)
 idf_build_set_property(EXTRA_COMPONENT_EXCLUDE_DIRS "${EXTRA_COMPONENT_EXCLUDE_DIRS}")
@@ -66,6 +67,7 @@ idf_build_set_property(__OUTPUT_SDKCONFIG 0)
 project(bootloader)

 idf_build_set_property(COMPILE_DEFINITIONS "BOOTLOADER_BUILD=1" APPEND)
+idf_build_set_property(COMPILE_DEFINITIONS "NON_OS_BUILD=1" APPEND)
 idf_build_set_property(COMPILE_OPTIONS "-fno-stack-protector" APPEND)

 idf_component_get_property(main_args esptool_py FLASH_ARGS)
@@ -207,7 +209,7 @@ elseif(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
        COMMAND ${CMAKE_COMMAND} -E echo
            "* After first boot, only re-flashes of this kind (with same key) will be accepted."
        COMMAND ${CMAKE_COMMAND} -E echo
-            "* Not recommended to re-use the same secure boot keyfile on multiple production devices."
+            "* Not recommended to reuse the same secure boot keyfile on multiple production devices."
        DEPENDS gen_secure_bootloader_key gen_bootloader_digest_bin
        VERBATIM)
 elseif(
@@ -184,12 +184,14 @@ void esp_flash_encryption_init_checks(void);
 */
 esp_err_t esp_flash_encryption_enable_secure_features(void);

+#if CONFIG_SOC_KEY_MANAGER_FE_KEY_DEPLOY
 /** @brief Enable the key manager for flash encryption
 *
 * @return
 *  - ESP_OK - On success
 */
 esp_err_t esp_flash_encryption_enable_key_mgr(void);
+#endif // CONFIG_SOC_KEY_MANAGER_FE_KEY_DEPLOY

 #endif /* BOOTLOADER_BUILD && CONFIG_SECURE_FLASH_ENC_ENABLED */

@@ -11,9 +11,8 @@
 #include "esp_efuse_table.h"
 #include "esp_log.h"
 #include "sdkconfig.h"
-#include "soc/keymng_reg.h"
-#include "soc/pcr_reg.h"
-#include "soc/pcr_struct.h"
+#include "hal/key_mgr_ll.h"
+#include "hal/mspi_timing_tuning_ll.h"

 static __attribute__((unused)) const char *TAG = "flash_encrypt";

@@ -62,30 +61,21 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
    return ESP_OK;
 }

-// TODO: Update to use LL APIs once key manager support added in IDF-8621
 esp_err_t esp_flash_encryption_enable_key_mgr(void)
 {
-    // Set the force power down bit to 0 to enable key manager
-    PCR.km_pd_ctrl.km_mem_force_pd = 0;
-    // Reset the key manager
-    PCR.km_conf.km_clk_en = 1;
-    PCR.km_conf.km_rst_en = 1;
-    PCR.km_conf.km_rst_en = 0;
+    // Enable and reset key manager
+    // To suppress build errors about spinlock's __DECLARE_RCC_ATOMIC_ENV
+    int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
+    key_mgr_ll_enable_bus_clock(true);
+    key_mgr_ll_enable_peripheral_clock(true);
+    key_mgr_ll_reset_register();

-    // Wait for key manager to be ready
-    while (!PCR.km_conf.km_ready) {
+    while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
    };

-    // Wait for key manager state machine to be idle
-    while (REG_READ(KEYMNG_STATE_REG) != 0) {
-    };
-
-    // Set the key manager to use efuse key
-    REG_SET_FIELD(KEYMNG_STATIC_REG, KEYMNG_USE_EFUSE_KEY, 2);
-
-    // Reset MSPI to re-load the flash encryption key
-    REG_SET_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
-    REG_CLR_BIT(PCR_MSPI_CLK_CONF_REG, PCR_MSPI_AXI_RST_EN);
+    // Force Key Manager to use eFuse key for XTS-AES operation
+    key_mgr_ll_set_key_usage(ESP_KEY_MGR_XTS_AES_128_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
+    _mspi_timing_ll_reset_mspi();

    return ESP_OK;
 }
@@ -258,8 +258,7 @@ esp_err_t esp_flash_encrypt_contents(void)
    REG_WRITE(SENSITIVE_XTS_AES_KEY_UPDATE_REG, 1);
 #endif

-// TODO: Remove C5 target config after key manager LL support- see IDF-8621
-#if CONFIG_SOC_KEY_MANAGER_FE_KEY_DEPLOY || CONFIG_IDF_TARGET_ESP32C5
+#if CONFIG_SOC_KEY_MANAGER_FE_KEY_DEPLOY
    esp_flash_encryption_enable_key_mgr();
 #endif

@@ -865,11 +865,19 @@ if(CONFIG_BT_ENABLED)
    elseif(CONFIG_IDF_TARGET_ESP32C3)
        target_link_directories(${COMPONENT_LIB} INTERFACE
                "${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32c3")
-        target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app_flash)
+        else()
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        endif()
    elseif(CONFIG_IDF_TARGET_ESP32S3)
        target_link_directories(${COMPONENT_LIB} INTERFACE
                "${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3")
-        target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app_flash)
+        else()
+            target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app)
+        endif()
    elseif(CONFIG_BT_CONTROLLER_ENABLED)
        if(CONFIG_IDF_TARGET_ESP32C6)
            add_prebuilt_library(libble_app
@@ -907,6 +915,9 @@ if(CONFIG_BLE_MESH_V11_SUPPORT)
    elseif(CONFIG_IDF_TARGET_ESP32C6)
        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32c6/libble_mesh.a")
        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
+    elseif(CONFIG_IDF_TARGET_ESP32C61)
+        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32c61/libble_mesh.a")
+        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
    elseif(CONFIG_IDF_TARGET_ESP32H2)
        add_prebuilt_library(ble_mesh "esp_ble_mesh/lib/lib/esp32h2/libble_mesh.a")
        target_link_libraries(${COMPONENT_LIB} PRIVATE ble_mesh)
@@ -382,7 +382,7 @@ static void btc_deinit_mem(void) {
        btc_profile_cb_tab = NULL;
    }

-#if (BLE_INCLUDED == TRUE)
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
    if (gl_bta_adv_data_ptr) {
        osi_free(gl_bta_adv_data_ptr);
        gl_bta_adv_data_ptr = NULL;
@@ -392,7 +392,7 @@ static void btc_deinit_mem(void) {
        osi_free(gl_bta_scan_rsp_data_ptr);
        gl_bta_scan_rsp_data_ptr = NULL;
    }
-#endif  ///BLE_INCLUDED == TRUE
+#endif // BLE_42_FEATURE_SUPPORT

 #if GATTS_INCLUDED == TRUE && GATT_DYNAMIC_MEMORY == TRUE
    if (btc_creat_tab_env_ptr) {
@@ -444,7 +444,8 @@ static bt_status_t btc_init_mem(void) {
    }
    memset((void *)btc_profile_cb_tab, 0, sizeof(void *) * BTC_PID_NUM);

-#if (BLE_INCLUDED == TRUE)
+#if BTC_DYNAMIC_MEMORY == TRUE
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
    if ((gl_bta_adv_data_ptr = (tBTA_BLE_ADV_DATA *)osi_malloc(sizeof(tBTA_BLE_ADV_DATA))) == NULL) {
        goto error_exit;
    }
@@ -454,7 +455,8 @@ static bt_status_t btc_init_mem(void) {
        goto error_exit;
    }
    memset((void *)gl_bta_scan_rsp_data_ptr, 0, sizeof(tBTA_BLE_ADV_DATA));
-#endif  ///BLE_INCLUDED == TRUE
+#endif // (BLE_42_FEATURE_SUPPORT == TRUE)
+#endif // BTC_DYNAMIC_MEMORY == TRUE

 #if GATTS_INCLUDED == TRUE && GATT_DYNAMIC_MEMORY == TRUE
    if ((btc_creat_tab_env_ptr = (esp_btc_creat_tab_t *)osi_malloc(sizeof(esp_btc_creat_tab_t))) == NULL) {
@@ -305,19 +305,27 @@ void bt_hci_log_data_show(bt_hci_log_t *p_hci_log_ctl)

    osi_mutex_unlock(&mutex_lock);
 }
+static bool enable_hci_log_flag = true;
+void bt_hci_log_record_hci_enable(bool enable)
+{
+    enable_hci_log_flag = enable;
+}

 esp_err_t IRAM_ATTR bt_hci_log_record_hci_data(uint8_t data_type, uint8_t *data, uint8_t data_len)
 {
+    if (!enable_hci_log_flag) return ESP_OK;
    return bt_hci_log_record_data(&g_bt_hci_log_data_ctl, NULL, data_type, data, data_len);
 }

 esp_err_t IRAM_ATTR bt_hci_log_record_custom_data(char *string, uint8_t *data, uint8_t data_len)
 {
+    if (!enable_hci_log_flag) return ESP_OK;
    return bt_hci_log_record_data(&g_bt_hci_log_data_ctl, string, HCI_LOG_DATA_TYPE_SELF_DEFINE, data, data_len);
 }

 esp_err_t IRAM_ATTR bt_hci_log_record_hci_adv(uint8_t data_type, uint8_t *data, uint8_t data_len)
 {
+    if (!enable_hci_log_flag) return ESP_OK;
    return bt_hci_log_record_data(&g_bt_hci_log_adv_ctl, NULL, data_type, data, data_len);
 }

@@ -241,5 +241,8 @@ void *osi_calloc_func(size_t size)

 void osi_free_func(void *ptr)
 {
+#if HEAP_MEMORY_DEBUG
+    osi_mem_dbg_clean(ptr, __func__, __LINE__);
+#endif
    free(ptr);
 }
@@ -29,6 +29,15 @@ void *osi_malloc_func(size_t size);
 void *osi_calloc_func(size_t size);
 void osi_free_func(void *ptr);

+// Memory alloc function without print and assertion
+#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
+#define osi_malloc_base(size)             heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
+#define osi_calloc_base(size)             heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
+#else
+#define osi_malloc_base(size)             malloc((size))
+#define osi_calloc_base(size)             calloc(1, (size))
+#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
+
 #if HEAP_MEMORY_DEBUG

 void osi_mem_dbg_init(void);
@@ -41,13 +50,10 @@ void osi_men_dbg_set_section_start(uint8_t index);
 void osi_men_dbg_set_section_end(uint8_t index);
 uint32_t osi_mem_dbg_get_max_size_section(uint8_t index);

-#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
 #define osi_malloc(size)                                \
 ({                                                      \
    void *p;                                            \
-    p = heap_caps_malloc_prefer(size, 2,                \
-        MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM,           \
-        MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);        \
+    p = osi_malloc_base(size);                          \
    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
    (void *)p;                                          \
 })
@@ -55,34 +61,11 @@ uint32_t osi_mem_dbg_get_max_size_section(uint8_t index);
 #define osi_calloc(size)                                \
 ({                                                      \
    void *p;                                            \
-    p = heap_caps_calloc_prefer(1, size, 2,             \
-        MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM,           \
-        MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);        \
+    p = osi_calloc_base(size);                          \
    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
    (void *)p;                                          \
 })

-#else
-
-#define osi_malloc(size)                                \
-({                                                      \
-    void *p;                                            \
-    p = malloc((size));                                 \
-    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
-    (void *)p;                                          \
-})
-
-#define osi_calloc(size)                                \
-({                                                      \
-    void *p;                                            \
-    p = calloc(1, (size));                              \
-    osi_mem_dbg_record(p, size, __func__, __LINE__);    \
-    (void *)p;                                          \
-})
-
-#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
-
-
 #if 0
 #define osi_malloc(size)                                \
 do {                                                    \
@@ -122,15 +105,6 @@ do {                                                    \

 #else

-// Memory alloc function without print and assertion
-#if HEAP_ALLOCATION_FROM_SPIRAM_FIRST
-#define osi_malloc_base(size)             heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
-#define osi_calloc_base(size)             heap_caps_calloc_prefer(1, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
-#else
-#define osi_malloc_base(size)             malloc((size))
-#define osi_calloc_base(size)             calloc(1, (size))
-#endif /* #if HEAP_ALLOCATION_FROM_SPIRAM_FIRST */
-
 // Memory alloc function with print and assertion when fails
 #define osi_malloc(size)                  osi_malloc_func((size))
 #define osi_calloc(size)                  osi_calloc_func((size))
@@ -478,6 +478,23 @@ config BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD
        If you set `BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD` to a small value or printf every adv lost event, it
        may cause adv packets lost more.

+menu "BLE disconnect when instant passed"
+    config BTDM_BLE_LLCP_CONN_UPDATE
+        bool "BLE ACL connection update procedure"
+        depends on (BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM)
+        default n
+        help
+            If this option is enabled, Controller will terminate the connection
+            when instant passed during connection update procedure.
+
+    config BTDM_BLE_LLCP_CHAN_MAP_UPDATE
+        bool "BLE ACL channel map update procedure"
+        depends on (BTDM_CTRL_MODE_BLE_ONLY || BTDM_CTRL_MODE_BTDM)
+        default n
+        help
+            If this option is enabled, Controller will terminate the connection
+            when instant passed in channel map update procedure.
+endmenu

 config BTDM_RESERVE_DRAM
    hex
@@ -226,6 +226,7 @@ config BT_CTRL_DFT_TX_POWER_LEVEL_EFF

 config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
    bool "BLE adv report flow control supported"
+    depends on (!BT_CTRL_RUN_IN_FLASH_ONLY) || (BT_CTRL_RUN_IN_FLASH_ONLY && BT_CTRL_BLE_SCAN)
    default y
    help
        The function is mainly used to enable flow control for advertising reports. When it is enabled,
@@ -489,3 +490,61 @@ config BT_CTRL_LE_PING_EN
    help
        If this option is disabled, The Controller will not start the LE authenticated payload timer.
        This option is used for some compatibility problems related to LE ping procedure.
+
+menu "BLE disconnect when instant passed"
+    config BT_CTRL_BLE_LLCP_CONN_UPDATE
+        bool "BLE ACL connection update procedure"
+        default n
+        help
+            If this option is enabled, Controller will terminate the connection
+            when instant passed during connection update procedure.
+
+    config BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE
+        bool "BLE ACL channel map update procedure"
+        default n
+        help
+            If this option is enabled, Controller will terminate the connection
+            when instant passed in channel map update procedure.
+
+    config BT_CTRL_BLE_LLCP_PHY_UPDATE
+        bool "BLE ACL PHY update procedure"
+        default n
+        help
+            If this option is enabled, Controller will terminate the connection
+            when instant passed in PHY update procedure.
+endmenu
+config BT_CTRL_RUN_IN_FLASH_ONLY
+    bool "Put all BLE Controller code in flash"
+    default n
+    help
+        If this option is enabled, all code for the Bluetooth controller will be moved from ROM and IRAM
+        to flash, saving over 20K bytes of memory. However, it will require more flash resources and the
+        performance of Bluetooth will decrease If this option is enabled, Bluetooth may not work properly
+        during erasing flash. It is recommended to turn on the auto suspend function of flash. After auto
+        suspend is turned on, Bluetooth interrupts can be executed normally during erasing flash, with less
+        impact on Bluetooth performance.
+
+config BT_CTRL_DTM_ENABLE
+    depends on BT_CTRL_RUN_IN_FLASH_ONLY
+    bool "Enable direct test mode feature"
+    default n
+
+config BT_CTRL_BLE_MASTER
+    depends on BT_CTRL_RUN_IN_FLASH_ONLY
+    bool "Enable BLE master role feature"
+    default y
+
+config BT_CTRL_BLE_TEST
+    depends on BT_CTRL_RUN_IN_FLASH_ONLY
+    bool "Enable BLE QA test feature"
+    default n
+
+config BT_CTRL_BLE_SCAN
+    depends on BT_CTRL_RUN_IN_FLASH_ONLY
+    bool "Enable BLE scan feature"
+    default y
+
+config BT_CTRL_BLE_SECURITY_ENABLE
+    depends on BT_CTRL_RUN_IN_FLASH_ONLY && BT_CONTROLLER_ONLY
+    bool "Enable BLE security feature"
+    default y
@@ -499,7 +499,11 @@ static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handle
 {
    btdm_isr_alloc_t p;
    p.source = source;
+#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+    p.flags = ESP_INTR_FLAG_LEVEL3;
+#else
    p.flags = ESP_INTR_FLAG_LEVEL3 | ESP_INTR_FLAG_IRAM;
+#endif
    p.fn = handler;
    p.arg = arg;
    p.handle = (intr_handle_t *)ret_handle;
@@ -1426,6 +1430,10 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)

    ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());

+#if (CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+    ESP_LOGI(BT_LOG_TAG,"Put all controller code in flash");
+#endif
+
    if ((err = btdm_low_power_mode_init(cfg)) != ESP_OK) {
        ESP_LOGE(BT_LOG_TAG, "Low power module initialization failed");
        goto error;
@@ -184,7 +184,6 @@ const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG
 static bool s_ble_active = false;
 #ifdef CONFIG_PM_ENABLE
 static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
-#define BTDM_MIN_TIMER_UNCERTAINTY_US      (200)
 #endif // CONFIG_PM_ENABLE
 static DRAM_ATTR modem_clock_lpclk_src_t s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_INVALID;

@@ -404,7 +403,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
    }
 }

-void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+void IRAM_ATTR sleep_modem_light_sleep_overhead_set(uint32_t overhead)
 {
    r_esp_ble_set_wakeup_overhead(overhead);
 }
@@ -424,16 +423,19 @@ esp_err_t controller_sleep_init(void)
                                BLE_RTC_DELAY_US_MODEM_SLEEP);
 #endif /* FREERTOS_USE_TICKLESS_IDLE */
 #endif // CONFIG_BT_LE_SLEEP_ENABLE
-
 #ifdef CONFIG_PM_ENABLE
    rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
    if (rc != ESP_OK) {
        goto error;
    }
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#endif // CONFIG_PM_ENABLE
+
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
    /* Create a new regdma link for BLE related register restoration */
    rc = sleep_modem_ble_mac_modem_state_init(0);
-    assert(rc == 0);
+    if (rc != ESP_OK) {
+        goto error;
+    }
    esp_sleep_enable_bt_wakeup();
    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");

@@ -446,19 +448,21 @@ esp_err_t controller_sleep_init(void)
    sleep_modem_register_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
                                                   sleep_modem_mac_bb_power_up_prepare);
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
    return rc;

+#ifdef CONFIG_PM_ENABLE
 error:
-
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#endif // CONFIG_PM_ENABLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    sleep_modem_unregister_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
                                                     sleep_modem_mac_bb_power_up_prepare);
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    esp_sleep_disable_bt_wakeup();
    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#ifdef CONFIG_PM_ENABLE
    /*lock should release first and then delete*/
    if (s_pm_lock != NULL) {
        esp_pm_lock_delete(s_pm_lock);
@@ -471,7 +475,7 @@ error:

 void controller_sleep_deinit(void)
 {
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    sleep_modem_unregister_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
                                                     sleep_modem_mac_bb_power_up_prepare);
@@ -388,7 +388,6 @@ void esp_bt_read_ctrl_log_from_flash(bool output)
 static bool s_ble_active = false;
 #ifdef CONFIG_PM_ENABLE
 static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
-#define BTDM_MIN_TIMER_UNCERTAINTY_US      (200)
 #endif // CONFIG_PM_ENABLE
 static DRAM_ATTR modem_clock_lpclk_src_t s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_INVALID;

@@ -612,7 +611,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
    }
 }

-void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+void IRAM_ATTR sleep_modem_light_sleep_overhead_set(uint32_t overhead)
 {
    r_esp_ble_set_wakeup_overhead(overhead);
 }
@@ -639,17 +638,20 @@ esp_err_t controller_sleep_init(void)
    if (rc != ESP_OK) {
        goto error;
    }
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
-#if CONFIG_BT_LE_SLEEP_ENABLE && SOC_PM_RETENTION_HAS_CLOCK_BUG && !CONFIG_MAC_BB_PD
+#endif // CONFIG_PM_ENABLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if SOC_PM_RETENTION_HAS_CLOCK_BUG && !CONFIG_MAC_BB_PD
 #error "CONFIG_MAC_BB_PD required for BLE light sleep to run properly"
-#endif // CONFIG_BT_LE_SLEEP_ENABLE && SOC_PM_RETENTION_HAS_CLOCK_BUG && !CONFIG_MAC_BB_PD
+#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && !CONFIG_MAC_BB_PD
    /* Create a new regdma link for BLE related register restoration */
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG
    rc = sleep_modem_ble_mac_modem_state_init(1);
 #else
    rc = sleep_modem_ble_mac_modem_state_init(0);
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
-    assert(rc == 0);
+    if (rc != ESP_OK) {
+        goto error;
+    }
    esp_sleep_enable_bt_wakeup();
    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");

@@ -662,19 +664,21 @@ esp_err_t controller_sleep_init(void)
    sleep_modem_register_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
                                                   sleep_modem_mac_bb_power_up_prepare);
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
    return rc;

+#ifdef CONFIG_PM_ENABLE
 error:
-
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#endif // CONFIG_PM_ENABLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    sleep_modem_unregister_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
                                                     sleep_modem_mac_bb_power_up_prepare);
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    esp_sleep_disable_bt_wakeup();
    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#ifdef CONFIG_PM_ENABLE
    /*lock should release first and then delete*/
    if (s_pm_lock != NULL) {
        esp_pm_lock_delete(s_pm_lock);
@@ -687,7 +691,7 @@ error:

 void controller_sleep_deinit(void)
 {
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
    sleep_modem_unregister_mac_bb_module_prepare_callback(sleep_modem_mac_bb_power_down_prepare,
                                                     sleep_modem_mac_bb_power_up_prepare);
@@ -696,7 +700,7 @@ void controller_sleep_deinit(void)
    esp_sleep_disable_bt_wakeup();
    sleep_modem_ble_mac_modem_state_deinit();
    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
 #ifdef CONFIG_PM_ENABLE
    /* lock should be released first */
    esp_pm_lock_delete(s_pm_lock);
@@ -385,7 +385,6 @@ void esp_bt_read_ctrl_log_from_flash(bool output)
 static bool s_ble_active = false;
 #ifdef CONFIG_PM_ENABLE
 static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
-#define BTDM_MIN_TIMER_UNCERTAINTY_US      (200)
 #endif // CONFIG_PM_ENABLE
 static DRAM_ATTR modem_clock_lpclk_src_t s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_INVALID;

@@ -604,7 +603,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
    }
 }

-void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
+void IRAM_ATTR sleep_modem_light_sleep_overhead_set(uint32_t overhead)
 {
    r_esp_ble_set_wakeup_overhead(overhead);
 }
@@ -631,13 +630,17 @@ esp_err_t controller_sleep_init(void)
    if (rc != ESP_OK) {
        goto error;
    }
-
    rc = esp_deep_sleep_register_hook(&r_esp_ble_stop_wakeup_timing);
-    assert(rc == 0);
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+    if (rc != ESP_OK) {
+        goto error;
+    }
+#endif //CONFIG_PM_ENABLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
    /* Create a new regdma link for BLE related register restoration */
    rc = sleep_modem_ble_mac_modem_state_init(0);
-    assert(rc == 0);
+    if (rc != ESP_OK) {
+        goto error;
+    }
    esp_sleep_enable_bt_wakeup();
    ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");

@@ -645,15 +648,17 @@ esp_err_t controller_sleep_init(void)
    if (rc != ESP_OK) {
        goto error;
    }
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
    return rc;

+#ifdef CONFIG_PM_ENABLE
 error:
-
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#endif // CONFIG_PM_ENABLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
    esp_sleep_disable_bt_wakeup();
    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#ifdef CONFIG_PM_ENABLE
    esp_deep_sleep_deregister_hook(&r_esp_ble_stop_wakeup_timing);
    /*lock should release first and then delete*/
    if (s_pm_lock != NULL) {
@@ -667,12 +672,12 @@ error:

 void controller_sleep_deinit(void)
 {
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
+#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
    r_ble_rtc_wake_up_state_clr();
    esp_sleep_disable_bt_wakeup();
    sleep_modem_ble_mac_modem_state_deinit();
    esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
-#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
+#endif /* CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE */
 #ifdef CONFIG_PM_ENABLE
    esp_deep_sleep_deregister_hook(&r_esp_ble_stop_wakeup_timing);
    /* lock should be released first */
@@ -1049,6 +1049,23 @@ esp_err_t esp_ble_gap_set_privacy_mode(esp_ble_addr_type_t addr_type, esp_bd_add
            == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
 }

+esp_err_t esp_ble_gap_set_csa_support(uint8_t csa_select)
+{
+    btc_msg_t msg;
+    btc_ble_gap_args_t arg;
+
+    ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
+
+    msg.sig = BTC_SIG_API_CALL;
+    msg.pid = BTC_PID_GAP_BLE;
+    msg.act = BTC_GAP_BLE_SET_CSA_SUPPORT;
+
+    arg.set_csa_support.csa_select = csa_select;
+
+    return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL, NULL)
+            == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
+}
+
 #if (BLE_50_FEATURE_SUPPORT == TRUE)

 esp_err_t esp_ble_gap_read_phy(esp_bd_addr_t bd_addr)
@@ -229,6 +229,7 @@ typedef enum {
    ESP_GAP_BLE_ADD_DEV_TO_RESOLVING_LIST_COMPLETE_EVT,          /*!< when add a device to the resolving list completes, the event comes*/
    ESP_GAP_BLE_VENDOR_CMD_COMPLETE_EVT,                         /*!< When vendor hci command complete, the event comes */
    ESP_GAP_BLE_SET_PRIVACY_MODE_COMPLETE_EVT,                   /*!< When set privacy mode complete, the event comes */
+    ESP_GAP_BLE_SET_CSA_SUPPORT_COMPLETE_EVT,                    /*!< When set CSA support complete, the event comes */
    ESP_GAP_BLE_EVT_MAX,                                         /*!< when maximum advertising event complete, the event comes */
 } esp_gap_ble_cb_event_t;

@@ -1572,6 +1573,12 @@ typedef union {
    struct ble_set_privacy_mode_cmpl_evt_param {
        esp_bt_status_t status;                     /*!< Indicate privacy mode set operation success status */
    } set_privacy_mode_cmpl;                        /*!< Event parameter of ESP_GAP_BLE_SET_PRIVACY_MODE_COMPLETE_EVT */
+    /**
+     * @brief ESP_GAP_BLE_SET_CSA_SUPPORT_COMPLETE_EVT
+     */
+    struct ble_set_csa_support_cmpl_evt_param {
+        esp_bt_status_t status;                     /*!< Indicate CSA support set operation success status */
+    } set_csa_support_cmpl;                        /*!< Event parameter of ESP_GAP_BLE_SET_CSA_SUPPORT_COMPLETE_EVT */
 } esp_ble_gap_cb_param_t;

 /**
@@ -2744,6 +2751,23 @@ esp_err_t esp_ble_gap_vendor_command_send(esp_ble_vendor_cmd_params_t *vendor_cm
 */
 esp_err_t esp_ble_gap_set_privacy_mode(esp_ble_addr_type_t addr_type, esp_bd_addr_t addr, esp_ble_privacy_mode_t mode);

+/**
+ * @brief           This function is used to set which channel selection algorithm(CSA) is supported.
+ *
+ * @note            - This function should only be used when there are BLE compatibility issues about channel hopping after connected.
+ *                    For example, if the peer device only supports CSA#1, this function can be called to make the Controller use CSA#1.
+ *                  - This function is not supported on ESP32.
+ *
+ * @param[in]       csa_select: 0: Channel Selection Algorighm will be selected by Controller
+ *                              1: Select the LE Channel Selection Algorighm #1
+ *                              2: Select the LE Channel Selection Algorighm #2
+ *
+ * @return
+ *                  - ESP_OK : success
+ *                  - other  : failed
+ */
+esp_err_t esp_ble_gap_set_csa_support(uint8_t csa_select);
+
 #ifdef __cplusplus
 }
 #endif
@@ -5859,6 +5859,12 @@ void bta_dm_ble_gap_set_privacy_mode(tBTA_DM_MSG *p_data)
                        p_data->ble_set_privacy_mode.privacy_mode, p_data->ble_set_privacy_mode.p_cback);
 }

+void bta_dm_ble_gap_set_csa_support(tBTA_DM_MSG *p_data)
+{
+    APPL_TRACE_API("%s, csa_select = %d", __func__, p_data->ble_set_csa_support.csa_select);
+    BTM_BleSetCsaSupport(p_data->ble_set_csa_support.csa_select, p_data->ble_set_csa_support.p_cback);
+}
+
 #if (BLE_50_FEATURE_SUPPORT == TRUE)
 void bta_dm_ble_gap_dtm_enhance_tx_start(tBTA_DM_MSG *p_data)
 {
@@ -3025,6 +3025,19 @@ void BTA_DmClearRandAddress(void)
    }
 }

+void BTA_DmBleGapSetCsaSupport(uint8_t csa_select, tBTA_SET_CSA_SUPPORT_CMPL_CBACK *p_callback)
+{
+    tBTA_DM_API_BLE_SET_CSA_SUPPORT *p_msg;
+
+    if ((p_msg = (tBTA_DM_API_BLE_SET_CSA_SUPPORT *)osi_malloc(sizeof(tBTA_DM_API_BLE_SET_CSA_SUPPORT)))
+        != NULL) {
+        p_msg->hdr.event = BTA_DM_API_BLE_SET_CSA_SUPPORT_EVT;
+        p_msg->csa_select = csa_select;
+        p_msg->p_cback = p_callback;
+        bta_sys_sendmsg(p_msg);
+    }
+}
+
 /*******************************************************************************
 **
 ** Function         BTA_VendorInit
@@ -235,6 +235,7 @@ const tBTA_DM_ACTION bta_dm_action[BTA_DM_MAX_EVT] = {
    bta_dm_ble_gap_set_rpa_timeout, /* BTA_DM_API_SET_RPA_TIMEOUT_EVT */
    bta_dm_ble_gap_add_dev_to_resolving_list, /* BTA_DM_API_ADD_DEV_TO_RESOLVING_LIST_EVT */
    bta_dm_ble_gap_set_privacy_mode, /* BTA_DM_API_SET_PRIVACY_MODE_EVT */
+    bta_dm_ble_gap_set_csa_support, /* BTA_DM_API_BLE_SET_CSA_SUPPORT_EVT */
 #endif
 };

@@ -226,6 +226,7 @@ enum {
    BTA_DM_API_SET_RPA_TIMEOUT_EVT,
    BTA_DM_API_ADD_DEV_TO_RESOLVING_LIST_EVT,
    BTA_DM_API_SET_PRIVACY_MODE_EVT,
+    BTA_DM_API_BLE_SET_CSA_SUPPORT_EVT,
 #endif
    BTA_DM_MAX_EVT
 };
@@ -959,6 +960,12 @@ typedef struct {
    tBTA_SET_PRIVACY_MODE_CMPL_CBACK    *p_cback;
 } tBTA_DM_API_SET_PRIVACY_MODE;

+typedef struct {
+    BT_HDR                              hdr;
+    UINT8                               csa_select;
+    tBTA_SET_CSA_SUPPORT_CMPL_CBACK     *p_cback;
+} tBTA_DM_API_BLE_SET_CSA_SUPPORT;
+
 #endif /* BLE_INCLUDED */

 /* data type for BTA_DM_API_REMOVE_ACL_EVT */
@@ -1365,6 +1372,7 @@ typedef union {
    tBTA_DM_API_BLE_DTM_STOP        dtm_stop;
    tBTA_DM_API_CLEAR_ADV           ble_clear_adv;
    tBTA_DM_API_SET_PRIVACY_MODE    ble_set_privacy_mode;
+    tBTA_DM_API_BLE_SET_CSA_SUPPORT ble_set_csa_support;
 #endif

    tBTA_DM_API_REMOVE_ACL              remove_acl;
@@ -1817,6 +1825,7 @@ extern void bta_dm_ble_gap_clear_adv(tBTA_DM_MSG *p_data);
 extern void bta_dm_ble_gap_set_rpa_timeout(tBTA_DM_MSG *p_data);
 extern void bta_dm_ble_gap_add_dev_to_resolving_list(tBTA_DM_MSG *p_data);
 extern void bta_dm_ble_gap_set_privacy_mode(tBTA_DM_MSG *p_data);
+extern void bta_dm_ble_gap_set_csa_support(tBTA_DM_MSG *p_data);
 #if (BLE_50_FEATURE_SUPPORT == TRUE)
 extern void bta_dm_ble_gap_dtm_enhance_tx_start(tBTA_DM_MSG *p_data);
 extern void bta_dm_ble_gap_dtm_enhance_rx_start(tBTA_DM_MSG *p_data);
@@ -538,9 +538,14 @@ void bta_gattc_deinit(void)
 uint8_t bta_gattc_cl_rcb_active_count(void)
 {
    uint8_t count = 0;
+    uint8_t dm_gattc_uuid[16];
+
+    // When SDP is included, Bluedroid stack will register the DM GATTC application
+    memset(dm_gattc_uuid, 0x87, 16);

    for (uint8_t i = 0; i < BTA_GATTC_CL_MAX; i ++) {
-        if (bta_gattc_cb.cl_rcb[i].in_use) {
+        if (bta_gattc_cb.cl_rcb[i].in_use &&
+            memcmp(bta_gattc_cb.cl_rcb[i].app_uuid.uu.uuid128, dm_gattc_uuid, 16)) {
            count++;
        }
    }
@@ -439,6 +439,8 @@ typedef tBTM_ADD_DEV_TO_RESOLVING_LIST_CMPL_CBACK tBTA_ADD_DEV_TO_RESOLVING_LIST

 typedef tBTM_SET_PRIVACY_MODE_CMPL_CBACK tBTA_SET_PRIVACY_MODE_CMPL_CBACK;

+typedef tBTM_SET_CSA_SUPPORT_CMPL_CBACK tBTA_SET_CSA_SUPPORT_CMPL_CBACK;
+
 typedef tBTM_CMPL_CB tBTA_CMPL_CB;

 typedef tBTM_VSC_CMPL tBTA_VSC_CMPL;
@@ -2921,6 +2923,8 @@ extern void BTA_DmBleDtmStop(tBTA_DTM_CMD_CMPL_CBACK *p_dtm_cmpl_cback);

 extern void BTA_DmBleSetPrivacyMode(uint8_t addr_type, BD_ADDR addr, uint8_t privacy_mode, tBTA_SET_PRIVACY_MODE_CMPL_CBACK *p_cback);

+extern void BTA_DmBleGapSetCsaSupport(uint8_t csa_select, tBTM_SET_CSA_SUPPORT_CMPL_CBACK *p_callback);
+
 /*******************************************************************************
 **
 ** Function         BTA_DmBleSetStorageParams
@@ -175,8 +175,7 @@ bool btc_avrc_ct_init_p(void)
 bool btc_avrc_tg_connected_p(void)
 {
    return (s_rc_tg_init == BTC_RC_TG_INIT_MAGIC) &&
-           (btc_rc_cb.rc_connected == TRUE) &&
-           (btc_rc_cb.rc_features & BTA_AV_FEAT_RCCT);
+           (btc_rc_cb.rc_connected == TRUE);
 }

 bool btc_avrc_ct_connected_p(void)
@@ -507,7 +506,7 @@ static void handle_rc_connect (tBTA_AV_RC_OPEN *p_rc_open)
            btc_avrc_ct_cb_to_app(ESP_AVRC_CT_CONNECTION_STATE_EVT, &param);
        }

-        if (p_rc_open->peer_features & BTA_AV_FEAT_RCCT) {
+        if (btc_avrc_tg_init_p()) {
            esp_avrc_tg_cb_param_t param;
            memset(&param, 0, sizeof(esp_avrc_tg_cb_param_t));
            param.conn_stat.connected = true;
@@ -580,7 +579,7 @@ static void handle_rc_disconnect (tBTA_AV_RC_CLOSE *p_rc_close)
        btc_avrc_ct_cb_to_app(ESP_AVRC_CT_CONNECTION_STATE_EVT, &param);
    }

-    if (rc_features & BTA_AV_FEAT_RCCT) {
+    if (btc_avrc_tg_init_p()) {
        esp_avrc_tg_cb_param_t param;
        memset(&param, 0, sizeof(esp_avrc_ct_cb_param_t));
        param.conn_stat.connected = false;
@@ -1006,14 +1005,10 @@ void btc_rc_handler(tBTA_AV_EVT event, tBTA_AV *p_data)
                memcpy(param.conn_stat.remote_bda, btc_rc_cb.rc_addr, sizeof(esp_bd_addr_t));
                btc_avrc_ct_cb_to_app(ESP_AVRC_CT_CONNECTION_STATE_EVT, &param);
            }
-            if ((p_data->rc_feat.peer_features & BTA_AV_FEAT_RCCT) &&
-                !(old_feats & BTA_AV_FEAT_RCCT)) {
-                esp_avrc_tg_cb_param_t param;
-                memset(&param, 0, sizeof(esp_avrc_ct_cb_param_t));
-                param.conn_stat.connected = true;
-                memcpy(param.conn_stat.remote_bda, btc_rc_cb.rc_addr, sizeof(esp_bd_addr_t));
-                btc_avrc_tg_cb_to_app(ESP_AVRC_TG_CONNECTION_STATE_EVT, &param);
-            }
+            /**
+             * @note ESP_AVRC_TG_CONNECTION_STATE_EVT has been reported on rc connect/disconnect event,
+             * it doesn't rely on the SDP results.
+             */
        } while (0);
        btc_rc_cb.rc_features = p_data->rc_feat.peer_features;
        btc_rc_cb.rc_ct_features = p_data->rc_feat.peer_ct_features;
@@ -1363,6 +1363,25 @@ static void btc_ble_set_privacy_mode_callback(UINT8 status)
    }
 }

+static void btc_ble_set_csa_support_callback(UINT8 status)
+{
+    esp_ble_gap_cb_param_t param;
+    bt_status_t ret;
+    btc_msg_t msg = {0};
+
+    msg.sig = BTC_SIG_API_CB;
+    msg.pid = BTC_PID_GAP_BLE;
+    msg.act = ESP_GAP_BLE_SET_CSA_SUPPORT_COMPLETE_EVT;
+
+    param.set_csa_support_cmpl.status = btc_btm_status_to_esp_status(status);
+
+    ret = btc_transfer_context(&msg, &param, sizeof(esp_ble_gap_cb_param_t), NULL, NULL);
+
+    if (ret != BT_STATUS_SUCCESS) {
+        BTC_TRACE_ERROR("%s btc_transfer_context failed\n", __func__);
+    }
+}
+
 void btc_get_whitelist_size(uint16_t *length)
 {
    BTM_BleGetWhiteListSize(length);
@@ -2402,6 +2421,9 @@ void btc_gap_ble_call_handler(btc_msg_t *msg)
        btc_ble_set_privacy_mode(arg->set_privacy_mode.addr_type, arg->set_privacy_mode.addr,
            arg->set_privacy_mode.privacy_mode, btc_ble_set_privacy_mode_callback);
        break;
+    case BTC_GAP_BLE_SET_CSA_SUPPORT:
+        BTA_DmBleGapSetCsaSupport(arg->set_csa_support.csa_select, btc_ble_set_csa_support_callback);
+        break;
    default:
        break;
    }
@@ -11,11 +11,13 @@
 #include "esp_gap_ble_api.h"

 #if BTC_DYNAMIC_MEMORY == TRUE
+#if (BLE_42_FEATURE_SUPPORT == TRUE)
 #include "bta/bta_api.h"
 extern tBTA_BLE_ADV_DATA *gl_bta_adv_data_ptr;
 extern tBTA_BLE_ADV_DATA *gl_bta_scan_rsp_data_ptr;
 #define gl_bta_adv_data     (*gl_bta_adv_data_ptr)
 #define gl_bta_scan_rsp_data    (*gl_bta_scan_rsp_data_ptr)
+#endif // BLE_42_FEATURE_SUPPORT
 #endif

 #define BLE_ISVALID_PARAM(x, min, max)  (((x) >= (min) && (x) <= (max)))
@@ -106,6 +108,7 @@ typedef enum {
    BTC_GAP_BLE_ACT_ADD_DEVICE_TO_RESOLVING_LIST,
    BTC_GAP_BLE_ACT_VENDOR_HCI_CMD_EVT,
    BTC_GAP_BLE_SET_PRIVACY_MODE,
+    BTC_GAP_BLE_SET_CSA_SUPPORT,
 } btc_gap_ble_act_t;

 /* btc_ble_gap_args_t */
@@ -274,6 +277,10 @@ typedef union {
        esp_bd_addr_t addr;
        uint8_t privacy_mode;
    } set_privacy_mode;
+    // BTC_GAP_BLE_SET_CSA_SUPPORT
+    struct set_csa_support_args {
+        uint8_t csa_select;
+    } set_csa_support;
 } btc_ble_gap_args_t;

 #if (BLE_50_FEATURE_SUPPORT == TRUE)
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -281,7 +281,7 @@ static void close_timeout_handler(void *arg)
    status = btc_transfer_context(&msg, slot->alarm_arg, sizeof(tBTA_JV), NULL, NULL);

    if (slot->alarm_arg) {
-        free(slot->alarm_arg);
+        osi_free(slot->alarm_arg);
        slot->alarm_arg = NULL;
    }

@@ -832,7 +832,7 @@ void btc_l2cap_cb_handler(btc_msg_t *msg)
            // if rx still has data, delay free slot
            if (slot->close_alarm == NULL && slot->rx.queue && fixed_queue_length(slot->rx.queue) > 0) {
                tBTA_JV *p_arg = NULL;
-                if ((p_arg = malloc(sizeof(tBTA_JV))) == NULL) {
+                if ((p_arg = osi_malloc(sizeof(tBTA_JV))) == NULL) {
                    param.close.status = ESP_BT_L2CAP_NO_RESOURCE;
                    osi_mutex_unlock(&l2cap_local_param.l2cap_slot_mutex);
                    BTC_TRACE_ERROR("%s unable to malloc slot close_alarm arg!", __func__);
@@ -842,7 +842,7 @@ void btc_l2cap_cb_handler(btc_msg_t *msg)
                slot->alarm_arg = (void *)p_arg;
                if ((slot->close_alarm =
                            osi_alarm_new("slot", close_timeout_handler, (void *)slot, VFS_CLOSE_TIMEOUT)) == NULL) {
-                    free(p_arg);
+                    osi_free(p_arg);
                    slot->alarm_arg = NULL;
                    param.close.status = ESP_BT_L2CAP_NO_RESOURCE;
                    osi_mutex_unlock(&l2cap_local_param.l2cap_slot_mutex);
@@ -850,7 +850,7 @@ void btc_l2cap_cb_handler(btc_msg_t *msg)
                    break;
                }
                if (osi_alarm_set(slot->close_alarm, VFS_CLOSE_TIMEOUT) != OSI_ALARM_ERR_PASS) {
-                    free(p_arg);
+                    osi_free(p_arg);
                    slot->alarm_arg = NULL;
                    osi_alarm_free(slot->close_alarm);
                    param.close.status = ESP_BT_L2CAP_BUSY;
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -1199,7 +1199,7 @@ void btc_spp_cb_handler(btc_msg_t *msg)
                    slot->alarm_arg = (void *)p_arg;
                    if ((slot->close_alarm =
                             osi_alarm_new("slot", close_timeout_handler, (void *)slot, VFS_CLOSE_TIMEOUT)) == NULL) {
-                        free(p_arg);
+                        osi_free(p_arg);
                        slot->alarm_arg = NULL;
                        param.close.status = ESP_SPP_NO_RESOURCE;
                        osi_mutex_unlock(&spp_local_param.spp_slot_mutex);
@@ -1207,7 +1207,7 @@ void btc_spp_cb_handler(btc_msg_t *msg)
                        break;
                    }
                    if (osi_alarm_set(slot->close_alarm, VFS_CLOSE_TIMEOUT) != OSI_ALARM_ERR_PASS) {
-                        free(p_arg);
+                        osi_free(p_arg);
                        slot->alarm_arg = NULL;
                        osi_alarm_free(slot->close_alarm);
                        param.close.status = ESP_SPP_BUSY;
@@ -1488,7 +1488,7 @@ static ssize_t spp_vfs_write(int fd, const void * data, size_t size)
            BTC_TRACE_DEBUG("%s items_waiting:%d, fd:%d\n", __func__, items_waiting, fd);
            osi_mutex_unlock(&spp_local_param.spp_slot_mutex);

-            // block untill under water level, be closed or time out
+            // block until under water level, be closed or time out
            tx_event_group_val =
                xEventGroupWaitBits(spp_local_param.tx_event_group, SLOT_WRITE_BIT(serial) | SLOT_CLOSE_BIT(serial), pdTRUE,
                                    pdFALSE, VFS_WRITE_TIMEOUT / portTICK_PERIOD_MS);
@@ -593,7 +593,11 @@ static int host_recv_pkt_cb(uint8_t *data, uint16_t len)
        }
 #endif
        pkt_size = BT_PKT_LINKED_HDR_SIZE + BT_HDR_SIZE + len;
+        #if HEAP_MEMORY_DEBUG
+        linked_pkt = (pkt_linked_item_t *) osi_calloc(pkt_size);
+        #else
        linked_pkt = (pkt_linked_item_t *) osi_calloc_base(pkt_size);
+        #endif
        if (!linked_pkt) {
 #if (BLE_ADV_REPORT_FLOW_CONTROL == TRUE)
            hci_adv_credits_consumed(1);
@@ -219,7 +219,6 @@ static void parse_ble_read_adv_max_len_response(
        // Size: 2 Octets ; Value: 0x001F – 0x0672 ; Maximum supported advertising data length
        STREAM_TO_UINT16(*adv_max_len_ptr, stream);
    }
-
    osi_free(response);
 }
 #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
@@ -4617,6 +4617,12 @@ void btm_ble_free (void)
 #endif
 }

+static bool enable_topology_check_flag = true;
+void esp_qa_enable_topology_check(bool enable)
+{
+    // This is a workaround: If the topology check is disabled, the 'Supported States' will not be checked.
+    enable_topology_check_flag = enable;
+}
 /*******************************************************************************
 **
 ** Function         btm_ble_topology_check
@@ -4629,6 +4635,7 @@ void btm_ble_free (void)
 *******************************************************************************/
 BOOLEAN btm_ble_topology_check(tBTM_BLE_STATE_MASK request_state_mask)
 {
+    if(!enable_topology_check_flag) return TRUE;
    BOOLEAN rt = FALSE;

    UINT8   state_offset = 0;
@@ -4761,6 +4768,17 @@ BOOLEAN BTM_BleSetPrivacyMode(UINT8 addr_type, BD_ADDR bd_addr, UINT8 privacy_mo
    return TRUE;
 }

+BOOLEAN BTM_BleSetCsaSupport(UINT8 csa_select, tBTM_SET_CSA_SUPPORT_CMPL_CBACK *p_callback)
+{
+    if (btsnd_hcic_ble_set_csa_support(csa_select) != TRUE) {
+        BTM_TRACE_ERROR("LE SetCsaSupport csa_select=%d: error", csa_select);
+        return FALSE;
+    }
+
+    btm_cb.ble_ctr_cb.set_csa_support_cmpl_cb = p_callback;
+    return TRUE;
+}
+
 bool btm_ble_adv_pkt_ready(void)
 {
    tBTM_BLE_CB *p_cb = &btm_cb.ble_ctr_cb;
@@ -773,6 +773,14 @@ void btm_vsc_complete (UINT8 *p, UINT16 opcode, UINT16 evt_len,
            }
            break;
        }
+        case HCI_VENDOR_BLE_SET_CSA_SUPPORT: {
+            uint8_t status;
+            STREAM_TO_UINT8(status, p);
+            if (ble_cb && ble_cb->set_csa_support_cmpl_cb) {
+                ble_cb->set_csa_support_cmpl_cb(status);
+            }
+            break;
+        }
        default:
            break;
    }
@@ -110,6 +110,9 @@ void btm_free(void)
    fixed_queue_free(btm_cb.sec_pending_q, osi_free_func);
    btm_acl_free();
    btm_sec_dev_free();
+#if BTM_SCO_INCLUDED == TRUE
+    btm_sco_free();
+#endif
 #if BTM_DYNAMIC_MEMORY
    FREE_AND_RESET(btm_cb_ptr);
 #endif
@@ -123,6 +123,22 @@ void btm_sco_init (void)
    btm_cb.sco_cb.desired_sco_mode = BTM_DEFAULT_SCO_MODE;
 }

+/*******************************************************************************
+**
+** Function         btm_sco_free
+**
+** Description      Free sco specific fixed_queue from btm control block
+**
+*******************************************************************************/
+void btm_sco_free(void)
+{
+#if (BTM_SCO_HCI_INCLUDED == TRUE)
+    for (int i = 0; i < BTM_MAX_SCO_LINKS; i++) {
+        fixed_queue_free(btm_cb.sco_cb.sco_db[i].xmit_data_q, osi_free_func);
+    }
+#endif
+}
+
 /*******************************************************************************
 **
 ** Function         btm_esco_conn_rsp
@@ -233,7 +249,7 @@ void btm_sco_process_num_bufs (UINT16 num_lm_sco_bufs)
 **                               pointer is used, PCM parameter maintained in
 **                               the control block will be used; otherwise update
 **                               control block value.
-**                  err_data_rpt: Lisbon feature to enable the erronous data report
+**                  err_data_rpt: Lisbon feature to enable the erroneous data report
 **                                or not.
 **
 ** Returns          BTM_SUCCESS if the successful.
@@ -947,7 +963,7 @@ void btm_sco_conn_req (BD_ADDR bda,  DEV_CLASS dev_class, UINT8 link_type)
    for (xx = 0; xx < BTM_MAX_SCO_LINKS; xx++, p++) {
        /*
         * If the sco state is in the SCO_ST_CONNECTING state, we still need
-         * to return accept sco to avoid race conditon for sco creation
+         * to return accept sco to avoid race condition for sco creation
         */
        int rem_bd_matches = p->rem_bd_known &&
                             !memcmp (p->esco.data.bd_addr, bda, BD_ADDR_LEN);
@@ -377,6 +377,7 @@ typedef struct {
    tBTM_BLE_STATE_MASK cur_states; /* bit mask of tBTM_BLE_STATE */
    UINT8 link_count[2]; /* total link count master and slave*/
    tBTM_UPDATE_DUPLICATE_EXCEPTIONAL_LIST_CMPL_CBACK *update_exceptional_list_cmp_cb;
+    tBTM_SET_CSA_SUPPORT_CMPL_CBACK *set_csa_support_cmpl_cb;
 } tBTM_BLE_CB;

 #ifdef __cplusplus
@@ -1119,6 +1119,7 @@ void btm_ble_periodic_adv_sync_trans_complete(UINT16 op_code, UINT8 hci_status,
 ********************************************
 */
 void btm_sco_init (void);
+void btm_sco_free(void);
 void btm_sco_connected (UINT8 hci_status, BD_ADDR bda, UINT16 hci_handle,
                        tBTM_ESCO_DATA *p_esco_data);
 void btm_esco_proc_conn_chg (UINT8 status, UINT16 handle, UINT8 tx_interval,
@@ -1910,7 +1910,7 @@ UINT8 btsnd_hcic_ble_set_default_periodic_adv_sync_trans_params(UINT8 mode, UINT
 }
 #endif // #if (BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER == TRUE)

-UINT8 btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 privacy_mode)
+BOOLEAN btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 privacy_mode)
 {
    BT_HDR *p;
    UINT8 *pp;
@@ -1933,4 +1933,26 @@ UINT8 btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 priva
    btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
    return (TRUE);
 }
+
+BOOLEAN btsnd_hcic_ble_set_csa_support (UINT8 csa_select)
+{
+    BT_HDR *p;
+    UINT8 *pp;
+
+    if ((p = HCI_GET_CMD_BUF (HCIC_PARAM_SIZE_BLE_SET_CSA_SUPPORT)) == NULL) {
+        return (FALSE);
+    }
+
+    pp = (UINT8 *)(p + 1);
+
+    p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_BLE_SET_CSA_SUPPORT;
+    p->offset = 0;
+
+    UINT16_TO_STREAM (pp, HCI_VENDOR_BLE_SET_CSA_SUPPORT);
+    UINT8_TO_STREAM (pp, HCIC_PARAM_SIZE_BLE_SET_CSA_SUPPORT);
+    UINT8_TO_STREAM (pp, csa_select);
+
+    btu_hcif_send_cmd (LOCAL_BR_EDR_CONTROLLER_ID, p);
+    return TRUE;
+}
 #endif
@@ -1007,6 +1007,7 @@ typedef void (tBTM_START_STOP_ADV_CMPL_CBACK) (UINT8 status);
 typedef void (tBTM_UPDATE_DUPLICATE_EXCEPTIONAL_LIST_CMPL_CBACK) (tBTM_STATUS status, uint8_t subcode, uint32_t length, uint8_t *device_info);
 typedef void (tBTM_CLEAR_ADV_CMPL_CBACK) (UINT8 status);
 typedef void (tBTM_SET_PRIVACY_MODE_CMPL_CBACK) (tBTM_STATUS status);
+typedef void (tBTM_SET_CSA_SUPPORT_CMPL_CBACK) (tBTM_STATUS status);

 #if (BLE_50_FEATURE_SUPPORT == TRUE)
 #define    BTM_BLE_5_GAP_READ_PHY_COMPLETE_EVT                     1
@@ -2724,6 +2725,20 @@ BOOLEAN BTM_BleSetPrivacyMode(UINT8 addr_type,
                              UINT8 privacy_mode,
                              tBTM_SET_PRIVACY_MODE_CMPL_CBACK *p_callback);

+/*******************************************************************************
+**
+** Function         BTM_BleSetCsaSupport
+**
+** Description      This function is called to set the ChSel field of Advertising or Initiating PDUs
+**
+** Parameters       csa_select - Select LE Channel Selection Algorithm.
+**                  p_callback - Callback function to be called when the operation is completed.
+**
+** Returns          TRUE if the operation was successful, otherwise FALSE.
+**
+*******************************************************************************/
+BOOLEAN BTM_BleSetCsaSupport (UINT8 csa_select, tBTM_SET_CSA_SUPPORT_CMPL_CBACK *p_callback);
+
 /*
 #ifdef __cplusplus
 }
@@ -422,6 +422,7 @@
 #define HCI_SUBCODE_BLE_ADV_REPORT_FLOW_CONTROL    0x0A
 #define HCI_SUBCODE_BLE_RD_STATIC_ADDR             0x0B
 #define HCI_SUBCODE_BLE_CLEAR_ADV                  0x0C
+#define HCI_SUBCODE_BLE_SET_CSA_SUPPORT            0x12
 #define HCI_SUBCODE_BLE_MAX                        0x7F

 //ESP BT subcode define
@@ -468,6 +469,8 @@
 #define HCI_VENDOR_BLE_ADV_REPORT_FLOW_CONTROL     HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_ADV_REPORT_FLOW_CONTROL)
 /* BLE clear legacy advertising */
 #define HCI_VENDOR_BLE_CLEAR_ADV          HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_CLEAR_ADV)
+/* BLE set CSA support */
+#define HCI_VENDOR_BLE_SET_CSA_SUPPORT    HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BLE, HCI_SUBCODE_BLE_SET_CSA_SUPPORT)
 //ESP BT HCI CMD
 #define HCI_VENDOR_BT_SET_MIN_ENC_KEY_SIZE         HCI_ESP_VENDOR_OPCODE_BUILD(HCI_VENDOR_OGF, HCI_ESP_GROUP_BT, HCI_SUBCODE_BT_SET_MIN_ENC_KEY_SIZE)

@@ -759,6 +759,7 @@ void btsnd_hcic_vendor_spec_cmd (BT_HDR *buffer, UINT16 opcode,
 #define HCIC_PARAM_SIZE_BLE_UPDATE_ADV_FLOW_CONTROL     2
 #define HCIC_PARAM_SIZE_BLE_CLEAR_ADV                   0
 #define HCIC_PARAM_SIZE_SET_PRIVACY_MODE                8
+#define HCIC_PARAM_SIZE_BLE_SET_CSA_SUPPORT             1
 #if (BLE_50_FEATURE_SUPPORT == TRUE)
 #define HCIC_PARAM_SIZE_BLE_READ_PHY                   2
 #define HCIC_PARAM_SIZE_BLE_SET_DEF_PHY                3
@@ -914,7 +915,12 @@ BOOLEAN btsnd_hcic_ble_set_rand_priv_addr_timeout (UINT16 rpa_timout);

 BOOLEAN btsnd_hcic_ble_clear_adv(void);

+BOOLEAN btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 privacy_mode);
+
+BOOLEAN btsnd_hcic_ble_set_csa_support (UINT8 csa_select);
+
 #endif /* BLE_INCLUDED */
+
 #if (BLE_50_FEATURE_SUPPORT == TRUE)
 typedef struct {
    UINT8 scan_type;
@@ -1042,8 +1048,6 @@ UINT8 btsnd_hcic_ble_write_rf_path_compensation(UINT16 rf_tx_path, UINT16 rf_rx_

 #endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)

-UINT8 btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 privacy_mode);
-
 #define HCIC_PARAM_SIZE_WRITE_AUTHENT_PAYLOAD_TOUT  4

 #define HCI__WRITE_AUTHENT_PAYLOAD_TOUT_HANDLE_OFF  0
@@ -376,6 +376,7 @@ void l2cble_scanner_conn_comp (UINT16 handle, BD_ADDR bda, tBLE_ADDR_TYPE type,
    p_lcb->waiting_update_conn_latency = p_lcb->current_used_conn_latency = conn_latency;
    p_lcb->conn_update_mask = L2C_BLE_NOT_DEFAULT_PARAM;
    p_lcb->updating_param_flag = false;
+    p_lcb->ble_addr_type = type;

    /* If there are any preferred connection parameters, set them now */
    if ( (p_dev_rec->conn_params.min_conn_int     >= BTM_BLE_CONN_INT_MIN ) &&
@@ -476,6 +477,7 @@ void l2cble_advertiser_conn_comp (UINT16 handle, BD_ADDR bda, tBLE_ADDR_TYPE typ
    p_lcb->waiting_update_conn_latency      =  p_lcb->current_used_conn_latency = conn_latency;
    p_lcb->conn_update_mask = L2C_BLE_NOT_DEFAULT_PARAM;
    p_lcb->updating_param_flag = false;
+    p_lcb->ble_addr_type = type;

    /* Tell BTM Acl management about the link */
    p_dev_rec = btm_find_or_alloc_dev (bda);
@@ -331,8 +331,7 @@ BOOLEAN  smp_send_msg_to_L2CAP(BD_ADDR rem_bda, BT_HDR *p_toL2CAP)

    if ((l2cap_ret = L2CA_SendFixedChnlData (fixed_cid, rem_bda, p_toL2CAP)) == L2CAP_DW_FAILED) {
        smp_cb.total_tx_unacked -= 1;
-        SMP_TRACE_ERROR("SMP   failed to pass msg:0x%0x to L2CAP",
-                        *((UINT8 *)(p_toL2CAP + 1) + p_toL2CAP->offset));
+        SMP_TRACE_ERROR("SMP failed to pass msg to L2CAP");
        return FALSE;
    } else {
        return TRUE;
@@ -1125,7 +1124,7 @@ BOOLEAN smp_pairing_request_response_parameters_are_valid(tSMP_CB *p_cb)
    SMP_TRACE_DEBUG("%s for cmd code 0x%02x\n", __func__, p_cb->rcvd_cmd_code);

    if (io_caps >= BTM_IO_CAP_MAX) {
-        SMP_TRACE_WARNING("Rcvd from the peer cmd 0x%02x with IO Capabilty \
+        SMP_TRACE_WARNING("Rcvd from the peer cmd 0x%02x with IO Capability \
            value (0x%02x) out of range).\n",
                          p_cb->rcvd_cmd_code, io_caps);
        return FALSE;
@@ -55,7 +55,7 @@ extern "C" {
 *
 * @note Please do not modify this value
 */
-#define ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL  0x20240722
+#define ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL  0x20240926

 /**
 * @brief Bluetooth Controller mode
@@ -178,6 +178,21 @@ the advertising packet will be discarded until the memory is restored. */
 #else
 #define BTDM_CTRL_SCAN_BACKOFF_UPPERLIMITMAX  0
 #endif
+
+#ifdef CONFIG_BTDM_BLE_LLCP_CONN_UPDATE
+#define BTDM_BLE_LLCP_CONN_UPDATE (1<<0)
+#else
+#define BTDM_BLE_LLCP_CONN_UPDATE (0<<0)
+#endif
+
+#ifdef CONFIG_BTDM_BLE_LLCP_CHAN_MAP_UPDATE
+#define BTDM_BLE_LLCP_CHAN_MAP_UPDATE (1<<1)
+#else
+#define BTDM_BLE_LLCP_CHAN_MAP_UPDATE (0<<1)
+#endif
+
+#define BTDM_BLE_LLCP_DISC_FLAG (BTDM_BLE_LLCP_CONN_UPDATE | BTDM_BLE_LLCP_CHAN_MAP_UPDATE)
+
 /**
 * @brief  Default Bluetooth Controller configuration
 */
@@ -206,6 +221,7 @@ the advertising packet will be discarded until the memory is restored. */
    .hli = BTDM_CTRL_HLI,                                                  \
    .dup_list_refresh_period = SCAN_DUPL_CACHE_REFRESH_PERIOD,             \
    .ble_scan_backoff = BTDM_CTRL_SCAN_BACKOFF_UPPERLIMITMAX,              \
+    .ble_llcp_disc_flag = BTDM_BLE_LLCP_DISC_FLAG,                         \
    .magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL,                           \
 }

@@ -258,6 +274,7 @@ typedef struct {
    bool hli;                               /*!< True if using high level interrupt; false otherwise. Configurable in menuconfig */
    uint16_t dup_list_refresh_period;       /*!< Scan duplicate filtering list refresh period in seconds. Configurable in menuconfig */
    bool ble_scan_backoff;                  /*!< True if BLE scan backoff is enabled; false otherwise. Configurable in menuconfig */
+    uint8_t ble_llcp_disc_flag;             /*!< BLE disconnect flag when instant passed. Configurable in menuconfig */
    uint32_t magic;                         /*!< Magic number */
 } esp_bt_controller_config_t;

@@ -19,7 +19,7 @@ extern "C" {
 #endif

 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02404010
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02410230

 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -217,6 +217,80 @@ typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
 #define BLE_HW_TARGET_CODE_CHIP_ECO0                      (0x02010000)
 #endif

+#ifdef CONFIG_BT_CTRL_BLE_LLCP_CONN_UPDATE
+#define BT_CTRL_BLE_LLCP_CONN_UPDATE (1<<0)
+#else
+#define BT_CTRL_BLE_LLCP_CONN_UPDATE (0<<0)
+#endif
+
+#ifdef CONFIG_BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE
+#define BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE (1<<1)
+#else
+#define BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE (0<<1)
+#endif
+
+#ifdef CONFIG_BT_CTRL_BLE_LLCP_PHY_UPDATE
+#define BT_CTRL_BLE_LLCP_PHY_UPDATE (1<<2)
+#else
+#define BT_CTRL_BLE_LLCP_PHY_UPDATE (0<<2)
+#endif
+
+#define BT_CTRL_BLE_LLCP_DISC_FLAG (BT_CTRL_BLE_LLCP_CONN_UPDATE | BT_CTRL_BLE_LLCP_CHAN_MAP_UPDATE | BT_CTRL_BLE_LLCP_PHY_UPDATE)
+#if defined(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
+#define BT_CTRL_RUN_IN_FLASH_ONLY  CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
+#else
+#define BT_CTRL_RUN_IN_FLASH_ONLY  (0)
+#endif
+
+#if (BT_CTRL_RUN_IN_FLASH_ONLY == 1)
+
+#if defined(CONFIG_BT_CTRL_DTM_ENABLE)
+#define BT_CTRL_DTM_ENABLE  CONFIG_BT_CTRL_DTM_ENABLE
+#else
+#define BT_CTRL_DTM_ENABLE  (0)
+#endif
+
+#if defined(CONFIG_BT_CTRL_BLE_MASTER)
+#define BT_CTRL_BLE_MASTER  CONFIG_BT_CTRL_BLE_MASTER
+#else
+#define BT_CTRL_BLE_MASTER  (0)
+#endif
+
+#if defined(CONFIG_BT_CTRL_BLE_TEST)
+#define BT_CTRL_BLE_TEST  CONFIG_BT_CTRL_BLE_TEST
+#else
+#define BT_CTRL_BLE_TEST  (0)
+#endif
+
+#if defined (CONFIG_BT_NIMBLE_SECURITY_ENABLE) || defined (CONFIG_BT_BLE_SMP_ENABLE)
+#ifdef CONFIG_BT_NIMBLE_SECURITY_ENABLE
+#define BLE_SECURITY_ENABLE  (CONFIG_BT_NIMBLE_SECURITY_ENABLE)
+#endif //CONFIG_BT_NIMBLE_SECURITY_ENABLE
+#ifdef CONFIG_BT_BLE_SMP_ENABLE
+#define BLE_SECURITY_ENABLE  (CONFIG_BT_BLE_SMP_ENABLE)
+#endif //CONFIG_BT_BLE_SMP_ENABLE
+#else
+#if defined (CONFIG_BT_CTRL_BLE_SECURITY_ENABLE)
+#define BLE_SECURITY_ENABLE  (CONFIG_BT_CTRL_BLE_SECURITY_ENABLE)
+#else
+#define BLE_SECURITY_ENABLE  (0)
+#endif
+#endif // (CONFIG_BT_NIMBLE_SECURITY_ENABLE) || (CONFIG_BT_BLE_SMP_ENABLE)
+
+#if defined (CONFIG_BT_CTRL_BLE_SCAN)
+#define BT_CTRL_BLE_SCAN    CONFIG_BT_CTRL_BLE_SCAN
+#else
+#define BT_CTRL_BLE_SCAN    (0)
+#endif
+
+#else
+#define BT_CTRL_BLE_MASTER   (1)
+#define BT_CTRL_DTM_ENABLE   (1)
+#define BT_CTRL_BLE_TEST     (1)
+#define BLE_SECURITY_ENABLE  (1)
+#define BT_CTRL_BLE_SCAN     (1)
+#endif // (BT_CTRL_RUN_IN_FLASH_ONLY == 1)
+
 #define BT_CONTROLLER_INIT_CONFIG_DEFAULT() {                              \
    .magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL,                                 \
    .version = ESP_BT_CTRL_CONFIG_VERSION,                                 \
@@ -255,6 +329,13 @@ typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
    .ble_data_lenth_zero_aux = BT_BLE_ADV_DATA_LENGTH_ZERO_AUX,            \
    .ble_chan_ass_en = BT_CTRL_CHAN_ASS_EN,                                \
    .ble_ping_en = BT_CTRL_LE_PING_EN,                                     \
+    .ble_llcp_disc_flag = BT_CTRL_BLE_LLCP_DISC_FLAG,                      \
+    .run_in_flash = BT_CTRL_RUN_IN_FLASH_ONLY,                             \
+    .dtm_en = BT_CTRL_DTM_ENABLE,                                          \
+    .enc_en = BLE_SECURITY_ENABLE,                                         \
+    .qa_test = BT_CTRL_BLE_TEST,                                           \
+    .master_en = BT_CTRL_BLE_MASTER,                                       \
+    .scan_en = BT_CTRL_BLE_SCAN,                                           \
 }

 #else
@@ -329,6 +410,13 @@ typedef struct {
    uint8_t ble_data_lenth_zero_aux;        /*!< Config ext adv aux option */
    uint8_t ble_chan_ass_en;                /*!< BLE channel assessment enable */
    uint8_t ble_ping_en;                    /*!< BLE ping procedure enable */
+    uint8_t ble_llcp_disc_flag;             /*!< BLE disconnect flag when instant passed */
+    bool run_in_flash;                      /*!< Check if controller code is in flash */
+    bool dtm_en;                            /*!< Controller DTM feature is enabled or not */
+    bool enc_en;                            /*!< Controller encryption feature is enabled or not */
+    bool qa_test;                           /*!< Controller QA test feature is enabled or not */
+    bool master_en;                         /*!< Controller master feature is enabled or not */
+    bool scan_en;                           /*!< Controller scan feature is enabled or not */
 } esp_bt_controller_config_t;

 /**
@@ -1479,11 +1479,6 @@ static esp_err_t i2s_init_legacy(i2s_port_t i2s_num, int intr_alloc_flag)
    /* Create power management lock */
 #ifdef CONFIG_PM_ENABLE
    esp_pm_lock_type_t pm_lock = ESP_PM_APB_FREQ_MAX;
-#if SOC_I2S_SUPPORTS_APLL
-    if (p_i2s[i2s_num]->use_apll) {
-        pm_lock = ESP_PM_NO_LIGHT_SLEEP;
-    }
-#endif // SOC_I2S_SUPPORTS_APLL
    ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock, 0, "i2s_driver", &p_i2s[i2s_num]->pm_lock), TAG, "I2S pm lock error");
 #endif //CONFIG_PM_ENABLE

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
@@ -12,6 +12,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
+@pytest.mark.esp32c61
@pytest.mark.generic
@pytest.mark.parametrize(
    'config',
@@ -1,4 +1,5 @@
 idf_build_get_property(target IDF_TARGET)
+idf_build_get_property(non_os_build NON_OS_BUILD)

 if(CONFIG_EFUSE_VIRTUAL)
    message(STATUS "Efuse virtual mode is enabled. If Secure boot or Flash encryption is on"
@@ -28,7 +29,7 @@ list(APPEND srcs "src/esp_efuse_api.c"
                 "src/esp_efuse_utility.c"
                 "src/efuse_controller/keys/${type}/esp_efuse_api_key.c")

-if(BOOTLOADER_BUILD)
+if(non_os_build)
    idf_component_register(SRCS "${srcs}"
                    PRIV_REQUIRES bootloader_support soc spi_flash
                    INCLUDE_DIRS "${include_dirs}"
@@ -13,7 +13,7 @@

 const static char *TAG = "efuse";

-#if defined(BOOTLOADER_BUILD)
+#ifdef NON_OS_BUILD
 #define EFUSE_LOCK_ACQUIRE_RECURSIVE()
 #define EFUSE_LOCK_RELEASE_RECURSIVE()
 #else
@@ -39,11 +39,11 @@ esp_err_t esp_efuse_read_field_blob(const esp_efuse_desc_t* field[], void* dst,
        do {
            memset((uint8_t *)dst, 0, esp_efuse_utility_get_number_of_items(dst_size_bits, 8));
            err = esp_efuse_utility_process(field, dst, dst_size_bits, esp_efuse_utility_fill_buff);
-#ifndef BOOTLOADER_BUILD
+#ifndef NON_OS_BUILD
            if (err == ESP_ERR_DAMAGED_READING) {
                vTaskDelay(1);
            }
-#endif // BOOTLOADER_BUILD
+#endif // NON_OS_BUILD
        } while (err == ESP_ERR_DAMAGED_READING);
    }
    return err;
@@ -67,11 +67,11 @@ esp_err_t esp_efuse_read_field_cnt(const esp_efuse_desc_t* field[], size_t* out_
        do {
            *out_cnt = 0;
            err = esp_efuse_utility_process(field, out_cnt, 0, esp_efuse_utility_count_once);
-#ifndef BOOTLOADER_BUILD
+#ifndef NON_OS_BUILD
            if (err == ESP_ERR_DAMAGED_READING) {
                vTaskDelay(1);
            }
-#endif // BOOTLOADER_BUILD
+#endif // NON_OS_BUILD
        } while (err == ESP_ERR_DAMAGED_READING);
    }
    return err;
@@ -228,7 +228,7 @@ esp_err_t dac_continuous_new_channels(const dac_continuous_config_t *cont_cfg, d

    /* Create PM lock */
 #if CONFIG_PM_ENABLE
-    esp_pm_lock_type_t pm_lock_type = cont_cfg->clk_src == DAC_DIGI_CLK_SRC_APLL ? ESP_PM_NO_LIGHT_SLEEP : ESP_PM_APB_FREQ_MAX;
+    esp_pm_lock_type_t pm_lock_type = ESP_PM_APB_FREQ_MAX;
    ESP_GOTO_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, "dac_driver", &handle->pm_lock), err3, TAG, "Failed to create DAC pm lock");
 #endif
    handle->chan_cnt = __builtin_popcount(cont_cfg->chan_mask);
@@ -312,29 +312,27 @@ static esp_err_t s_hp_i2c_pins_config(i2c_bus_handle_t handle)
    int port_id = handle->port_num;

    // SDA pin configurations
-    gpio_config_t sda_conf = {
-        .intr_type = GPIO_INTR_DISABLE,
-        .mode = GPIO_MODE_INPUT_OUTPUT_OD,
-        .pull_down_en = false,
-        .pull_up_en = handle->pull_up_enable ? GPIO_PULLUP_ENABLE : GPIO_PULLUP_DISABLE,
-        .pin_bit_mask = 1ULL << handle->sda_num,
-    };
    ESP_RETURN_ON_ERROR(gpio_set_level(handle->sda_num, 1), TAG, "i2c sda pin set level failed");
-    ESP_RETURN_ON_ERROR(gpio_config(&sda_conf), TAG, "config GPIO failed");
+    gpio_input_enable(handle->sda_num);
+    gpio_od_enable(handle->sda_num);
+    if (handle->pull_up_enable) {
+        gpio_pullup_en(handle->sda_num);
+    } else {
+        gpio_pullup_dis(handle->sda_num);
+    }
    gpio_func_sel(handle->sda_num, PIN_FUNC_GPIO);
    esp_rom_gpio_connect_out_signal(handle->sda_num, i2c_periph_signal[port_id].sda_out_sig, 0, 0);
    esp_rom_gpio_connect_in_signal(handle->sda_num, i2c_periph_signal[port_id].sda_in_sig, 0);

    // SCL pin configurations
-    gpio_config_t scl_conf = {
-        .intr_type = GPIO_INTR_DISABLE,
-        .mode = GPIO_MODE_INPUT_OUTPUT_OD,
-        .pull_down_en = false,
-        .pull_up_en = handle->pull_up_enable ? GPIO_PULLUP_ENABLE : GPIO_PULLUP_DISABLE,
-        .pin_bit_mask = 1ULL << handle->scl_num,
-    };
    ESP_RETURN_ON_ERROR(gpio_set_level(handle->scl_num, 1), TAG, "i2c scl pin set level failed");
-    ESP_RETURN_ON_ERROR(gpio_config(&scl_conf), TAG, "config GPIO failed");
+    gpio_input_enable(handle->scl_num);
+    gpio_od_enable(handle->scl_num);
+    if (handle->pull_up_enable) {
+        gpio_pullup_en(handle->scl_num);
+    } else {
+        gpio_pullup_dis(handle->scl_num);
+    }
    gpio_func_sel(handle->scl_num, PIN_FUNC_GPIO);
    esp_rom_gpio_connect_out_signal(handle->scl_num, i2c_periph_signal[port_id].scl_out_sig, 0, 0);
    esp_rom_gpio_connect_in_signal(handle->scl_num, i2c_periph_signal[port_id].scl_in_sig, 0);
@@ -406,3 +404,28 @@ esp_err_t i2c_common_set_pins(i2c_bus_handle_t handle)

    return ret;
 }
+
+esp_err_t i2c_common_deinit_pins(i2c_bus_handle_t handle)
+{
+    int port_id = handle->port_num;
+
+    if (handle->is_lp_i2c == false) {
+        ESP_RETURN_ON_ERROR(gpio_output_disable(handle->sda_num), TAG, "disable i2c pins failed");
+        esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT, i2c_periph_signal[port_id].sda_in_sig, 0);
+
+        ESP_RETURN_ON_ERROR(gpio_output_disable(handle->scl_num), TAG, "disable i2c pins failed");
+        esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT, i2c_periph_signal[port_id].scl_in_sig, 0);
+    }
+#if SOC_LP_I2C_SUPPORTED
+    else {
+        ESP_RETURN_ON_ERROR(rtc_gpio_deinit(handle->sda_num), TAG, "deinit rtc gpio failed");
+        ESP_RETURN_ON_ERROR(rtc_gpio_deinit(handle->scl_num), TAG, "deinit rtc gpio failed");
+#if SOC_LP_GPIO_MATRIX_SUPPORTED
+        lp_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT, i2c_periph_signal[port_id].scl_in_sig, 0);
+        lp_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT, i2c_periph_signal[port_id].sda_in_sig, 0);
+#endif
+    }
+#endif
+
+    return ESP_OK;
+}
@@ -784,6 +784,7 @@ static esp_err_t i2c_master_bus_destroy(i2c_master_bus_handle_t bus_handle)
 {
    ESP_RETURN_ON_FALSE(bus_handle, ESP_ERR_INVALID_ARG, TAG, "no memory for i2c master bus");
    i2c_master_bus_handle_t i2c_master = bus_handle;
+    i2c_common_deinit_pins(i2c_master->base);
    if (i2c_release_bus_handle(i2c_master->base) == ESP_OK) {
        if (i2c_master) {
            if (i2c_master->bus_lock_mux) {
@@ -258,6 +258,17 @@ esp_err_t i2c_select_periph_clock(i2c_bus_handle_t handle, soc_module_clk_t clk_
 */
 esp_err_t i2c_common_set_pins(i2c_bus_handle_t handle);

+/**
+ * @brief Deinit I2C SCL/SDA pins
+ *
+ * @param handle I2C bus handle
+ * @return
+ *      - ESP_OK: I2C set SCL/SDA pins successfully.
+ *      - ESP_ERR_INVALID_ARG: Argument error.
+ *      - Otherwise: Set SCL/SDA IOs error.
+ */
+esp_err_t i2c_common_deinit_pins(i2c_bus_handle_t handle);
+
 /**
 * @brief Check whether bus is acquired
 *
@@ -294,6 +294,7 @@ static esp_err_t i2c_slave_bus_destroy(i2c_slave_dev_handle_t i2c_slave)
 {
    if (i2c_slave) {
        i2c_ll_disable_intr_mask(i2c_slave->base->hal.dev, I2C_LL_SLAVE_EVENT_INTR);
+        i2c_common_deinit_pins(i2c_slave->base);
        if (i2c_slave->slv_rx_mux) {
            vSemaphoreDeleteWithCaps(i2c_slave->slv_rx_mux);
            i2c_slave->slv_rx_mux = NULL;
@@ -260,6 +260,22 @@ esp_err_t i2c_master_bus_reset(i2c_master_bus_handle_t bus_handle);
 */
 esp_err_t i2c_master_bus_wait_all_done(i2c_master_bus_handle_t bus_handle, int timeout_ms);

+/**
+ * @brief Retrieves the I2C master bus handle for a specified I2C port number.
+ *
+ * This function retrieves the I2C master bus handle for the
+ * given I2C port number. Please make sure the handle has already been initialized, and this
+ * function would simply returns the existing handle. Note that the returned handle still can't be used concurrently
+ *
+ * @param port_num I2C port number for which the handle is to be retrieved.
+ * @param ret_handle Pointer to a variable where the retrieved handle will be stored.
+ * @return
+ *     - ESP_OK: Success. The handle is retrieved successfully.
+ *     - ESP_ERR_INVALID_ARG: Invalid argument, such as invalid port number
+ *     - ESP_ERR_INVALID_STATE: Invalid state, such as the I2C port is not initialized.
+ */
+esp_err_t i2c_master_get_bus_handle(i2c_port_num_t port_num, i2c_master_bus_handle_t *ret_handle);
+
 #ifdef __cplusplus
 }
 #endif
@@ -15,21 +15,7 @@
 extern "C" {
 #endif

-/**
- * @brief Retrieves the I2C master bus handle for a specified I2C port number.
- *
- * This function retrieves the I2C master bus handle for the
- * given I2C port number. Please make sure the handle has already been initialized, and this
- * function would simply returns the existing handle. Note that the returned handle still can't be used concurrently
- *
- * @param port_num I2C port number for which the handle is to be retrieved.
- * @param ret_handle Pointer to a variable where the retrieved handle will be stored.
- * @return
- *     - ESP_OK: Success. The handle is retrieved successfully.
- *     - ESP_ERR_INVALID_ARG: Invalid argument, such as invalid port number
- *     - ESP_ERR_INVALID_STATE: Invalid state, such as the I2C port is not initialized.
- */
-esp_err_t i2c_master_get_bus_handle(i2c_port_num_t port_num, i2c_master_bus_handle_t *ret_handle);
+// Empty file in order not cause breaking change. Should be removed in next version.

 #ifdef __cplusplus
 }
@@ -19,7 +19,6 @@
 #include "esp_private/periph_ctrl.h"
 #include "driver/gpio.h"
 #include "driver/i2c_master.h"
-#include "esp_private/i2c_platform.h"
 #include "esp_rom_gpio.h"
 #include "esp_log.h"
 #include "test_utils.h"
@@ -199,11 +199,6 @@ esp_err_t i2s_channel_init_pdm_tx_mode(i2s_chan_handle_t handle, const i2s_pdm_t

 #ifdef CONFIG_PM_ENABLE
    esp_pm_lock_type_t pm_type = ESP_PM_APB_FREQ_MAX;
-#if SOC_I2S_SUPPORTS_APLL
-    if (pdm_tx_cfg->clk_cfg.clk_src == I2S_CLK_SRC_APLL) {
-        pm_type = ESP_PM_NO_LIGHT_SLEEP;
-    }
-#endif // SOC_I2S_SUPPORTS_APLL
    ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_type, 0, "i2s_driver", &handle->pm_lock), TAG, "I2S pm lock create failed");
 #endif

@@ -240,11 +240,6 @@ esp_err_t i2s_channel_init_std_mode(i2s_chan_handle_t handle, const i2s_std_conf

 #ifdef CONFIG_PM_ENABLE
    esp_pm_lock_type_t pm_type = ESP_PM_APB_FREQ_MAX;
-#if SOC_I2S_SUPPORTS_APLL
-    if (std_cfg->clk_cfg.clk_src == I2S_CLK_SRC_APLL) {
-        pm_type = ESP_PM_NO_LIGHT_SLEEP;
-    }
-#endif // SOC_I2S_SUPPORTS_APLL
    ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_type, 0, "i2s_driver", &handle->pm_lock), TAG, "I2S pm lock create failed");
 #endif

@@ -246,11 +246,6 @@ esp_err_t i2s_channel_init_tdm_mode(i2s_chan_handle_t handle, const i2s_tdm_conf
 #endif
 #ifdef CONFIG_PM_ENABLE
    esp_pm_lock_type_t pm_type = ESP_PM_APB_FREQ_MAX;
-#if SOC_I2S_SUPPORTS_APLL
-    if (tdm_cfg->clk_cfg.clk_src == I2S_CLK_SRC_APLL) {
-        pm_type = ESP_PM_NO_LIGHT_SLEEP;
-    }
-#endif // SOC_I2S_SUPPORTS_APLL
    ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_type, 0, "i2s_driver", &handle->pm_lock), TAG, "I2S pm lock create failed");
 #endif

@@ -11,6 +11,10 @@ components/esp_driver_i2s/test_apps/i2s_multi_dev:
  disable:
    - if: SOC_I2S_SUPPORTED != 1
    - if: SOC_I2S_HW_VERSION_2 != 1
+  disable_test:
+    - if: IDF_TARGET in ["esp32c61"]  # TODO: [ESP32C61] IDF-11442
+      temporary: true
+      reason: lack of runners
  depends_components:
    - esp_driver_i2s

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
@@ -12,6 +12,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3
@pytest.mark.esp32h2
@pytest.mark.esp32p4
+@pytest.mark.esp32c61
@pytest.mark.generic
@pytest.mark.parametrize(
    'config',
@@ -4,3 +4,4 @@ CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
 CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP=y
+CONFIG_PM_DFS_INIT_AUTO=y
@@ -1,3 +1,3 @@
-| Supported Targets | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S3 |
-| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S3 |
+| ----------------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- |

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@@ -33,6 +33,18 @@ extern "C" {
 #define LEDC_ERR_DUTY           (0xFFFFFFFF)
 #define LEDC_ERR_VAL            (-1)

+/**
+ * @brief Strategies to be applied to the LEDC channel during system Light-sleep period
+ */
+typedef enum {
+    LEDC_SLEEP_MODE_NO_ALIVE_NO_PD = 0,  /*!< The default mode: no LEDC output, and no power off the LEDC power domain. */
+    LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD,   /*!< The low-power-consumption mode: no LEDC output, and allow to power off the LEDC power domain.
+                                              This can save power, but at the expense of more RAM being consumed to save register context.
+                                              This option is only available on targets that support TOP domain to be powered down. */
+    LEDC_SLEEP_MODE_KEEP_ALIVE,          /*!< The high-power-consumption mode: keep LEDC output when the system enters Light-sleep. */
+    LEDC_SLEEP_MODE_INVALID,             /*!< Invalid LEDC sleep mode strategy */
+} ledc_sleep_mode_t;
+
 /**
 * @brief Configuration parameters of LEDC channel for ledc_channel_config function
 */
@@ -44,6 +56,7 @@ typedef struct {
    ledc_timer_t timer_sel;         /*!< Select the timer source of channel (0 - LEDC_TIMER_MAX-1) */
    uint32_t duty;                  /*!< LEDC channel duty, the range of duty setting is [0, (2**duty_resolution)] */
    int hpoint;                     /*!< LEDC channel hpoint value, the range is [0, (2**duty_resolution)-1] */
+    ledc_sleep_mode_t sleep_mode;   /*!< choose the desired behavior for the LEDC channel in Light-sleep */
    struct {
        unsigned int output_invert: 1;/*!< Enable (1) or disable (0) gpio output invert */
    } flags;                        /*!< LEDC flags */
@@ -25,6 +25,12 @@
 #include "esp_private/esp_clk_tree_common.h"
 #include "esp_private/esp_gpio_reserve.h"
 #include "esp_memory_utils.h"
+#include "esp_private/sleep_retention.h"
+#if SOC_PMU_SUPPORTED // TODO: replace when icg API available IDF-7595
+#include "soc/pmu_struct.h"
+#include "hal/pmu_types.h"
+#include "soc/pmu_icg_mapping.h"
+#endif

 static __attribute__((unused)) const char *LEDC_TAG = "ledc";

@@ -58,6 +64,8 @@ static __attribute__((unused)) const char *LEDC_TAG = "ledc";
 #define LEDC_FUNC_CLOCK_ATOMIC()
 #endif

+#define LEDC_USE_RETENTION_LINK  (SOC_LEDC_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)
+
 typedef enum {
    LEDC_FSM_IDLE,
    LEDC_FSM_HW_FADE,
@@ -87,6 +95,10 @@ typedef struct {
 #if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
    ledc_clk_src_t timer_specific_clk[LEDC_TIMER_MAX];  /*!< Tracks the timer-specific clock selection for each timer */
 #endif
+    ledc_sleep_mode_t sleep_mode;                       /*!< Records the sleep strategy to be applied to the LEDC module */
+    bool channel_keep_alive[LEDC_CHANNEL_MAX];          /*!< Records whether each channel needs to keep output during sleep */
+    uint8_t timer_xpd_ref_cnt[LEDC_TIMER_MAX];          /*!< Records the timer (glb_clk) not power down during sleep requirement */
+    bool glb_clk_xpd;                                   /*!< Records the power strategy applied to the global clock */
 } ledc_obj_t;

 static ledc_obj_t *p_ledc_obj[LEDC_SPEED_MODE_MAX] = {
@@ -118,6 +130,37 @@ static const ledc_slow_clk_sel_t s_glb_clks[] = LEDC_LL_GLOBAL_CLOCKS;
 static const ledc_clk_src_t s_timer_specific_clks[] = LEDC_LL_TIMER_SPECIFIC_CLOCKS;
 #endif

+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
+static esp_err_t ledc_create_sleep_retention_link_cb(void *arg)
+{
+#if SOC_LEDC_SUPPORT_SLEEP_RETENTION
+    sleep_retention_module_t module = ledc_reg_retention_info.module_id;
+
+    esp_err_t err = sleep_retention_entries_create(ledc_reg_retention_info.common.regdma_entry_array,
+                                                   ledc_reg_retention_info.common.array_size,
+                                                   REGDMA_LINK_PRI_LEDC, module);
+    bool slp_retention_create_failed = (err != ESP_OK);
+
+    for (int i = 0; i < SOC_LEDC_TIMER_NUM && !slp_retention_create_failed; i++) {
+        err = sleep_retention_entries_create(ledc_reg_retention_info.timer[i].regdma_entry_array,
+                                             ledc_reg_retention_info.timer[i].array_size,
+                                             REGDMA_LINK_PRI_LEDC, module);
+        slp_retention_create_failed |= (err != ESP_OK);
+    }
+
+    for (int j = 0; j < SOC_LEDC_CHANNEL_NUM && !slp_retention_create_failed; j++) {
+        err = sleep_retention_entries_create(ledc_reg_retention_info.channel[j].regdma_entry_array,
+                                             ledc_reg_retention_info.channel[j].array_size,
+                                             REGDMA_LINK_PRI_LEDC, module);
+        slp_retention_create_failed |= (err != ESP_OK);
+    }
+
+    ESP_RETURN_ON_FALSE(!slp_retention_create_failed, err, LEDC_TAG, "create retention link failed");
+#endif
+    return ESP_OK;
+}
+#endif
+
 static void ledc_ls_timer_update(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
 {
    if (speed_mode == LEDC_LOW_SPEED_MODE) {
@@ -240,15 +283,78 @@ static IRAM_ATTR esp_err_t ledc_duty_config(ledc_mode_t speed_mode, ledc_channel
    return ESP_OK;
 }

+/**
+ * return 1 if the global clock cannot keep alive in sleep, as an error raised
+ */
+static bool ledc_glb_clk_set_sleep_mode(ledc_mode_t speed_mode, bool xpd)
+{
+    bool glb_clk_xpd_err = false;
+    if (p_ledc_obj[speed_mode]->glb_clk == LEDC_SLOW_CLK_RC_FAST) {
+        esp_sleep_sub_mode_config(ESP_SLEEP_DIG_USE_RC_FAST_MODE, xpd);
+        p_ledc_obj[speed_mode]->glb_clk_xpd = xpd;
+    }
+#if SOC_LEDC_SUPPORT_XTAL_CLOCK
+    else if (p_ledc_obj[speed_mode]->glb_clk == LEDC_SLOW_CLK_XTAL) {
+        esp_sleep_sub_mode_config(ESP_SLEEP_DIG_USE_XTAL_MODE, xpd);
+        p_ledc_obj[speed_mode]->glb_clk_xpd = xpd;
+    }
+#endif
+    else {
+        if (xpd) {
+            glb_clk_xpd_err = true;
+        }
+    }
+    return glb_clk_xpd_err;
+}
+
+/**
+ * spinlock should wrap outside
+ * return 1 if the timer cannot keep alive in sleep, as an error raised
+ */
+static bool ledc_timer_clk_src_set_xpd_in_sleep(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[timer_sel]++;
+    bool timer_clock_xpd_err = false;
+    // if the timer has not been configured yet, leave the xpd configuration to ledc_timer_config
+    if (p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_sel] && p_ledc_obj[speed_mode]->glb_clk != LEDC_SLOW_CLK_UNINIT && !p_ledc_obj[speed_mode]->glb_clk_xpd) {
+        timer_clock_xpd_err = ledc_glb_clk_set_sleep_mode(speed_mode, true);
+    }
+#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
+    else if (p_ledc_obj[speed_mode]->timer_specific_clk[timer_sel] != LEDC_TIMER_SPECIFIC_CLK_UNINIT) {
+        timer_clock_xpd_err = true;
+    }
+#endif
+    if (timer_clock_xpd_err) {
+        p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[timer_sel]--;
+    }
+    return timer_clock_xpd_err;
+}
+
 esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_timer_t timer_sel)
 {
    LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
    LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
    LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
+
+    bool timer_xpd_err = false;
+    ledc_timer_t old_timer_sel;
+    ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &old_timer_sel);
+
    portENTER_CRITICAL(&ledc_spinlock);
    ledc_hal_bind_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, timer_sel);
    ledc_ls_channel_update(speed_mode, channel);
+
+    if (p_ledc_obj[speed_mode]->channel_keep_alive[channel] && old_timer_sel != timer_sel) {
+        if (p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[old_timer_sel] > 0) {
+            p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[old_timer_sel]--;
+        }
+        // timer clock source should not be powered down during sleep
+        timer_xpd_err = ledc_timer_clk_src_set_xpd_in_sleep(speed_mode, timer_sel);
+    }
    portEXIT_CRITICAL(&ledc_spinlock);
+    if (timer_xpd_err) {
+        ESP_LOGW(LEDC_TAG, "the binded timer can't keep alive in sleep");
+    }
    return ESP_OK;
 }

@@ -316,6 +422,24 @@ static bool ledc_speed_mode_ctx_create(ledc_mode_t speed_mode)
 #if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
            memset(ledc_new_mode_obj->timer_specific_clk, LEDC_TIMER_SPECIFIC_CLK_UNINIT, sizeof(ledc_clk_src_t) * LEDC_TIMER_MAX);
 #endif
+
+            ledc_new_mode_obj->sleep_mode = LEDC_SLEEP_MODE_INVALID;
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP // for targets that is !SOC_LEDC_SUPPORT_SLEEP_RETENTION, retention module should still be inited to avoid TOP PD
+            // Initialize sleep retention module for LEDC
+            sleep_retention_module_t module = ledc_reg_retention_info.module_id;
+            sleep_retention_module_init_param_t init_param = {
+                .cbs = {
+                    .create = {
+                        .handle = ledc_create_sleep_retention_link_cb,
+                        .arg = NULL,
+                    },
+                },
+                .depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
+            };
+            if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
+                ESP_LOGW(LEDC_TAG, "init sleep retention failed for ledc, power domain may be turned off during sleep");
+            }
+#endif
            p_ledc_obj[speed_mode] = ledc_new_mode_obj;
        }
    }
@@ -530,6 +654,8 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
    ESP_LOGD(LEDC_TAG, "Using clock source %d (in %s mode), divisor: 0x%"PRIx32,
             timer_clk_src, (speed_mode == LEDC_LOW_SPEED_MODE ? "slow" : "fast"), div_param);

+    bool timer_clk_xpd_err = false;
+
    /* The following block configures the global clock.
     * Thus, in theory, this only makes sense when configuring the LOW_SPEED timer and the source clock is LEDC_SCLK (as
     * HIGH_SPEED timers won't be clocked by the global clock). However, there are some limitations due to HW design.
@@ -563,16 +689,6 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
        }
        p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_num] = true;
        if (p_ledc_obj[speed_mode]->glb_clk != glb_clk) {
-#if SOC_LIGHT_SLEEP_SUPPORTED
-            /* keep ESP_PD_DOMAIN_RC_FAST on during light sleep */
-            if (glb_clk == LEDC_SLOW_CLK_RC_FAST) {
-                /* Keep ESP_PD_DOMAIN_RC_FAST on during light sleep */
-                esp_sleep_sub_mode_config(ESP_SLEEP_DIG_USE_RC_FAST_MODE, true);
-            } else if (p_ledc_obj[speed_mode]->glb_clk == LEDC_SLOW_CLK_RC_FAST) {
-                /* No need to keep ESP_PD_DOMAIN_RC_FAST on during light sleep anymore */
-                esp_sleep_sub_mode_config(ESP_SLEEP_DIG_USE_RC_FAST_MODE, false);
-            }
-#endif
            // TODO: release old glb_clk (if not UNINIT), and acquire new glb_clk [clk_tree]
            p_ledc_obj[speed_mode]->glb_clk = glb_clk;
            esp_clk_tree_enable_src((soc_module_clk_t)glb_clk, true);
@@ -581,6 +697,13 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
                ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), glb_clk);
            }
        }
+        // acquire power domain for the timer clock source if desired and possible
+        if (p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[timer_num] > 0 && !p_ledc_obj[speed_mode]->glb_clk_xpd) {
+            timer_clk_xpd_err = ledc_glb_clk_set_sleep_mode(speed_mode, true);
+            if (timer_clk_xpd_err) {
+                p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[timer_num] = 0;
+            }
+        }
        portEXIT_CRITICAL(&ledc_spinlock);

        ESP_LOGD(LEDC_TAG, "In slow speed mode, global clk set: %d", glb_clk);
@@ -588,6 +711,19 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n

    /* The divisor is correct, we can write in the hardware. */
    ledc_timer_set(speed_mode, timer_num, div_param, duty_resolution, timer_clk_src);
+
+    portENTER_CRITICAL(&ledc_spinlock);
+    if (p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[timer_num] > 0 && !p_ledc_obj[speed_mode]->glb_clk_xpd) {
+        // if still get into here, it means the speed mode is high speed mode
+        assert(speed_mode != LEDC_LOW_SPEED_MODE);
+        timer_clk_xpd_err = true;
+        p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[timer_num] = 0;
+    }
+    portEXIT_CRITICAL(&ledc_spinlock);
+    if (timer_clk_xpd_err) {
+        ESP_LOGW(LEDC_TAG, "the timer can't keep alive in sleep");
+    }
+
    return ESP_OK;

 error:
@@ -612,6 +748,20 @@ static esp_err_t ledc_timer_del(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
        is_deleted = true;
        p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_sel] = false;
        // TODO: release timer specific clk and global clk if possible [clk_tree]
+
+        // check if the acquired power domain for the timer clock source can be released
+        if (p_ledc_obj[speed_mode]->glb_clk_xpd) {
+            bool timer_clk_allow_pd = true;
+            for (int i = 0; i < LEDC_TIMER_MAX; i++) {
+                if (p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_sel] && p_ledc_obj[speed_mode]->timer_xpd_ref_cnt[i] > 0) {
+                    timer_clk_allow_pd = false;
+                    break;
+                }
+            }
+            if (timer_clk_allow_pd) {
+                ledc_glb_clk_set_sleep_mode(speed_mode, false);
+            }
+        }
    }
    portEXIT_CRITICAL(&ledc_spinlock);
    ESP_RETURN_ON_FALSE(is_configured && is_deleted, ESP_ERR_INVALID_STATE, LEDC_TAG, "timer hasn't been configured, or it is still running, please stop it with ledc_timer_pause first");
@@ -687,6 +837,10 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
    LEDC_ARG_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "gpio_num");
    LEDC_ARG_CHECK(timer_select < LEDC_TIMER_MAX, "timer_select");
    LEDC_ARG_CHECK(intr_type < LEDC_INTR_MAX, "intr_type");
+    LEDC_ARG_CHECK(ledc_conf->sleep_mode < LEDC_SLEEP_MODE_INVALID, "sleep_mode");
+#if !SOC_LEDC_SUPPORT_SLEEP_RETENTION
+    ESP_RETURN_ON_FALSE(ledc_conf->sleep_mode != LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD, ESP_ERR_NOT_SUPPORTED, LEDC_TAG, "register back up is not supported");
+#endif

    esp_err_t ret = ESP_OK;

@@ -732,6 +886,86 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
    /*set LEDC signal in gpio matrix*/
    _ledc_set_pin(gpio_num, output_invert, speed_mode, ledc_channel);

+    // apply desired sleep strategy
+    bool slp_mode_conflict = false;
+    bool slp_retention_alloc __attribute__((unused)) = false;
+    bool slp_retention_free __attribute__((unused)) = false;
+    portENTER_CRITICAL(&ledc_spinlock);
+    if (ledc_conf->sleep_mode == LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD) {
+#if LEDC_USE_RETENTION_LINK
+        if (p_ledc_obj[speed_mode]->sleep_mode == LEDC_SLEEP_MODE_NO_ALIVE_NO_PD || p_ledc_obj[speed_mode]->sleep_mode == LEDC_SLEEP_MODE_KEEP_ALIVE) {
+            // conflict sleep strategy with other LEDC channels, power domain cannot be turned off
+            slp_mode_conflict = true;
+        } else {
+            p_ledc_obj[speed_mode]->sleep_mode = LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD;
+            slp_retention_alloc = true;
+        }
+#endif
+    } else if (ledc_conf->sleep_mode == LEDC_SLEEP_MODE_NO_ALIVE_NO_PD) {
+        if (p_ledc_obj[speed_mode]->sleep_mode == LEDC_SLEEP_MODE_INVALID) {
+            p_ledc_obj[speed_mode]->sleep_mode = LEDC_SLEEP_MODE_NO_ALIVE_NO_PD;
+        }
+#if LEDC_USE_RETENTION_LINK
+        else if (p_ledc_obj[speed_mode]->sleep_mode == LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD) {
+            // conflict sleep strategy with other LEDC channels, power domain might still be turned off
+            slp_mode_conflict = true;
+        }
+#endif
+    } else if (ledc_conf->sleep_mode == LEDC_SLEEP_MODE_KEEP_ALIVE) {
+        p_ledc_obj[speed_mode]->channel_keep_alive[ledc_channel] = true;
+#if LEDC_USE_RETENTION_LINK
+        if (p_ledc_obj[speed_mode]->sleep_mode == LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD) {
+            // conflict sleep strategy with other LEDC channels, power domain won't be turned off
+            slp_mode_conflict = true;
+            slp_retention_free = true;
+        }
+#endif
+        p_ledc_obj[speed_mode]->sleep_mode = LEDC_SLEEP_MODE_KEEP_ALIVE;
+    }
+    portEXIT_CRITICAL(&ledc_spinlock);
+    if (slp_mode_conflict) {
+        ESP_LOGW(LEDC_TAG, "conflict sleep strategy with other LEDC channels, power domain may not be on/off as desired in sleep");
+    }
+#if LEDC_USE_RETENTION_LINK
+    if (slp_retention_alloc) {
+        if (sleep_retention_module_allocate(ledc_reg_retention_info.module_id) != ESP_OK) {
+            ESP_LOGW(LEDC_TAG, "create retention module failed, power domain can't turn off");
+        }
+    }
+    if (slp_retention_free) {
+        sleep_retention_module_free(ledc_reg_retention_info.module_id);
+    }
+#endif
+
+    if (ledc_conf->sleep_mode == LEDC_SLEEP_MODE_KEEP_ALIVE) {
+        // 1. timer clock source should not be powered down during sleep
+        bool timer_xpd_err = false;
+        portENTER_CRITICAL(&ledc_spinlock);
+        timer_xpd_err = ledc_timer_clk_src_set_xpd_in_sleep(speed_mode, timer_select);
+        portEXIT_CRITICAL(&ledc_spinlock);
+        if (timer_xpd_err) {
+            ESP_LOGW(LEDC_TAG, "the binded timer can't keep alive in sleep");
+        }
+
+        // 2. keep IO output during sleep
+        gpio_sleep_sel_dis(gpio_num);
+#if CONFIG_IDF_TARGET_ESP32P4
+        // To workaround DIG-399, all LP IOs are held when LP_PERIPH is powered off to ensure EXT wakeup functionality
+        // But holding LP IOs will cause LEDC signal cannot output on the pad during sleep
+        // Therefore, we will force LP periph xpd in such case
+        if ((1ULL << gpio_num) & SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK) {
+            esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
+        }
+#endif
+
+        // 3. keep related module integrated clock gating on during sleep
+// TODO: use proper icg API IDF-7595
+#if SOC_PMU_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4 // P4 does not have peripheral icg
+        uint32_t val = PMU.hp_sys[PMU_MODE_HP_SLEEP].icg_func;
+        PMU.hp_sys[PMU_MODE_HP_SLEEP].icg_func = (val | BIT(PMU_ICG_FUNC_ENA_LEDC) | BIT(PMU_ICG_FUNC_ENA_IOMUX));
+#endif
+    }
+
    return ret;
 }

@@ -1,5 +1,10 @@
 set(srcs "test_app_main.c"
-         "test_ledc.c")
+         "test_ledc.c"
+         "test_ledc_utils.c")
+
+if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED)
+    list(APPEND srcs "test_ledc_sleep.c")
+endif()

 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
@@ -0,0 +1,3 @@
+dependencies:
+  test_utils:
+    path: ${IDF_PATH}/tools/unit-test-app/components/test_utils
@@ -9,7 +9,8 @@
 #include "esp_heap_caps.h"

 // Some resources are lazy allocated in LEDC driver, the threshold is left for that case
-#define TEST_MEMORY_LEAK_THRESHOLD (400)
+// This leak is large since LEDC driver does not provide channel delete mechanism
+#define TEST_MEMORY_LEAK_THRESHOLD (500)

 void setUp(void)
 {
@@ -22,54 +22,7 @@
 #include "driver/ledc.h"
 #include "soc/ledc_struct.h"
 #include "esp_clk_tree.h"
-
-#define PULSE_IO      5
-
-#define TEST_PWM_FREQ 2000
-
-#if SOC_LEDC_SUPPORT_HS_MODE
-#define TEST_SPEED_MODE LEDC_HIGH_SPEED_MODE
-#define SPEED_MODE_LIST {LEDC_HIGH_SPEED_MODE, LEDC_LOW_SPEED_MODE}
-#else
-#define TEST_SPEED_MODE LEDC_LOW_SPEED_MODE
-#define SPEED_MODE_LIST {LEDC_LOW_SPEED_MODE}
-#endif
-
-#if SOC_LEDC_SUPPORT_APB_CLOCK
-#define TEST_DEFAULT_CLK_CFG LEDC_USE_APB_CLK
-#elif SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
-#if SOC_CLK_TREE_SUPPORTED
-#define TEST_DEFAULT_CLK_CFG LEDC_USE_PLL_DIV_CLK
-#else
-#define TEST_DEFAULT_CLK_CFG LEDC_USE_XTAL_CLK
-#endif
-#endif
-
-static ledc_channel_config_t initialize_channel_config(void)
-{
-    ledc_channel_config_t config;
-    memset(&config, 0, sizeof(ledc_channel_config_t));
-    config.gpio_num = PULSE_IO;
-    config.speed_mode = TEST_SPEED_MODE;
-    config.channel  = LEDC_CHANNEL_0;
-    config.intr_type = LEDC_INTR_DISABLE;
-    config.timer_sel = LEDC_TIMER_0;
-    config.duty = 4000;
-    config.hpoint = 0;
-    return config;
-}
-
-static ledc_timer_config_t create_default_timer_config(void)
-{
-    ledc_timer_config_t ledc_time_config;
-    memset(&ledc_time_config, 0, sizeof(ledc_timer_config_t));
-    ledc_time_config.speed_mode = TEST_SPEED_MODE;
-    ledc_time_config.duty_resolution = LEDC_TIMER_13_BIT;
-    ledc_time_config.timer_num = LEDC_TIMER_0;
-    ledc_time_config.freq_hz = TEST_PWM_FREQ;
-    ledc_time_config.clk_cfg = TEST_DEFAULT_CLK_CFG;
-    return ledc_time_config;
-}
+#include "test_ledc_utils.h"

 static void fade_setup(void)
 {
@@ -474,52 +427,6 @@ TEST_CASE("LEDC multi fade test", "[ledc]")

 #if SOC_PCNT_SUPPORTED // Note. C61, C3, C2 do not have PCNT peripheral, the following test cases cannot be tested

-#include "driver/pulse_cnt.h"
-
-#define HIGHEST_LIMIT 10000
-#define LOWEST_LIMIT -10000
-
-static pcnt_unit_handle_t pcnt_unit;
-static pcnt_channel_handle_t pcnt_chan;
-
-static void setup_testbench(void)
-{
-    pcnt_unit_config_t unit_config = {
-        .high_limit = HIGHEST_LIMIT,
-        .low_limit = LOWEST_LIMIT,
-    };
-    TEST_ESP_OK(pcnt_new_unit(&unit_config, &pcnt_unit));
-    pcnt_chan_config_t chan_config = {
-        .edge_gpio_num = PULSE_IO,
-        .level_gpio_num = -1,
-    };
-    TEST_ESP_OK(pcnt_new_channel(pcnt_unit, &chan_config, &pcnt_chan));
-    TEST_ESP_OK(pcnt_channel_set_level_action(pcnt_chan, PCNT_CHANNEL_LEVEL_ACTION_KEEP, PCNT_CHANNEL_LEVEL_ACTION_KEEP));
-    TEST_ESP_OK(pcnt_channel_set_edge_action(pcnt_chan, PCNT_CHANNEL_EDGE_ACTION_INCREASE, PCNT_CHANNEL_EDGE_ACTION_HOLD));
-    TEST_ESP_OK(pcnt_unit_enable(pcnt_unit));
-}
-
-static void tear_testbench(void)
-{
-    TEST_ESP_OK(pcnt_unit_disable(pcnt_unit));
-    TEST_ESP_OK(pcnt_del_channel(pcnt_chan));
-    TEST_ESP_OK(pcnt_del_unit(pcnt_unit));
-}
-
-// use PCNT to test the waveform of LEDC
-static int wave_count(int last_time)
-{
-    // The input ability of PULSE_IO is disabled after ledc driver install, so we need to re-enable it again
-    gpio_ll_input_enable(&GPIO, PULSE_IO);
-    int test_counter = 0;
-    TEST_ESP_OK(pcnt_unit_clear_count(pcnt_unit));
-    TEST_ESP_OK(pcnt_unit_start(pcnt_unit));
-    vTaskDelay(pdMS_TO_TICKS(last_time));
-    TEST_ESP_OK(pcnt_unit_stop(pcnt_unit));
-    TEST_ESP_OK(pcnt_unit_get_count(pcnt_unit, &test_counter));
-    return test_counter;
-}
-
 // the PCNT will count the frequency of it
 static void frequency_set_get(ledc_mode_t speed_mode, ledc_timer_t timer, uint32_t desired_freq, int16_t theoretical_freq, int16_t error)
 {
@@ -731,8 +638,6 @@ static void ledc_cpu_reset_test_second_stage(void)
    int count;
    TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
    setup_testbench();
-    // reconfigure the GPIO again, as the GPIO output ability has been disabled during initialize pcnt peripheral
-    ledc_set_pin(PULSE_IO, TEST_SPEED_MODE, LEDC_CHANNEL_0);
    count = wave_count(1000);
    TEST_ASSERT_UINT32_WITHIN(5, TEST_PWM_FREQ, count);
    tear_testbench();
@@ -0,0 +1,159 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "unity.h"
+#include "test_utils.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "driver/ledc.h"
+#include "test_ledc_utils.h"
+#include "esp_sleep.h"
+#include "esp_private/sleep_cpu.h"
+#include "esp_private/esp_sleep_internal.h"
+#include "esp_private/esp_pmu.h"
+#include "soc/ledc_periph.h"
+#include "esp_private/sleep_retention.h"
+#include "esp_rom_uart.h"
+
+// Note. Test cases in this file cannot run one after another without reset
+
+/**
+ * @brief Test LEDC can still output PWM signal after light sleep
+ *
+ * @param allow_pd Whether to allow powering down the peripheral in light sleep
+ */
+static void test_ledc_sleep_retention(bool allow_pd)
+{
+    int pulse_count __attribute__((unused)) = 0;
+
+    ledc_timer_config_t ledc_time_config = create_default_timer_config();
+    TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
+
+    ledc_channel_config_t ledc_ch_config = initialize_channel_config();
+    ledc_ch_config.sleep_mode = (allow_pd ? LEDC_SLEEP_MODE_NO_ALIVE_ALLOW_PD : LEDC_SLEEP_MODE_NO_ALIVE_NO_PD);
+    TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
+
+    vTaskDelay(50 / portTICK_PERIOD_MS);
+
+#if SOC_PCNT_SUPPORTED
+    setup_testbench();
+    pulse_count = wave_count(1000);
+    TEST_ASSERT_UINT32_WITHIN(5, TEST_PWM_FREQ, pulse_count);
+    tear_testbench(); // tear down so that PCNT won't affect TOP PD
+#endif
+
+    esp_sleep_context_t sleep_ctx;
+    esp_sleep_set_sleep_context(&sleep_ctx);
+
+#if ESP_SLEEP_POWER_DOWN_CPU
+    TEST_ESP_OK(sleep_cpu_configure(true));
+#endif
+    TEST_ESP_OK(esp_sleep_enable_timer_wakeup(2 * 1000 * 1000));
+
+    printf("Go to light sleep for 2 seconds\n");
+    TEST_ESP_OK(esp_light_sleep_start());
+    printf("Waked up! Let's see if LEDC peripheral can still work...\n");
+
+#if ESP_SLEEP_POWER_DOWN_CPU
+    TEST_ESP_OK(sleep_cpu_configure(false));
+#endif
+
+    printf("Check if the sleep happened as expected\r\n");
+    TEST_ASSERT_EQUAL(0, sleep_ctx.sleep_request_result);
+#if SOC_PMU_SUPPORTED
+    // check if the TOP power domain on/off as desired
+    TEST_ASSERT_EQUAL(allow_pd ? PMU_SLEEP_PD_TOP : 0, (sleep_ctx.sleep_flags) & PMU_SLEEP_PD_TOP);
+#endif
+    esp_sleep_set_sleep_context(NULL);
+
+    if (allow_pd) {
+        // check if the RO duty_r register field get synced back
+        TEST_ASSERT_EQUAL(4000, ledc_get_duty(TEST_SPEED_MODE, LEDC_CHANNEL_0));
+    }
+
+#if SOC_PCNT_SUPPORTED
+    setup_testbench();
+    pulse_count = wave_count(1000);
+    TEST_ASSERT_UINT32_WITHIN(5, TEST_PWM_FREQ, pulse_count);
+    tear_testbench();
+#endif
+}
+
+TEST_CASE("ledc can output after light sleep (LEDC power domain xpd)", "[ledc]")
+{
+    test_ledc_sleep_retention(false);
+}
+
+#if SOC_LEDC_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
+TEST_CASE("ledc can output after light sleep (LEDC power domain pd)", "[ledc]")
+{
+    // test retention feature
+    test_ledc_sleep_retention(true);
+
+    // ledc driver does not have channel release, we will do retention release here to avoid memory leak
+    sleep_retention_module_t module = ledc_reg_retention_info.module_id;
+    sleep_retention_module_free(module);
+    sleep_retention_module_deinit(module);
+}
+#endif
+
+#if SOC_PCNT_SUPPORTED
+static const ledc_clk_src_t test_ledc_clk_in_slp[] = {
+    LEDC_USE_RC_FAST_CLK,
+#if SOC_LEDC_SUPPORT_XTAL_CLOCK
+    LEDC_USE_XTAL_CLK,
+#endif
+};
+
+static const int test_clks_num = sizeof(test_ledc_clk_in_slp) / sizeof(test_ledc_clk_in_slp[0]);
+
+static void ledc_output_monitor(void)
+{
+    setup_testbench();
+
+    for (int i = 0; i < test_clks_num; i++) {
+        unity_wait_for_signal("Go to light sleep for 3 seconds");
+        vTaskDelay(500 / portTICK_PERIOD_MS);
+        int pulse_count = wave_count(1000);
+        uint32_t acceptable_delta = (test_ledc_clk_in_slp[i] == (ledc_clk_src_t)LEDC_USE_RC_FAST_CLK) ? 20 : 5; // RC_FAST as the clk src has a bigger error range is reasonable
+        TEST_ASSERT_UINT32_WITHIN(acceptable_delta, TEST_PWM_LOW_FREQ, pulse_count);
+        unity_wait_for_signal("Waked up!");
+    }
+
+    tear_testbench();
+}
+
+static void ledc_output_in_sleep(void)
+{
+    TEST_ESP_OK(esp_sleep_enable_timer_wakeup(3 * 1000 * 1000));
+
+    ledc_channel_config_t ledc_ch_config = initialize_channel_config();
+    ledc_ch_config.speed_mode = LEDC_LOW_SPEED_MODE;
+    ledc_ch_config.sleep_mode = LEDC_SLEEP_MODE_KEEP_ALIVE;
+    TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
+
+    for (int i = 0; i < test_clks_num; i++) {
+        ledc_timer_config_t ledc_time_config = create_default_timer_config();
+        ledc_time_config.speed_mode = LEDC_LOW_SPEED_MODE;
+        ledc_time_config.clk_cfg = test_ledc_clk_in_slp[i];
+        ledc_time_config.freq_hz = TEST_PWM_LOW_FREQ;
+        TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
+
+        TEST_ESP_OK(ledc_update_duty(ledc_ch_config.speed_mode, ledc_ch_config.channel));
+
+        unity_send_signal("Go to light sleep for 3 seconds");
+        esp_rom_output_tx_wait_idle(CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM); // wait until the signal sent
+        TEST_ESP_OK(esp_light_sleep_start());
+        unity_send_signal("Waked up!");
+
+        TEST_ESP_OK(ledc_timer_pause(ledc_time_config.speed_mode, ledc_time_config.timer_num));
+        ledc_time_config.deconfigure = 1;
+        TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
+    }
+}
+
+TEST_CASE_MULTIPLE_DEVICES("ledc can output during light sleep", "[ledc][test_env=generic_multi_device]", ledc_output_in_sleep, ledc_output_monitor);
+#endif // SOC_PCNT_SUPPORTED
@@ -0,0 +1,84 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <string.h>
+#include "unity.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "test_ledc_utils.h"
+#include "soc/soc_caps.h"
+
+ledc_channel_config_t initialize_channel_config(void)
+{
+    ledc_channel_config_t config;
+    memset(&config, 0, sizeof(ledc_channel_config_t));
+    config.gpio_num = PULSE_IO;
+    config.speed_mode = TEST_SPEED_MODE;
+    config.channel  = LEDC_CHANNEL_0;
+    config.intr_type = LEDC_INTR_DISABLE;
+    config.timer_sel = LEDC_TIMER_0;
+    config.duty = 4000;
+    config.hpoint = 0;
+    return config;
+}
+
+ledc_timer_config_t create_default_timer_config(void)
+{
+    ledc_timer_config_t ledc_time_config;
+    memset(&ledc_time_config, 0, sizeof(ledc_timer_config_t));
+    ledc_time_config.speed_mode = TEST_SPEED_MODE;
+    ledc_time_config.duty_resolution = LEDC_TIMER_13_BIT;
+    ledc_time_config.timer_num = LEDC_TIMER_0;
+    ledc_time_config.freq_hz = TEST_PWM_FREQ;
+    ledc_time_config.clk_cfg = TEST_DEFAULT_CLK_CFG;
+    return ledc_time_config;
+}
+
+// use PCNT to test the waveform of LEDC
+#if SOC_PCNT_SUPPORTED
+#include "driver/pulse_cnt.h"
+
+#define HIGHEST_LIMIT 10000
+#define LOWEST_LIMIT -10000
+
+static pcnt_unit_handle_t pcnt_unit;
+static pcnt_channel_handle_t pcnt_chan;
+
+void setup_testbench(void)
+{
+    pcnt_unit_config_t unit_config = {
+        .high_limit = HIGHEST_LIMIT,
+        .low_limit = LOWEST_LIMIT,
+    };
+    TEST_ESP_OK(pcnt_new_unit(&unit_config, &pcnt_unit));
+    pcnt_chan_config_t chan_config = {
+        .edge_gpio_num = PULSE_IO,
+        .level_gpio_num = -1,
+    };
+    TEST_ESP_OK(pcnt_new_channel(pcnt_unit, &chan_config, &pcnt_chan));
+    TEST_ESP_OK(pcnt_channel_set_level_action(pcnt_chan, PCNT_CHANNEL_LEVEL_ACTION_KEEP, PCNT_CHANNEL_LEVEL_ACTION_KEEP));
+    TEST_ESP_OK(pcnt_channel_set_edge_action(pcnt_chan, PCNT_CHANNEL_EDGE_ACTION_INCREASE, PCNT_CHANNEL_EDGE_ACTION_HOLD));
+    TEST_ESP_OK(pcnt_unit_enable(pcnt_unit));
+}
+
+void tear_testbench(void)
+{
+    TEST_ESP_OK(pcnt_unit_disable(pcnt_unit));
+    TEST_ESP_OK(pcnt_del_channel(pcnt_chan));
+    TEST_ESP_OK(pcnt_del_unit(pcnt_unit));
+}
+
+int wave_count(int last_time)
+{
+    int test_counter = 0;
+    TEST_ESP_OK(pcnt_unit_clear_count(pcnt_unit));
+    TEST_ESP_OK(pcnt_unit_start(pcnt_unit));
+    vTaskDelay(pdMS_TO_TICKS(last_time));
+    TEST_ESP_OK(pcnt_unit_stop(pcnt_unit));
+    TEST_ESP_OK(pcnt_unit_get_count(pcnt_unit, &test_counter));
+    return test_counter;
+}
+#endif
@@ -0,0 +1,61 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
+
+#include "soc/soc_caps.h"
+#include "driver/ledc.h"
+
+#define PULSE_IO      5
+
+#define TEST_PWM_FREQ       2000
+#define TEST_PWM_LOW_FREQ   200
+
+#if SOC_LEDC_SUPPORT_HS_MODE
+#define TEST_SPEED_MODE LEDC_HIGH_SPEED_MODE
+#define SPEED_MODE_LIST {LEDC_HIGH_SPEED_MODE, LEDC_LOW_SPEED_MODE}
+#else
+#define TEST_SPEED_MODE LEDC_LOW_SPEED_MODE
+#define SPEED_MODE_LIST {LEDC_LOW_SPEED_MODE}
+#endif
+
+#if SOC_LEDC_SUPPORT_APB_CLOCK
+#define TEST_DEFAULT_CLK_CFG LEDC_USE_APB_CLK
+#elif SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
+#if SOC_CLK_TREE_SUPPORTED
+#define TEST_DEFAULT_CLK_CFG LEDC_USE_PLL_DIV_CLK
+#else
+#define TEST_DEFAULT_CLK_CFG LEDC_USE_XTAL_CLK
+#endif
+#endif
+
+/**
+ * Initialize a LEDC channel config structure
+ */
+ledc_channel_config_t initialize_channel_config(void);
+
+/**
+ * Initialize a LEDC timer config structure
+ */
+ledc_timer_config_t create_default_timer_config(void);
+
+#if SOC_PCNT_SUPPORTED
+/**
+ * Setup PCNT test bench
+ */
+void setup_testbench(void);
+
+/**
+ * Tear down PCNT test bench
+ */
+void tear_testbench(void);
+
+/**
+ * Use PCNT to count pulse
+ *
+ * @param last_time Duration time in ms
+ * @return Pulse count
+ */
+int wave_count(int last_time);
+#endif
@@ -32,3 +32,19 @@ def test_ledc(dut: IdfDut) -> None:
 )
 def test_ledc_psram(dut: IdfDut) -> None:
    dut.run_all_single_board_cases(reset=True)
+
+
+@pytest.mark.supported_targets
+@pytest.mark.temp_skip_ci(targets=['esp32s3', 'esp32c61'],
+                          reason='s3 multi device runner has no psram, c61 lack of runner IDF-10949')
+@pytest.mark.generic_multi_device
+@pytest.mark.parametrize(
+    'count, config',
+    [
+        (2, 'iram_safe',),
+        (2, 'release',),
+    ],
+    indirect=True
+)
+def test_ledc_multi_device(case_tester) -> None:        # type: ignore
+    case_tester.run_all_multi_dev_cases(reset=True)
@@ -1,5 +1,6 @@
 CONFIG_PM_ENABLE=y
 CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
+CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP=y
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
@@ -2,3 +2,5 @@ CONFIG_FREERTOS_HZ=1000
 CONFIG_ESP_TASK_WDT_INIT=n
 # Disable memory protection, because "LEDC continue work after software reset" test case requires a cpu reset
 CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
+# primitives for checking sleep internal state
+CONFIG_ESP_SLEEP_DEBUG=y
@@ -405,6 +405,10 @@ esp_err_t mcpwm_generator_set_dead_time(mcpwm_gen_handle_t in_generator, mcpwm_g
        mcpwm_ll_deadtime_set_falling_delay(hal->dev, oper_id, config->negedge_delay_ticks);
    }

+    if (delay_on_both_edge && in_generator->gen_id == 0 && oper->generators[1]) {
+        ESP_LOGW(TAG, "generator B will not function correctly. To set deadtime on both edges for one generator while bypassing the deadtime for the other, please set the deadtime for generator B only.");
+    }
+
    ESP_LOGD(TAG, "operator (%d,%d) dead time (R:%"PRIu32",F:%"PRIu32"), topology code:%"PRIx32, group->group_id, oper_id,
             config->posedge_delay_ticks, config->negedge_delay_ticks, mcpwm_ll_deadtime_get_switch_topology(hal->dev, oper_id));
    return ESP_OK;
@@ -41,6 +41,9 @@ typedef struct {
                                                         i.e. high level of valid gpio to enable the clock output, low to disable */
        uint32_t            io_loop_back: 1;        /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
        uint32_t            io_no_init: 1 __attribute__((deprecated)); /*!< Deprecated. Driver won't change the GPIO configuration in inilization. */
+        uint32_t            allow_pd: 1;             /*!< Set to allow power down. When this flag set, the driver will backup/restore the PARLIO registers before/after entering/exist sleep mode.
+                                                         By this approach, the system can power off PARLIO's power domain.
+                                                         This can save power, but at the expense of more RAM being consumed. */
    } flags;                                        /*!< RX driver flags */
 } parlio_rx_unit_config_t;

@@ -40,6 +40,9 @@ typedef struct {
                                       the output clock will be controlled by the MSB bit of the data bus,
                                       i.e. by data_gpio_nums[PARLIO_TX_UNIT_MAX_DATA_WIDTH-1]. High level to enable the clock output, low to disable */
        uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
+        uint32_t allow_pd: 1;      /*!< Set to allow power down. When this flag set, the driver will backup/restore the PARLIO registers before/after entering/exist sleep mode.
+                                       By this approach, the system can power off PARLIO's power domain.
+                                       This can save power, but at the expense of more RAM being consumed. */
    } flags;                      /*!< Extra configuration flags */
 } parlio_tx_unit_config_t;

@@ -18,6 +18,7 @@
 #include "soc/parlio_periph.h"
 #include "hal/parlio_ll.h"
 #include "esp_private/esp_clk.h"
+#include "esp_private/sleep_retention.h"
 #include "parlio_private.h"

 static const char *TAG = "parlio";
@@ -46,6 +47,23 @@ parlio_group_t *parlio_acquire_group_handle(int group_id)
                parlio_ll_enable_bus_clock(group_id, true);
                parlio_ll_reset_register(group_id);
            }
+#if PARLIO_USE_RETENTION_LINK
+            sleep_retention_module_t module_id = parlio_reg_retention_info[group_id].retention_module;
+            sleep_retention_module_init_param_t init_param = {
+                .cbs = {
+                    .create = {
+                        .handle = parlio_create_sleep_retention_link_cb,
+                        .arg = group,
+                    },
+                },
+                .depends = SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM
+            };
+            // we only do retention init here. Allocate retention module in the unit initialization
+            if (sleep_retention_module_init(module_id, &init_param) != ESP_OK) {
+                // even though the sleep retention module init failed, PARLIO driver should still work, so just warning here
+                ESP_LOGW(TAG, "init sleep retention failed %d, power domain may be turned off during sleep", group_id);
+            }
+#endif // PARLIO_USE_RETENTION_LINK
            // hal layer initialize
            parlio_hal_init(&group->hal);
            group->dma_align = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA);
@@ -87,6 +105,16 @@ void parlio_release_group_handle(parlio_group_t *group)
    _lock_release(&s_platform.mutex);

    if (do_deinitialize) {
+#if PARLIO_USE_RETENTION_LINK
+        const periph_retention_module_t module_id = parlio_reg_retention_info[group_id].retention_module;
+        if (sleep_retention_get_created_modules() & BIT(module_id)) {
+            assert(sleep_retention_get_inited_modules() & BIT(module_id));
+            sleep_retention_module_free(module_id);
+        }
+        if (sleep_retention_get_inited_modules() & BIT(module_id)) {
+            sleep_retention_module_deinit(module_id);
+        }
+#endif // PARLIO_USE_RETENTION_LINK
        free(group);
        ESP_LOGD(TAG, "del group(%d)", group_id);
    }
@@ -147,3 +175,32 @@ void parlio_unregister_unit_from_group(parlio_unit_base_handle_t unit)
    /* the parlio unit has a reference of the group, release it now */
    parlio_release_group_handle(group);
 }
+
+#if PARLIO_USE_RETENTION_LINK
+esp_err_t parlio_create_sleep_retention_link_cb(void *arg)
+{
+    parlio_group_t *group = (parlio_group_t *)arg;
+    int group_id = group->group_id;
+    sleep_retention_module_t module_id = parlio_reg_retention_info[group_id].retention_module;
+    esp_err_t err = sleep_retention_entries_create(parlio_reg_retention_info[group_id].regdma_entry_array,
+                                                   parlio_reg_retention_info[group_id].array_size,
+                                                   REGDMA_LINK_PRI_PARLIO, module_id);
+    ESP_RETURN_ON_ERROR(err, TAG, "create retention link failed");
+    return ESP_OK;
+}
+
+void parlio_create_retention_module(parlio_group_t *group)
+{
+    int group_id = group->group_id;
+    sleep_retention_module_t module_id = parlio_reg_retention_info[group_id].retention_module;
+
+    _lock_acquire(&s_platform.mutex);
+    if ((sleep_retention_get_inited_modules() & BIT(module_id)) && !(sleep_retention_get_created_modules() & BIT(module_id))) {
+        if (sleep_retention_module_allocate(module_id) != ESP_OK) {
+            // even though the sleep retention module create failed, PARLIO driver should still work, so just warning here
+            ESP_LOGW(TAG, "create retention module failed, power domain can't turn off");
+        }
+    }
+    _lock_release(&s_platform.mutex);
+}
+#endif // PARLIO_USE_RETENTION_LINK
@@ -24,6 +24,7 @@
 #include "esp_private/periph_ctrl.h"
 #include "esp_private/esp_gpio_reserve.h"
 #include "esp_private/gpio.h"
+#include "esp_private/sleep_retention.h"

 #if CONFIG_PARLIO_ISR_IRAM_SAFE
 #define PARLIO_MEM_ALLOC_CAPS    (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
@@ -44,6 +45,9 @@
 #define PARLIO_INTR_ALLOC_FLAG   (ESP_INTR_FLAG_LOWMED | PARLIO_INTR_ALLOC_FLAG_SHARED)
 #endif

+// Use retention link only when the target supports sleep retention is enabled
+#define PARLIO_USE_RETENTION_LINK  (SOC_PARLIO_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)
+
 #if defined(SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS) // Parlio uses GDMA
 #if defined(SOC_GDMA_BUS_AHB) && (SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS == SOC_GDMA_BUS_AHB)
 typedef dma_descriptor_align4_t     parlio_dma_desc_t;
@@ -149,6 +153,11 @@ esp_err_t parlio_register_unit_to_group(parlio_unit_base_handle_t unit);
 */
 void parlio_unregister_unit_from_group(parlio_unit_base_handle_t unit);

+#if PARLIO_USE_RETENTION_LINK
+esp_err_t parlio_create_sleep_retention_link_cb(void *arg);
+void parlio_create_retention_module(parlio_group_t *group);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
@@ -620,6 +620,10 @@ esp_err_t parlio_new_rx_unit(const parlio_rx_unit_config_t *config, parlio_rx_un
    esp_err_t ret = ESP_OK;
    parlio_rx_unit_handle_t unit = NULL;

+#if !SOC_PARLIO_SUPPORT_SLEEP_RETENTION
+    ESP_RETURN_ON_FALSE(config->flags.allow_pd == 0, ESP_ERR_NOT_SUPPORTED, TAG, "register back up is not supported");
+#endif // SOC_PARLIO_SUPPORT_SLEEP_RETENTION
+
    /* Allocate unit memory */
    unit = heap_caps_calloc(1, sizeof(parlio_rx_unit_t), PARLIO_MEM_ALLOC_CAPS);
    ESP_GOTO_ON_FALSE(unit, ESP_ERR_NO_MEM, err, TAG, "no memory for rx unit");
@@ -676,6 +680,12 @@ esp_err_t parlio_new_rx_unit(const parlio_rx_unit_config_t *config, parlio_rx_un
    }
 #endif  // SOC_PARLIO_RX_CLK_SUPPORT_GATING

+#if PARLIO_USE_RETENTION_LINK
+    if (config->flags.allow_pd != 0) {
+        parlio_create_retention_module(group);
+    }
+#endif // PARLIO_USE_RETENTION_LINK
+
    /* return RX unit handle */
    *ret_unit = unit;

@@ -270,7 +270,7 @@ static esp_err_t parlio_select_periph_clock(parlio_tx_unit_t *tx_unit, const par
 #endif
    esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true);
    PARLIO_CLOCK_SRC_ATOMIC() {
-        // turn on the tx module clock to sync the register configuration to the module
+        // turn on the tx module clock to sync the clock divider configuration because of the CDC (Cross Domain Crossing)
        parlio_ll_tx_enable_clock(hal->regs, true);
        parlio_ll_tx_set_clock_source(hal->regs, clk_src);
        // set clock division
@@ -309,6 +309,10 @@ esp_err_t parlio_new_tx_unit(const parlio_tx_unit_config_t *config, parlio_tx_un
    ESP_RETURN_ON_FALSE(config->flags.clk_gate_en == 0, ESP_ERR_NOT_SUPPORTED, TAG, "clock gating is not supported");
 #endif // SOC_PARLIO_TX_CLK_SUPPORT_GATING

+#if !SOC_PARLIO_SUPPORT_SLEEP_RETENTION
+    ESP_RETURN_ON_FALSE(config->flags.allow_pd == 0, ESP_ERR_NOT_SUPPORTED, TAG, "register back up is not supported");
+#endif // SOC_PARLIO_SUPPORT_SLEEP_RETENTION
+
    // malloc unit memory
    uint32_t mem_caps = PARLIO_MEM_ALLOC_CAPS;
    unit = heap_caps_calloc(1, sizeof(parlio_tx_unit_t) + sizeof(parlio_tx_trans_desc_t) * config->trans_queue_depth, mem_caps);
@@ -381,6 +385,12 @@ esp_err_t parlio_new_tx_unit(const parlio_tx_unit_config_t *config, parlio_tx_un
    // GPIO Matrix/MUX configuration
    ESP_GOTO_ON_ERROR(parlio_tx_unit_configure_gpio(unit, config), err, TAG, "configure gpio failed");

+#if PARLIO_USE_RETENTION_LINK
+    if (config->flags.allow_pd != 0) {
+        parlio_create_retention_module(group);
+    }
+#endif // PARLIO_USE_RETENTION_LINK
+
    portMUX_INITIALIZE(&unit->spinlock);
    atomic_init(&unit->fsm, PARLIO_TX_FSM_INIT);
    // return TX unit handle
@@ -468,13 +478,11 @@ static void IRAM_ATTR parlio_tx_do_transaction(parlio_tx_unit_t *tx_unit, parlio
    while (parlio_ll_tx_is_ready(hal->regs) == false);
    // turn on the core clock after we start the TX unit
    parlio_ll_tx_start(hal->regs, true);
-    PARLIO_CLOCK_SRC_ATOMIC() {
-        parlio_ll_tx_enable_clock(hal->regs, true);
-    }
 }

 esp_err_t parlio_tx_unit_enable(parlio_tx_unit_handle_t tx_unit)
 {
+    parlio_hal_context_t *hal = &tx_unit->base.group->hal;
    ESP_RETURN_ON_FALSE(tx_unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
    parlio_tx_fsm_t expected_fsm = PARLIO_TX_FSM_INIT;
    if (atomic_compare_exchange_strong(&tx_unit->fsm, &expected_fsm, PARLIO_TX_FSM_ENABLE_WAIT)) {
@@ -489,6 +497,11 @@ esp_err_t parlio_tx_unit_enable(parlio_tx_unit_handle_t tx_unit)
        ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_STATE, TAG, "unit not in init state");
    }

+    // enable clock output
+    PARLIO_CLOCK_SRC_ATOMIC() {
+        parlio_ll_tx_enable_clock(hal->regs, true);
+    }
+
    // check if we need to start one pending transaction
    parlio_tx_trans_desc_t *t = NULL;
    expected_fsm = PARLIO_TX_FSM_ENABLE;
@@ -531,6 +544,10 @@ esp_err_t parlio_tx_unit_disable(parlio_tx_unit_handle_t tx_unit)

    // stop the TX engine
    parlio_hal_context_t *hal = &tx_unit->base.group->hal;
+    // disable clock output
+    PARLIO_CLOCK_SRC_ATOMIC() {
+        parlio_ll_tx_enable_clock(hal->regs, false);
+    }
    gdma_stop(tx_unit->dma_chan);
    parlio_ll_tx_start(hal->regs, false);
    parlio_ll_enable_interrupt(hal->regs, PARLIO_LL_EVENT_TX_EOF, false);
@@ -621,9 +638,6 @@ static void IRAM_ATTR parlio_tx_default_isr(void *args)

    if (status & PARLIO_LL_EVENT_TX_EOF) {
        parlio_ll_clear_interrupt_status(hal->regs, PARLIO_LL_EVENT_TX_EOF);
-        PARLIO_CLOCK_SRC_ATOMIC() {
-            parlio_ll_tx_enable_clock(hal->regs, false);
-        }
        parlio_ll_tx_start(hal->regs, false);

        parlio_tx_trans_desc_t *trans_desc = NULL;
@@ -7,6 +7,10 @@ if(CONFIG_PARLIO_ISR_IRAM_SAFE)
    list(REMOVE_ITEM srcs "test_parlio_rx.c")
 endif()

+if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED AND CONFIG_PM_ENABLE)
+    list(APPEND srcs "test_parlio_sleep.c")
+endif()
+
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(SRCS ${srcs}
@@ -56,14 +56,14 @@ extern "C" {
 #elif CONFIG_IDF_TARGET_ESP32P4
 #define TEST_CLK_GPIO       33
 #define TEST_VALID_GPIO     36
-#define TEST_DATA0_GPIO     20
-#define TEST_DATA1_GPIO     21
-#define TEST_DATA2_GPIO     22
-#define TEST_DATA3_GPIO     23
-#define TEST_DATA4_GPIO     45
-#define TEST_DATA5_GPIO     46
-#define TEST_DATA6_GPIO     47
-#define TEST_DATA7_GPIO     48
+#define TEST_DATA0_GPIO     0
+#define TEST_DATA1_GPIO     1
+#define TEST_DATA2_GPIO     2
+#define TEST_DATA3_GPIO     3
+#define TEST_DATA4_GPIO     4
+#define TEST_DATA5_GPIO     5
+#define TEST_DATA6_GPIO     6
+#define TEST_DATA7_GPIO     7
 #else
 #error "Unsupported target"
 #endif
@@ -368,7 +368,7 @@ TEST_CASE("parallel_rx_unit_pulse_delimiter_test_via_i2s", "[parlio_rx]")
 {
    parlio_rx_pulse_delimiter_config_t pls_deli_cfg = {
        .valid_sig_line_id = TEST_VALID_SIG,
-        .sample_edge = PARLIO_SAMPLE_EDGE_POS,
+        .sample_edge = PARLIO_SAMPLE_EDGE_NEG,
        .bit_pack_order = PARLIO_BIT_PACK_ORDER_MSB,
        .eof_data_len = TEST_EOF_DATA_LEN,
        .timeout_ticks = 0,
--- a/Show More
+++ b/Show More