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esp-idf/components/hal/esp32c5/include/hal/parlio_ll.h
Chen Jichang 4b3a2b2f8b fix(parlio): fix rempty interrupt during resetting fifo 
Move the fifo reset to after disabling the tx core clock.
And add external non-free running clock src test.
2025-01-23 17:54:00 +08:00

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