mirror of
https://github.com/espressif/esp-idf.git
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55acc5e5e7
FreeRTOS tasks may now freely use the PIE coprocessor and HWLP feature. Just like the FPU, usiing these coprocessors result in the task being pinned to the core it is currently running on.
257 lines
9.8 KiB
C
257 lines
9.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __RVRUNTIME_FRAMES_H__
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#define __RVRUNTIME_FRAMES_H__
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#include "soc/soc_caps.h"
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/* Align a value up to nearest n-byte boundary, where n is a power of 2. */
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#define ALIGNUP(n, val) (((val) + (n) - 1) & -(n))
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#ifdef STRUCT_BEGIN
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#undef STRUCT_BEGIN
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#undef STRUCT_FIELD
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#undef STRUCT_AFIELD
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#undef STRUCT_END
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#endif
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#ifdef __clang__
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#define STRUCT_BEGIN .set RV_STRUCT_OFFSET, 0
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#define STRUCT_FIELD(ctype,size,asname,name) .set asname, RV_STRUCT_OFFSET; .set RV_STRUCT_OFFSET, asname + size
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#define STRUCT_AFIELD(ctype,size,asname,name,n) .set asname, RV_STRUCT_OFFSET;\
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.set RV_STRUCT_OFFSET, asname + (size)*(n);
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#define STRUCT_END(sname) .set sname##Size, RV_STRUCT_OFFSET;
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#else // __clang__
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#define STRUCT_BEGIN .pushsection .text; .struct 0
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#define STRUCT_FIELD(ctype,size,asname,name) asname: .space size
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#define STRUCT_AFIELD(ctype,size,asname,name,n) asname: .space (size)*(n)
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#define STRUCT_END(sname) sname##Size:; .popsection
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#endif // __clang__
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#else
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#define STRUCT_BEGIN typedef struct {
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#define STRUCT_FIELD(ctype,size,asname,name) ctype name;
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#define STRUCT_AFIELD(ctype,size,asname,name,n) ctype name[n];
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#define STRUCT_END(sname) } sname;
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#endif
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/*
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-------------------------------------------------------------------------------
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INTERRUPT/EXCEPTION STACK FRAME FOR A EXCEPTION OR NESTED INTERRUPT
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-------------------------------------------------------------------------------
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*/
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STRUCT_BEGIN
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STRUCT_FIELD (long, 4, RV_STK_MEPC, mepc) /* Machine Exception Program Counter */
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STRUCT_FIELD (long, 4, RV_STK_RA, ra) /* Return address */
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STRUCT_FIELD (long, 4, RV_STK_SP, sp) /* Stack pointer */
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STRUCT_FIELD (long, 4, RV_STK_GP, gp) /* Global pointer */
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STRUCT_FIELD (long, 4, RV_STK_TP, tp) /* Thread pointer */
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STRUCT_FIELD (long, 4, RV_STK_T0, t0) /* Temporary/alternate link register */
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STRUCT_FIELD (long, 4, RV_STK_T1, t1) /* t1-2: Temporaries */
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STRUCT_FIELD (long, 4, RV_STK_T2, t2)
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STRUCT_FIELD (long, 4, RV_STK_S0, s0) /* Saved register/frame pointer */
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STRUCT_FIELD (long, 4, RV_STK_S1, s1) /* Saved register */
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STRUCT_FIELD (long, 4, RV_STK_A0, a0) /* a0-1: Function arguments/return address */
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STRUCT_FIELD (long, 4, RV_STK_A1, a1)
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STRUCT_FIELD (long, 4, RV_STK_A2, a2) /* a2-7: Function arguments */
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STRUCT_FIELD (long, 4, RV_STK_A3, a3)
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STRUCT_FIELD (long, 4, RV_STK_A4, a4)
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STRUCT_FIELD (long, 4, RV_STK_A5, a5)
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STRUCT_FIELD (long, 4, RV_STK_A6, a6)
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STRUCT_FIELD (long, 4, RV_STK_A7, a7)
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STRUCT_FIELD (long, 4, RV_STK_S2, s2) /* s2-11: Saved registers */
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STRUCT_FIELD (long, 4, RV_STK_S3, s3)
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STRUCT_FIELD (long, 4, RV_STK_S4, s4)
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STRUCT_FIELD (long, 4, RV_STK_S5, s5)
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STRUCT_FIELD (long, 4, RV_STK_S6, s6)
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STRUCT_FIELD (long, 4, RV_STK_S7, s7)
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STRUCT_FIELD (long, 4, RV_STK_S8, s8)
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STRUCT_FIELD (long, 4, RV_STK_S9, s9)
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STRUCT_FIELD (long, 4, RV_STK_S10, s10)
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STRUCT_FIELD (long, 4, RV_STK_S11, s11)
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STRUCT_FIELD (long, 4, RV_STK_T3, t3) /* t3-6: Temporaries */
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STRUCT_FIELD (long, 4, RV_STK_T4, t4)
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STRUCT_FIELD (long, 4, RV_STK_T5, t5)
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STRUCT_FIELD (long, 4, RV_STK_T6, t6)
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STRUCT_FIELD (long, 4, RV_STK_MSTATUS, mstatus) /* Machine Status */
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STRUCT_FIELD (long, 4, RV_STK_MTVEC, mtvec) /* Machine Trap-Vector Base Address */
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STRUCT_FIELD (long, 4, RV_STK_MCAUSE, mcause) /* Machine Trap Cause */
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STRUCT_FIELD (long, 4, RV_STK_MTVAL, mtval) /* Machine Trap Value */
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STRUCT_FIELD (long, 4, RV_STK_MHARTID, mhartid) /* Hardware Thread ID in machine mode */
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STRUCT_END(RvExcFrame)
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#if SOC_CPU_COPROC_NUM > 0
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/* Define the default size of each coprocessor save area */
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#define RV_COPROC0_SIZE 0
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#define RV_COPROC1_SIZE 0
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#define RV_COPROC2_SIZE 0
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/* And the alignment for each of them */
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#define RV_COPROC0_ALIGN 4
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#define RV_COPROC1_ALIGN 4
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#define RV_COPROC2_ALIGN 4
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#if SOC_CPU_HAS_FPU
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/* Floating-Point Unit coprocessor is now considered coprocessor 0 */
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#define FPU_COPROC_IDX 0
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/**
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* @brief Floating-Point Unit save area
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*/
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STRUCT_BEGIN
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STRUCT_FIELD (long, 4, RV_FPU_FT0, ft0) /* ft0-ft7: Floating Point temporaries */
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STRUCT_FIELD (long, 4, RV_FPU_FT1, ft1)
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STRUCT_FIELD (long, 4, RV_FPU_FT2, ft2)
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STRUCT_FIELD (long, 4, RV_FPU_FT3, ft3)
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STRUCT_FIELD (long, 4, RV_FPU_FT4, ft4)
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STRUCT_FIELD (long, 4, RV_FPU_FT5, ft5)
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STRUCT_FIELD (long, 4, RV_FPU_FT6, ft6)
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STRUCT_FIELD (long, 4, RV_FPU_FT7, ft7)
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STRUCT_FIELD (long, 4, RV_FPU_FS0, fs0) /* fs0-fs1: Floating Point saved registers */
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STRUCT_FIELD (long, 4, RV_FPU_FS1, fs1)
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STRUCT_FIELD (long, 4, RV_FPU_FA0, fa0) /* fa0-fa1: Floating Point arguments/return values */
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STRUCT_FIELD (long, 4, RV_FPU_FA1, fa1)
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STRUCT_FIELD (long, 4, RV_FPU_FA2, fa2) /* fa2-fa7: Floating Point arguments */
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STRUCT_FIELD (long, 4, RV_FPU_FA3, fa3)
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STRUCT_FIELD (long, 4, RV_FPU_FA4, fa4)
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STRUCT_FIELD (long, 4, RV_FPU_FA5, fa5)
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STRUCT_FIELD (long, 4, RV_FPU_FA6, fa6)
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STRUCT_FIELD (long, 4, RV_FPU_FA7, fa7)
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STRUCT_FIELD (long, 4, RV_FPU_FS2, fs2) /* fs2-fs11: Floating Point saved registers */
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STRUCT_FIELD (long, 4, RV_FPU_FS3, fs3)
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STRUCT_FIELD (long, 4, RV_FPU_FS4, fs4)
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STRUCT_FIELD (long, 4, RV_FPU_FS5, fs5)
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STRUCT_FIELD (long, 4, RV_FPU_FS6, fs6)
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STRUCT_FIELD (long, 4, RV_FPU_FS7, fs7)
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STRUCT_FIELD (long, 4, RV_FPU_FS8, fs8)
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STRUCT_FIELD (long, 4, RV_FPU_FS9, fs9)
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STRUCT_FIELD (long, 4, RV_FPU_FS10, fs10)
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STRUCT_FIELD (long, 4, RV_FPU_FS11, fs11)
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STRUCT_FIELD (long, 4, RV_FPU_FT8, ft8) /* ft8-ft11: Floating Point temporary registers */
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STRUCT_FIELD (long, 4, RV_FPU_FT9, ft9)
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STRUCT_FIELD (long, 4, RV_FPU_FT10, ft10)
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STRUCT_FIELD (long, 4, RV_FPU_FT11, ft11)
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STRUCT_FIELD (long, 4, RV_FPU_FCSR, fcsr) /* fcsr special register */
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STRUCT_END(RvFPUSaveArea)
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/* Redefine the coprocessor area size previously defined to 0 */
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#undef RV_COPROC0_SIZE
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#define RV_COPROC0_SIZE RvFPUSaveAreaSize
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#else
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#define RV_COPROC0_SIZE sizeof(RvFPUSaveArea)
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#endif /* defined(_ASMLANGUAGE) || defined(__ASSEMBLER__) */
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#endif /* SOC_CPU_HAS_FPU */
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#if SOC_CPU_HAS_HWLOOP
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/* Hardware Loop extension is "coprocessor" 1 */
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#define HWLP_COPROC_IDX 1
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/**
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* @brief Hardware loop save area
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*/
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STRUCT_BEGIN
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STRUCT_FIELD (long, 4, RV_HWLOOP_START0, start0)
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STRUCT_FIELD (long, 4, RV_HWLOOP_END0, end0)
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STRUCT_FIELD (long, 4, RV_HWLOOP_COUNT0, count0)
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STRUCT_FIELD (long, 4, RV_HWLOOP_START1, start1)
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STRUCT_FIELD (long, 4, RV_HWLOOP_END1, end1)
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STRUCT_FIELD (long, 4, RV_HWLOOP_COUNT1, count1)
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STRUCT_END(RvHWLPSaveArea)
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/* Redefine the coprocessor area size previously defined to 0 */
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#undef RV_COPROC1_SIZE
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#define RV_COPROC1_SIZE RvHWLPSaveAreaSize
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#else
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#define RV_COPROC1_SIZE sizeof(RvHWLPSaveArea)
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#endif /* defined(_ASMLANGUAGE) || defined(__ASSEMBLER__) */
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#endif /* SOC_CPU_HAS_HWLOOP */
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#if SOC_CPU_HAS_PIE
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/* PIE/AIA coprocessor is now considered coprocessor 2 */
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#define PIE_COPROC_IDX 2
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/**
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* @brief PIE save area
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*/
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STRUCT_BEGIN
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STRUCT_AFIELD (long, 4, RV_PIE_Q0, q0, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q1, q1, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q2, q2, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q3, q3, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q4, q4, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q5, q5, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q6, q6, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_Q7, q7, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_QACC_L_L, qacc_l_l, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_QACC_L_H, qacc_l_h, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_QACC_H_L, qacc_h_l, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_QACC_H_H, qacc_h_h, 4)
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STRUCT_AFIELD (long, 4, RV_PIE_UA_STATE, ua_state, 4)
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STRUCT_FIELD (long, 4, RV_PIE_XACC, xacc)
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/* This register contains SAR, SAR_BYTES and FFT_BIT_WIDTH in this order (from top to low) */
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STRUCT_FIELD (long, 4, RV_PIE_MISC, misc)
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STRUCT_END(RvPIESaveArea)
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/* Redefine the coprocessor area size previously defined to 0 */
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#undef RV_COPROC2_SIZE
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#define RV_COPROC2_SIZE RvPIESaveAreaSize
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#else
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#define RV_COPROC2_SIZE sizeof(RvPIESaveArea)
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#endif /* defined(_ASMLANGUAGE) || defined(__ASSEMBLER__) */
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/* The PIE save area structure must be aligned on 16 bytes */
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#undef RV_COPROC2_ALIGN
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#define RV_COPROC2_ALIGN 16
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#endif /* SOC_CPU_HAS_PIE */
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/**
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* @brief Coprocessors save area, containing each coprocessor save area
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*/
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STRUCT_BEGIN
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/* Enable bitmap: BIT(i) represents coprocessor i, 1 is used, 0 else */
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STRUCT_FIELD (long, 4, RV_COPROC_ENABLE, sa_enable)
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/* Address of the original lowest stack address, convenient when the stack needs to be re-initialized */
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STRUCT_FIELD (void*, 4, RV_COPROC_TCB_STACK, sa_tcbstack)
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/* Address of the pool of memory used to allocate coprocessors save areas */
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STRUCT_FIELD (long, 4, RV_COPROC_ALLOCATOR, sa_allocator)
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/* Pointer to the coprocessors save areas */
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STRUCT_AFIELD (void*, 4, RV_COPROC_SA, sa_coprocs, SOC_CPU_COPROC_NUM)
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STRUCT_END(RvCoprocSaveArea)
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#endif /* SOC_CPU_COPROC_NUM > 0 */
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#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
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#define RV_STK_SZ1 RvExcFrameSize
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#else
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#define RV_STK_SZ1 sizeof(RvExcFrame)
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#endif
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/*
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* Exception stack frame size, after align up to 16 bytes boundary
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*/
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#define RV_STK_FRMSZ (ALIGNUP(0x10, RV_STK_SZ1))
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#endif /* #ifndef __RVRUNTIME_FRAMES_H__ */
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