forked from Makuna/NeoPixelBus
@@ -181,31 +181,30 @@ esp_err_t i2sSetClock(uint8_t bus_num, uint8_t div_num, uint8_t div_b, uint8_t d
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}
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i2s_dev_t* i2s = I2S[bus_num].bus;
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typeof(i2s->clkm_conf) clkm_conf;
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clkm_conf.val = 0;
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#if !defined(CONFIG_IDF_TARGET_ESP32S2)
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i2s->clkm_conf.clka_en = 0;
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clkm_conf.clka_en = 0;
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#else
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i2s->clkm_conf.clk_sel = 2;
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clkm_conf.clk_sel = 2;
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#endif
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i2s->clkm_conf.clkm_div_a = div_a;
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i2s->clkm_conf.clkm_div_b = div_b;
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i2s->clkm_conf.clkm_div_num = div_num;
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i2s->sample_rate_conf.tx_bck_div_num = bck;
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i2s->sample_rate_conf.rx_bck_div_num = bck;
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i2s->sample_rate_conf.tx_bits_mod = bits;
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i2s->sample_rate_conf.rx_bits_mod = bits;
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clkm_conf.clkm_div_a = div_a;
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clkm_conf.clkm_div_b = div_b;
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clkm_conf.clkm_div_num = div_num;
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i2s->clkm_conf.val = clkm_conf.val;
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typeof(i2s->sample_rate_conf) sample_rate_conf;
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sample_rate_conf.val = 0;
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sample_rate_conf.tx_bck_div_num = bck;
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sample_rate_conf.rx_bck_div_num = bck;
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sample_rate_conf.tx_bits_mod = bits;
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sample_rate_conf.rx_bits_mod = bits;
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i2s->sample_rate_conf.val = sample_rate_conf.val;
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return ESP_OK;
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}
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void i2sSetTxDataMode(uint8_t bus_num, i2s_tx_chan_mod_t chan_mod, i2s_tx_fifo_mod_t fifo_mod) {
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if (bus_num >= I2S_NUM_MAX) {
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return;
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}
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I2S[bus_num].bus->conf_chan.tx_chan_mod = chan_mod; // 0:dual channel; 1:right channel; 2:left channel; 3:left channel constant; 4:right channel constant; (channels flipped if tx_msb_right == 1)
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I2S[bus_num].bus->fifo_conf.tx_fifo_mod = fifo_mod; // 0:16-bit dual channel; 1:16-bit single channel; 2:32-bit dual channel; 3:32-bit single channel data
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}
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void i2sSetDac(uint8_t bus_num, bool right, bool left) {
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if (bus_num >= I2S_NUM_MAX) {
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return;
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@@ -222,7 +221,7 @@ void i2sSetDac(uint8_t bus_num, bool right, bool left) {
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return;
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}
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i2sSetPins(bus_num, -1, -1, -1, -1, false);
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i2sSetPins(bus_num, -1, false);
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I2S[bus_num].bus->conf2.lcd_en = 1;
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I2S[bus_num].bus->conf.tx_right_first = 0;
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I2S[bus_num].bus->conf2.camera_en = 0;
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@@ -237,69 +236,11 @@ void i2sSetDac(uint8_t bus_num, bool right, bool left) {
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}
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}
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void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, bool invert) {
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void i2sSetPins(uint8_t bus_num, int8_t out, bool invert) {
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if (bus_num >= I2S_NUM_MAX) {
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return;
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}
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if ((ws >= 0 && I2S[bus_num].ws == -1) || (bck >= 0 && I2S[bus_num].bck == -1) || (out >= 0 && I2S[bus_num].out == -1)) {
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i2sSetDac(bus_num, false, false);
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}
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if (ws >= 0) {
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if (I2S[bus_num].ws != ws) {
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if (I2S[bus_num].ws >= 0) {
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gpio_matrix_out(I2S[bus_num].ws, 0x100, invert, false);
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}
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I2S[bus_num].ws = ws;
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pinMode(ws, OUTPUT);
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uint32_t i2sSignal;
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#if !defined(CONFIG_IDF_TARGET_ESP32S2)
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// (I2S_NUM_MAX == 2)
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if (bus_num == 1) {
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i2sSignal = I2S1O_WS_OUT_IDX;
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}
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else
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#else
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{
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i2sSignal = I2S0O_WS_OUT_IDX;
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}
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#endif
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gpio_matrix_out(ws, i2sSignal, invert, false);
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}
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} else if (I2S[bus_num].ws >= 0) {
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gpio_matrix_out(I2S[bus_num].ws, 0x100, invert, false);
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I2S[bus_num].ws = -1;
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}
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if (bck >= 0) {
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if (I2S[bus_num].bck != bck) {
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if (I2S[bus_num].bck >= 0) {
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gpio_matrix_out(I2S[bus_num].bck, 0x100, invert, false);
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}
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I2S[bus_num].bck = bck;
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pinMode(bck, OUTPUT);
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int i2sSignal;
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#if !defined(CONFIG_IDF_TARGET_ESP32S2)
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// (I2S_NUM_MAX == 2)
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if (bus_num == 1) {
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i2sSignal = I2S1O_BCK_OUT_IDX;
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}
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else
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#else
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{
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i2sSignal = I2S0O_BCK_OUT_IDX;
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}
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#endif
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gpio_matrix_out(bck, i2sSignal, invert, false);
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}
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} else if (I2S[bus_num].bck >= 0) {
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gpio_matrix_out(I2S[bus_num].bck, 0x100, invert, false);
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I2S[bus_num].bck = -1;
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}
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if (out >= 0) {
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if (I2S[bus_num].out != out) {
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if (I2S[bus_num].out >= 0) {
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@@ -385,38 +326,37 @@ void i2sInit(uint8_t bus_num, uint32_t bits_per_sample, uint32_t sample_rate, i2
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i2s->lc_conf.out_rst = 0;
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// Enable and configure DMA
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typeof(i2s->lc_conf) temp_conf;
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temp_conf.val = 0;
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temp_conf.out_eof_mode = 1;
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i2s->lc_conf.val = temp_conf.val;
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typeof(i2s->lc_conf) lc_conf;
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lc_conf.val = 0;
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lc_conf.out_eof_mode = 1;
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i2s->lc_conf.val = lc_conf.val;
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i2s->pdm_conf.pcm2pdm_conv_en = 0;
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i2s->pdm_conf.pdm2pcm_conv_en = 0;
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// SET_PERI_REG_BITS(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_SOC_CLK_SEL, 0x1, RTC_CNTL_SOC_CLK_SEL_S);
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typeof(i2s->conf_chan) conf_chan;
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conf_chan.val = 0;
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conf_chan.tx_chan_mod = chan_mod; // 0-two channel;1-right;2-left;3-righ;4-left
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conf_chan.rx_chan_mod = chan_mod; // 0-two channel;1-right;2-left;3-righ;4-left
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i2s->conf_chan.val = conf_chan.val;
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i2s->conf_chan.tx_chan_mod = chan_mod; // 0-two channel;1-right;2-left;3-righ;4-left
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i2s->conf_chan.rx_chan_mod = chan_mod; // 0-two channel;1-right;2-left;3-righ;4-left
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i2s->fifo_conf.tx_fifo_mod = fifo_mod; // 0-right&left channel;1-one channel
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i2s->fifo_conf.rx_fifo_mod = fifo_mod; // 0-right&left channel;1-one channel
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typeof(i2s->fifo_conf) fifo_conf;
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fifo_conf.val = 0;
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fifo_conf.tx_fifo_mod = fifo_mod; // 0-right&left channel;1-one channel
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fifo_conf.rx_fifo_mod = fifo_mod; // 0-right&left channel;1-one channel
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i2s->fifo_conf.val = fifo_conf.val;
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i2s->conf.tx_mono = 0;
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i2s->conf.rx_mono = 0;
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typeof(i2s->conf) conf;
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conf.val = 0;
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conf.tx_msb_shift = (bits_per_sample != 8);// 0:DAC/PCM, 1:I2S
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conf.tx_right_first = (bits_per_sample == 8);
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i2s->conf.val = conf.val;
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i2s->conf.tx_start = 0;
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i2s->conf.rx_start = 0;
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i2s->conf.tx_short_sync = 0;
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i2s->conf.rx_short_sync = 0;
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i2s->conf.tx_msb_shift = (bits_per_sample != 8);// 0:DAC/PCM, 1:I2S
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i2s->conf.rx_msb_shift = 0;
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i2s->conf.tx_slave_mod = 0; // Master
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i2s->conf.tx_msb_right = 0;
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i2s->conf.tx_right_first = (bits_per_sample == 8);
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i2s->conf2.lcd_en = (bits_per_sample == 8);
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i2s->conf2.camera_en = 0;
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typeof(i2s->conf2) conf2;
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conf2.val = 0;
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conf2.lcd_en = (bits_per_sample == 8);
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i2s->conf2.val = conf2.val;
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i2s->fifo_conf.tx_fifo_mod_force_en = 1;
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@@ -20,14 +20,12 @@ typedef enum {
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void i2sInit(uint8_t bus_num, uint32_t bits_per_sample, uint32_t sample_rate, i2s_tx_chan_mod_t chan_mod, i2s_tx_fifo_mod_t fifo_mod, size_t dma_count, size_t dma_len);
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void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, bool invert);
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void i2sSetPins(uint8_t bus_num, int8_t out, bool invert);
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void i2sSetDac(uint8_t bus_num, bool right, bool left);
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esp_err_t i2sSetClock(uint8_t bus_num, uint8_t div_num, uint8_t div_b, uint8_t div_a, uint8_t bck, uint8_t bits_per_sample);
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esp_err_t i2sSetSampleRate(uint8_t bus_num, uint32_t sample_rate, uint8_t bits_per_sample);
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void i2sSetTxDataMode(uint8_t bus_num, i2s_tx_chan_mod_t chan_mod, i2s_tx_fifo_mod_t fifo_mod);
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void i2sSetSilenceBuf(uint8_t bus_num, uint8_t* data, size_t len);
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size_t i2sWrite(uint8_t bus_num, uint8_t* data, size_t len, bool copy, bool free_when_sent);
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@@ -157,7 +157,7 @@ public:
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{
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size_t dmaCount = (_i2sBufferSize + I2S_DMA_MAX_DATA_LEN - 1) / I2S_DMA_MAX_DATA_LEN;
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i2sInit(T_BUS::I2sBusNumber, 16, T_SPEED::I2sSampleRate, I2S_CHAN_STEREO, I2S_FIFO_16BIT_DUAL, dmaCount, 0);
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i2sSetPins(T_BUS::I2sBusNumber, _pin, -1, -1, -1, T_INVERT::Inverted);
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i2sSetPins(T_BUS::I2sBusNumber, _pin, T_INVERT::Inverted);
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}
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void Update(bool)
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