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Update IDF, tools and toolchains

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This commit is contained in:
me-no-dev
2020-08-24 19:10:52 +03:00
parent 86c87aaeee
commit 394c32ddfc
754 changed files with 33157 additions and 23022 deletions
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20
tools/sdk/esp32s2/ld/esp32s2.ld
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@ -34,7 +34,7 @@
#define RAM_IRAM_START 0x40020000
#define RAM_DRAM_START 0x3FFB0000
#define DATA_RAM_END 0x3FFE4000 /* 2nd stage bootloader iram_loader_seg starts at block 15 */
#define DATA_RAM_END 0x3FFE0000 /* 2nd stage bootloader iram_loader_seg starts at SRAM block 14 (reclaimed after app boots) */
#define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
@ -44,6 +44,17 @@
#define I_D_RAM_SIZE DATA_RAM_END - DRAM_ORG
#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE),
"Fixed static ram data does not fit.")
#define STATIC_RAM_SIZE CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE
#else
#define STATIC_RAM_SIZE 0
#endif
MEMORY
{
/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
@ -69,7 +80,7 @@ MEMORY
/* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */
dram0_0_seg (RW) : org = DRAM_ORG, len = I_D_RAM_SIZE
dram0_0_seg (RW) : org = DRAM_ORG, len = I_D_RAM_SIZE - STATIC_RAM_SIZE
#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped constant data */
@ -93,7 +104,12 @@ MEMORY
rtc_data_seg(RW) : org = 0x3ff9e000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
}
#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
/* static data ends at defined address */
_static_data_end = DRAM_ORG + STATIC_RAM_SIZE;
#else
_static_data_end = _bss_end;
#endif
_heap_end = 0x40000000;

4
tools/sdk/esp32s2/ld/esp32s2.peripherals.ld
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@ -17,14 +17,14 @@ PROVIDE ( RMTMEM = 0x3f416400 );
PROVIDE ( PCNT = 0x3f417000 );
PROVIDE ( SLC = 0x3f418000 );
PROVIDE ( LEDC = 0x3f419000 );
PROVIDE ( MCP = 0x3f4c3000 );
PROVIDE ( CP_DMA = 0x3f4c3000 );
PROVIDE ( TIMERG0 = 0x3f41F000 );
PROVIDE ( TIMERG1 = 0x3f420000 );
PROVIDE ( GPSPI2 = 0x3f424000 );
PROVIDE ( GPSPI3 = 0x3f425000 );
PROVIDE ( SYSCON = 0x3f426000 );
PROVIDE ( I2C1 = 0x3f427000 );
PROVIDE ( CAN = 0x3f42B000 );
PROVIDE ( TWAI = 0x3f42B000 );
PROVIDE ( APB_SARADC = 0x3f440000 );
PROVIDE ( USB0 = 0x60080000 );
PROVIDE ( USB_WRAP = 0x3f439000 );

78
tools/sdk/esp32s2/ld/esp32s2.project.ld
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File diff suppressed because one or more lines are too long

37
tools/sdk/esp32s2/ld/esp32s2.rom.api.ld Normal file
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@ -0,0 +1,37 @@
/**
* ROM APIs
*/
PROVIDE ( esp_rom_crc32_le = crc32_le );
PROVIDE ( esp_rom_crc16_le = crc16_le );
PROVIDE ( esp_rom_crc8_le = crc8_le );
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
/* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
/* so here we directly assign the symbols with the ROM API address */
PROVIDE ( esp_rom_md5_init = 0x4000526c );
PROVIDE ( esp_rom_md5_update = 0x4000528c );
PROVIDE ( esp_rom_md5_final = 0x4000530c );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );

7
tools/sdk/esp32s2/ld/esp32s2.rom.ld
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@ -570,6 +570,11 @@ PROVIDE ( rom_txiq_set_reg = 0x4000bf64 );
PROVIDE ( rom_tx_paon_set = 0x40009db8 );
PROVIDE ( rom_tx_pwr_backoff = 0x4000ceb8 );
PROVIDE ( rom_txtone_linear_pwr = 0x4000c0b0 );
PROVIDE ( rom_usb_dev = 0x3ffffb9c ); /* static "usb_dev" */
PROVIDE ( rom_usb_dev_end = 0x3ffffc78 ); /* end of "usb_dev" */
PROVIDE ( rom_usb_dw_ctrl = 0x3ffffa74 ); /* static "usb_dw_ctrl" */
PROVIDE ( rom_usb_dw_ctrl_end = 0x3ffffb9c ); /* end of "usb_dw_ctrl" */
PROVIDE ( rom_usb_curr_desc = 0x3ffffa54 ); /* static "s_curr_descr" */
PROVIDE ( rom_wait_rfpll_cal_end = 0x4000af3c );
PROVIDE ( rom_wifi_11g_rate_chg = 0x4000d260 );
PROVIDE ( rom_wifi_rifs_mode_en = 0x40009d2c );
@ -646,7 +651,7 @@ PROVIDE ( string0_descr = 0x3ffaeeae );
PROVIDE ( str_manu_descr = 0x3ffaee9a );
PROVIDE ( str_prod_descr = 0x3ffaee88 );
PROVIDE ( str_serial_descr = 0x3ffaee84 );
PROVIDE ( s_usb_osglue = 0x3ffffcdc );
PROVIDE ( rom_usb_osglue = 0x3ffffcdc );
PROVIDE ( _SyscallException = 0x4000732a );
PROVIDE ( syscall_table_ptr_pro = 0x3ffffd78 );
PROVIDE ( tdefl_compress = 0x400041dc );

4
tools/sdk/esp32s2/ld/esp32s2_out.ld
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@ -19,7 +19,7 @@ MEMORY
of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
are connected to the data port of the CPU and eg allow bytewise access. */
/* IRAM for CPU.*/
iram0_0_seg (RX) : org = (0x40020000 + 0x2000 + 0x2000), len = 0x3FFE4000 - (0x3FFB0000 + 0x2000 + 0x2000)
iram0_0_seg (RX) : org = (0x40020000 + 0x2000 + 0x2000), len = 0x3FFE0000 - (0x3FFB0000 + 0x2000 + 0x2000)
/* Even though the segment name is iram, it is actually mapped to flash
*/
iram0_2_seg (RX) : org = 0x40080020, len = 0x780000-0x20
@ -31,7 +31,7 @@ MEMORY
constraint that (paddr % 64KB == vaddr % 64KB).)
*/
/* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */
dram0_0_seg (RW) : org = (0x3FFB0000 + 0x2000 + 0x2000), len = 0x3FFE4000 - (0x3FFB0000 + 0x2000 + 0x2000)
dram0_0_seg (RW) : org = (0x3FFB0000 + 0x2000 + 0x2000), len = 0x3FFE0000 - (0x3FFB0000 + 0x2000 + 0x2000) - 0
/* Flash mapped constant data */
drom0_0_seg (R) : org = 0x3F000020, len = 0x3f0000-0x20
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */