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Disable IRAM ISRs and functions by default

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This commit is contained in:
me-no-dev
2020-05-19 00:08:10 +03:00
parent 3397208d12
commit 99b5be0037
20 changed files with 86 additions and 65 deletions
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10
Kconfig.projbuild
View File

@ -88,6 +88,16 @@ config ARDUINO_UDP_RUNNING_CORE
default 1 if ARDUINO_UDP_RUN_CORE1
default -1 if ARDUINO_UDP_RUN_NO_AFFINITY
config ARDUINO_ISR_IRAM
bool "Run interrupts in IRAM"
default "n"
help
Enabling this option will Attach all interrupts with the IRAm flag.
It will also make some HAL function, like, digitalRead/Write and more
be loaded into IRAM for access inside ISRs.
Beware that this is a very dangerous setting. Enable it only if you
are fully aware of the consequences.
config DISABLE_HAL_LOCKS
bool "Disable mutex locks for HAL"
default "n"

2
cores/esp32/Esp.h
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@ -108,7 +108,7 @@ public:
};
uint32_t IRAM_ATTR EspClass::getCycleCount()
uint32_t ARDUINO_ISR_ATTR EspClass::getCycleCount()
{
uint32_t ccount;
__asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount));

2
cores/esp32/FunctionalInterrupt.cpp
View File

@ -16,7 +16,7 @@ extern "C"
extern void __attachInterruptFunctionalArg(uint8_t pin, voidFuncPtrArg userFunc, void * arg, int intr_type, bool functional);
}
void IRAM_ATTR interruptFunctional(void* arg)
void ARDUINO_ISR_ATTR interruptFunctional(void* arg)
{
InterruptArgStructure* localArg = (InterruptArgStructure*)arg;
if (localArg->interruptFunction)

2
cores/esp32/esp32-hal-dac.c
View File

@ -31,7 +31,7 @@
#error Target CONFIG_IDF_TARGET is not supported
#endif
void IRAM_ATTR __dacWrite(uint8_t pin, uint8_t value)
void ARDUINO_ISR_ATTR __dacWrite(uint8_t pin, uint8_t value)
{
if(pin < DAC1 || pin > DAC2){
return;//not dac pin

10
cores/esp32/esp32-hal-gpio.c
View File

@ -157,7 +157,7 @@ static InterruptHandle_t __pinInterruptHandlers[GPIO_PIN_COUNT] = {0,};
#include "driver/rtc_io.h"
extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
extern void ARDUINO_ISR_ATTR __pinMode(uint8_t pin, uint8_t mode)
{
if(!digitalPinIsValid(pin)) {
@ -254,7 +254,7 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
GPIO.pin[pin].val = pinControl;
}
extern void IRAM_ATTR __digitalWrite(uint8_t pin, uint8_t val)
extern void ARDUINO_ISR_ATTR __digitalWrite(uint8_t pin, uint8_t val)
{
if(val) {
if(pin < 32) {
@ -271,7 +271,7 @@ extern void IRAM_ATTR __digitalWrite(uint8_t pin, uint8_t val)
}
}
extern int IRAM_ATTR __digitalRead(uint8_t pin)
extern int ARDUINO_ISR_ATTR __digitalRead(uint8_t pin)
{
if(pin < 32) {
return (GPIO.in >> pin) & 0x1;
@ -283,7 +283,7 @@ extern int IRAM_ATTR __digitalRead(uint8_t pin)
static intr_handle_t gpio_intr_handle = NULL;
static void IRAM_ATTR __onPinInterrupt()
static void ARDUINO_ISR_ATTR __onPinInterrupt()
{
uint32_t gpio_intr_status_l=0;
uint32_t gpio_intr_status_h=0;
@ -331,7 +331,7 @@ extern void __attachInterruptFunctionalArg(uint8_t pin, voidFuncPtrArg userFunc,
if(!interrupt_initialized) {
interrupt_initialized = true;
esp_intr_alloc(ETS_GPIO_INTR_SOURCE, (int)ESP_INTR_FLAG_IRAM, __onPinInterrupt, NULL, &gpio_intr_handle);
esp_intr_alloc(ETS_GPIO_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, __onPinInterrupt, NULL, &gpio_intr_handle);
}
// if new attach without detach remove old info

22
cores/esp32/esp32-hal-i2c.c
View File

@ -242,7 +242,7 @@ static i2c_t _i2c_bus_array[2] = {
/* Stickbreaker ISR mode debug support
*/
static void IRAM_ATTR i2cDumpCmdQueue(i2c_t *i2c)
static void ARDUINO_ISR_ATTR i2cDumpCmdQueue(i2c_t *i2c)
{
#if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_ERROR)&&(defined ENABLE_I2C_DEBUG_BUFFER)
static const char * const cmdName[] ={"RSTART","WRITE","READ","STOP","END"};
@ -372,7 +372,7 @@ static void i2cDumpInts(uint8_t num)
#endif
#if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO)&&(defined ENABLE_I2C_DEBUG_BUFFER)
static void IRAM_ATTR i2cDumpStatus(i2c_t * i2c){
static void ARDUINO_ISR_ATTR i2cDumpStatus(i2c_t * i2c){
typedef union {
struct {
uint32_t ack_rec: 1; /*This register stores the value of ACK bit.*/
@ -446,7 +446,7 @@ if(i != fifoPos){// actual data
}
#endif
static void IRAM_ATTR i2cTriggerDumps(i2c_t * i2c, uint8_t trigger, const char locus[]){
static void ARDUINO_ISR_ATTR i2cTriggerDumps(i2c_t * i2c, uint8_t trigger, const char locus[]){
#if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO)&&(defined ENABLE_I2C_DEBUG_BUFFER)
if( trigger ){
log_i("%s",locus);
@ -493,7 +493,7 @@ static void i2cApbChangeCallback(void * arg, apb_change_ev_t ev_type, uint32_t o
}
/* End of CPU Clock change Support
*/
static void IRAM_ATTR i2cSetCmd(i2c_t * i2c, uint8_t index, uint8_t op_code, uint8_t byte_num, bool ack_val, bool ack_exp, bool ack_check)
static void ARDUINO_ISR_ATTR i2cSetCmd(i2c_t * i2c, uint8_t index, uint8_t op_code, uint8_t byte_num, bool ack_val, bool ack_exp, bool ack_check)
{
I2C_COMMAND_t cmd;
cmd.val=0;
@ -506,7 +506,7 @@ static void IRAM_ATTR i2cSetCmd(i2c_t * i2c, uint8_t index, uint8_t op_code, uin
}
static void IRAM_ATTR fillCmdQueue(i2c_t * i2c, bool INTS)
static void ARDUINO_ISR_ATTR fillCmdQueue(i2c_t * i2c, bool INTS)
{
/* this function is called on initial i2cProcQueue() or when a I2C_END_DETECT_INT occurs
*/
@ -664,7 +664,7 @@ static void IRAM_ATTR fillCmdQueue(i2c_t * i2c, bool INTS)
}
}
static void IRAM_ATTR fillTxFifo(i2c_t * i2c)
static void ARDUINO_ISR_ATTR fillTxFifo(i2c_t * i2c)
{
/*
12/01/2017 The Fifo's are independent, 32 bytes of tx and 32 bytes of Rx.
@ -756,7 +756,7 @@ static void IRAM_ATTR fillTxFifo(i2c_t * i2c)
}
static void IRAM_ATTR emptyRxFifo(i2c_t * i2c)
static void ARDUINO_ISR_ATTR emptyRxFifo(i2c_t * i2c)
{
uint32_t d, cnt=0, moveCnt;
@ -815,7 +815,7 @@ static void IRAM_ATTR emptyRxFifo(i2c_t * i2c)
#endif
}
static void IRAM_ATTR i2cIsrExit(i2c_t * i2c,const uint32_t eventCode,bool Fatal)
static void ARDUINO_ISR_ATTR i2cIsrExit(i2c_t * i2c,const uint32_t eventCode,bool Fatal)
{
switch(eventCode) {
@ -860,7 +860,7 @@ static void IRAM_ATTR i2cIsrExit(i2c_t * i2c,const uint32_t eventCode,bool Fatal
}
static void IRAM_ATTR i2c_update_error_byte_cnt(i2c_t * i2c)
static void ARDUINO_ISR_ATTR i2c_update_error_byte_cnt(i2c_t * i2c)
{
/* i2c_update_error_byte_cnt 07/18/2018
Only called after an error has occurred, so, most of the time this function is never used.
@ -907,7 +907,7 @@ static void IRAM_ATTR i2c_update_error_byte_cnt(i2c_t * i2c)
i2c->errorByteCnt = bc;
}
static void IRAM_ATTR i2c_isr_handler_default(void* arg)
static void ARDUINO_ISR_ATTR i2c_isr_handler_default(void* arg)
{
i2c_t* p_i2c = (i2c_t*) arg; // recover data
uint32_t activeInt = p_i2c->dev->int_status.val&0x7FF;
@ -1262,7 +1262,7 @@ i2c_err_t i2cProcQueue(i2c_t * i2c, uint32_t *readCount, uint16_t timeOutMillis)
if(!i2c->intr_handle) { // create ISR for either peripheral
// log_i("create ISR %d",i2c->num);
uint32_t ret = 0;
uint32_t flags = ESP_INTR_FLAG_IRAM | //< ISR can be called if cache is disabled
uint32_t flags = ARDUINO_ISR_FLAG | //< ISR can be called if cache is disabled
ESP_INTR_FLAG_LOWMED | //< Low and medium prio interrupts. These can be handled in C.
ESP_INTR_FLAG_SHARED; //< Reduce resource requirements, Share interrupts

10
cores/esp32/esp32-hal-matrix.c
View File

@ -32,27 +32,27 @@
#define MATRIX_DETACH_IN_LOW_PIN 0x30
#define MATRIX_DETACH_IN_LOW_HIGH 0x38
void IRAM_ATTR pinMatrixOutAttach(uint8_t pin, uint8_t function, bool invertOut, bool invertEnable)
void ARDUINO_ISR_ATTR pinMatrixOutAttach(uint8_t pin, uint8_t function, bool invertOut, bool invertEnable)
{
gpio_matrix_out(pin, function, invertOut, invertEnable);
}
void IRAM_ATTR pinMatrixOutDetach(uint8_t pin, bool invertOut, bool invertEnable)
void ARDUINO_ISR_ATTR pinMatrixOutDetach(uint8_t pin, bool invertOut, bool invertEnable)
{
gpio_matrix_out(pin, MATRIX_DETACH_OUT_SIG, invertOut, invertEnable);
}
void IRAM_ATTR pinMatrixInAttach(uint8_t pin, uint8_t signal, bool inverted)
void ARDUINO_ISR_ATTR pinMatrixInAttach(uint8_t pin, uint8_t signal, bool inverted)
{
gpio_matrix_in(pin, signal, inverted);
}
void IRAM_ATTR pinMatrixInDetach(uint8_t signal, bool high, bool inverted)
void ARDUINO_ISR_ATTR pinMatrixInDetach(uint8_t signal, bool high, bool inverted)
{
gpio_matrix_in(high?MATRIX_DETACH_IN_LOW_HIGH:MATRIX_DETACH_IN_LOW_PIN, signal, inverted);
}
/*
void IRAM_ATTR intrMatrixAttach(uint32_t source, uint32_t inum){
void ARDUINO_ISR_ATTR intrMatrixAttach(uint32_t source, uint32_t inum){
intr_matrix_set(PRO_CPU_NUM, source, inum);
}
*/

8
cores/esp32/esp32-hal-misc.c
View File

@ -143,12 +143,12 @@ BaseType_t xTaskCreateUniversal( TaskFunction_t pxTaskCode,
#endif
}
unsigned long IRAM_ATTR micros()
unsigned long ARDUINO_ISR_ATTR micros()
{
return (unsigned long) (esp_timer_get_time());
}
unsigned long IRAM_ATTR millis()
unsigned long ARDUINO_ISR_ATTR millis()
{
return (unsigned long) (esp_timer_get_time() / 1000ULL);
}
@ -158,7 +158,7 @@ void delay(uint32_t ms)
vTaskDelay(ms / portTICK_PERIOD_MS);
}
void IRAM_ATTR delayMicroseconds(uint32_t us)
void ARDUINO_ISR_ATTR delayMicroseconds(uint32_t us)
{
uint32_t m = micros();
if(us){
@ -239,7 +239,7 @@ void initArduino()
}
//used by hal log
const char * IRAM_ATTR pathToFileName(const char * path)
const char * ARDUINO_ISR_ATTR pathToFileName(const char * path)
{
size_t i = 0;
size_t pos = 0;

19
cores/esp32/esp32-hal-psram.c
View File

@ -77,31 +77,34 @@ bool psramInit(){
log_e("PSRAM could not be added to the heap!");
return false;
}
#endif
#if CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL
heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL);
#endif
spiramDetected = true;
log_d("PSRAM enabled");
return true;
}
bool IRAM_ATTR psramFound(){
bool ARDUINO_ISR_ATTR psramFound(){
return spiramDetected;
}
void IRAM_ATTR *ps_malloc(size_t size){
void ARDUINO_ISR_ATTR *ps_malloc(size_t size){
if(!spiramDetected){
return NULL;
}
return heap_caps_malloc(size, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
}
void IRAM_ATTR *ps_calloc(size_t n, size_t size){
void ARDUINO_ISR_ATTR *ps_calloc(size_t n, size_t size){
if(!spiramDetected){
return NULL;
}
return heap_caps_calloc(n, size, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
}
void IRAM_ATTR *ps_realloc(void *ptr, size_t size){
void ARDUINO_ISR_ATTR *ps_realloc(void *ptr, size_t size){
if(!spiramDetected){
return NULL;
}
@ -114,19 +117,19 @@ bool psramInit(){
return false;
}
bool IRAM_ATTR psramFound(){
bool ARDUINO_ISR_ATTR psramFound(){
return false;
}
void IRAM_ATTR *ps_malloc(size_t size){
void ARDUINO_ISR_ATTR *ps_malloc(size_t size){
return NULL;
}
void IRAM_ATTR *ps_calloc(size_t n, size_t size){
void ARDUINO_ISR_ATTR *ps_calloc(size_t n, size_t size){
return NULL;
}
void IRAM_ATTR *ps_realloc(void *ptr, size_t size){
void ARDUINO_ISR_ATTR *ps_realloc(void *ptr, size_t size){
return NULL;
}

20
cores/esp32/esp32-hal-rmt.c
View File

@ -138,17 +138,17 @@ static void _initPin(int pin, int channel, bool tx_not_rx);
static bool _rmtSendOnce(rmt_obj_t* rmt, rmt_data_t* data, size_t size, bool continuous);
static void IRAM_ATTR _rmt_isr(void* arg);
static void ARDUINO_ISR_ATTR _rmt_isr(void* arg);
static rmt_obj_t* _rmtAllocate(int pin, int from, int size);
static void _initPin(int pin, int channel, bool tx_not_rx);
static int IRAM_ATTR _rmt_get_mem_len(uint8_t channel);
static int ARDUINO_ISR_ATTR _rmt_get_mem_len(uint8_t channel);
static void IRAM_ATTR _rmt_tx_mem_first(uint8_t ch);
static void ARDUINO_ISR_ATTR _rmt_tx_mem_first(uint8_t ch);
static void IRAM_ATTR _rmt_tx_mem_second(uint8_t ch);
static void ARDUINO_ISR_ATTR _rmt_tx_mem_second(uint8_t ch);
/**
@ -271,7 +271,7 @@ bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
RMT_MUTEX_LOCK(channel);
// setup interrupt handler if not yet installed for half and full tx
if (!intr_handle) {
esp_intr_alloc(ETS_RMT_INTR_SOURCE, (int)ESP_INTR_FLAG_IRAM, _rmt_isr, NULL, &intr_handle);
esp_intr_alloc(ETS_RMT_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, _rmt_isr, NULL, &intr_handle);
}
rmt->data_size = size - MAX_DATA_PER_ITTERATION;
@ -588,7 +588,7 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
// install interrupt if at least one channel is active
if (!intr_handle) {
esp_intr_alloc(ETS_RMT_INTR_SOURCE, (int)ESP_INTR_FLAG_IRAM, _rmt_isr, NULL, &intr_handle);
esp_intr_alloc(ETS_RMT_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, _rmt_isr, NULL, &intr_handle);
}
RMT_MUTEX_UNLOCK(channel);
@ -656,7 +656,7 @@ static void _initPin(int pin, int channel, bool tx_not_rx)
}
static void IRAM_ATTR _rmt_isr(void* arg)
static void ARDUINO_ISR_ATTR _rmt_isr(void* arg)
{
int intr_val = RMT.int_st.val;
size_t ch;
@ -746,7 +746,7 @@ static void IRAM_ATTR _rmt_isr(void* arg)
}
}
static void IRAM_ATTR _rmt_tx_mem_second(uint8_t ch)
static void ARDUINO_ISR_ATTR _rmt_tx_mem_second(uint8_t ch)
{
DEBUG_INTERRUPT_START(4)
uint32_t* data = g_rmt_objects[ch].data_ptr;
@ -798,7 +798,7 @@ static void IRAM_ATTR _rmt_tx_mem_second(uint8_t ch)
DEBUG_INTERRUPT_END(4);
}
static void IRAM_ATTR _rmt_tx_mem_first(uint8_t ch)
static void ARDUINO_ISR_ATTR _rmt_tx_mem_first(uint8_t ch)
{
DEBUG_INTERRUPT_START(2);
uint32_t* data = g_rmt_objects[ch].data_ptr;
@ -849,7 +849,7 @@ static void IRAM_ATTR _rmt_tx_mem_first(uint8_t ch)
DEBUG_INTERRUPT_END(2);
}
static int IRAM_ATTR _rmt_get_mem_len(uint8_t channel)
static int ARDUINO_ISR_ATTR _rmt_get_mem_len(uint8_t channel)
{
int block_num = RMT.conf_ch[channel].conf0.mem_size;
int item_block_len = block_num * 64;

8
cores/esp32/esp32-hal-spi.c
View File

@ -956,7 +956,7 @@ void spiEndTransaction(spi_t * spi)
SPI_MUTEX_UNLOCK();
}
void IRAM_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
void ARDUINO_ISR_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
{
if(!spi) {
return;
@ -982,7 +982,7 @@ uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
return data;
}
void IRAM_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
void ARDUINO_ISR_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
{
if(!spi) {
return;
@ -1017,7 +1017,7 @@ uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
return data;
}
void IRAM_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
void ARDUINO_ISR_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
{
if(!spi) {
return;
@ -1165,7 +1165,7 @@ void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
}
}
void IRAM_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32_t len){
void ARDUINO_ISR_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32_t len){
size_t longs = len >> 2;
if(len & 3){
longs++;

4
cores/esp32/esp32-hal-timer.c
View File

@ -83,7 +83,7 @@ static hw_timer_t hw_timer[4] = {
typedef void (*voidFuncPtr)(void);
static voidFuncPtr __timerInterruptHandlers[4] = {0,0,0,0};
void IRAM_ATTR __timerISR(void * arg){
void ARDUINO_ISR_ATTR __timerISR(void * arg){
#if CONFIG_IDF_TARGET_ESP32
uint32_t s0 = TIMERG0.int_st_timers.val;
uint32_t s1 = TIMERG1.int_st_timers.val;
@ -314,7 +314,7 @@ void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
}
if(!initialized){
initialized = true;
esp_intr_alloc(intr_source, (int)(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_LOWMED), __timerISR, NULL, &intr_handle);
esp_intr_alloc(intr_source, (int)(ARDUINO_ISR_FLAG|ESP_INTR_FLAG_LOWMED), __timerISR, NULL, &intr_handle);
} else {
intr_matrix_set(esp_intr_get_cpu(intr_handle), intr_source, esp_intr_get_intno(intr_handle));
}

4
cores/esp32/esp32-hal-touch.c
View File

@ -46,7 +46,7 @@ typedef void (*voidFuncPtr)(void);
static voidFuncPtr __touchInterruptHandlers[10] = {0,};
static intr_handle_t touch_intr_handle = NULL;
void IRAM_ATTR __touchISR(void * arg)
void ARDUINO_ISR_ATTR __touchISR(void * arg)
{
#if CONFIG_IDF_TARGET_ESP32
uint32_t pad_intr = READ_PERI_REG(SENS_SAR_TOUCH_CTRL2_REG) & 0x3ff;
@ -95,7 +95,7 @@ void __touchInit()
//clear touch enable
WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, 0x0);
__touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
esp_intr_alloc(ETS_RTC_CORE_INTR_SOURCE, (int)ESP_INTR_FLAG_IRAM, __touchISR, NULL, &touch_intr_handle);
esp_intr_alloc(ETS_RTC_CORE_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, __touchISR, NULL, &touch_intr_handle);
#else
touch_pad_init();
touch_pad_set_voltage(TOUCH_HVOLT_2V7, TOUCH_LVOLT_0V5, TOUCH_HVOLT_ATTEN_0V5);

10
cores/esp32/esp32-hal-uart.c
View File

@ -97,7 +97,7 @@ static uart_t _uart_bus_array[] = {
static void uart_on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb);
static void IRAM_ATTR _uart_isr(void *arg)
static void ARDUINO_ISR_ATTR _uart_isr(void *arg)
{
uint8_t i, c;
BaseType_t xHigherPriorityTaskWoken;
@ -145,7 +145,7 @@ void uartEnableInterrupt(uart_t* uart)
uart->dev->int_ena.rxfifo_tout = 1;
uart->dev->int_clr.val = 0xffffffff;
esp_intr_alloc(UART_INTR_SOURCE(uart->num), (int)ESP_INTR_FLAG_IRAM, _uart_isr, NULL, &uart->intr_handle);
esp_intr_alloc(UART_INTR_SOURCE(uart->num), (int)ARDUINO_ISR_FLAG, _uart_isr, NULL, &uart->intr_handle);
UART_MUTEX_UNLOCK();
}
@ -536,7 +536,7 @@ uint32_t uartGetBaudRate(uart_t* uart)
return ((getApbFrequency()<<4)/clk_div);
}
static void IRAM_ATTR uart0_write_char(char c)
static void ARDUINO_ISR_ATTR uart0_write_char(char c)
{
#if CONFIG_IDF_TARGET_ESP32
while(((ESP_REG(0x01C+DR_REG_UART_BASE) >> UART_TXFIFO_CNT_S) & 0x7F) == 0x7F);
@ -547,7 +547,7 @@ static void IRAM_ATTR uart0_write_char(char c)
#endif
}
static void IRAM_ATTR uart1_write_char(char c)
static void ARDUINO_ISR_ATTR uart1_write_char(char c)
{
#if CONFIG_IDF_TARGET_ESP32
while(((ESP_REG(0x01C+DR_REG_UART1_BASE) >> UART_TXFIFO_CNT_S) & 0x7F) == 0x7F);
@ -559,7 +559,7 @@ static void IRAM_ATTR uart1_write_char(char c)
}
#if CONFIG_IDF_TARGET_ESP32
static void IRAM_ATTR uart2_write_char(char c)
static void ARDUINO_ISR_ATTR uart2_write_char(char c)
{
while(((ESP_REG(0x01C+DR_REG_UART2_BASE) >> UART_TXFIFO_CNT_S) & 0x7F) == 0x7F);
ESP_REG(DR_REG_UART2_BASE) = c;

8
cores/esp32/esp32-hal.h
View File

@ -44,6 +44,14 @@ extern "C" {
#endif
#endif
#if CONFIG_ARDUINO_ISR_IRAM
#define ARDUINO_ISR_ATTR IRAM_ATTR
#define ARDUINO_ISR_FLAG ESP_INTR_FLAG_IRAM
#else
#define ARDUINO_ISR_ATTR
#define ARDUINO_ISR_FLAG (0)
#endif
//forward declaration from freertos/portmacro.h
void vPortYield(void);
void yield(void);

2
cores/esp32/esp8266-compat.h
View File

@ -18,7 +18,7 @@
#define _ESP8266_COMPAT_H_
#define ICACHE_FLASH_ATTR
#define ICACHE_RAM_ATTR IRAM_ATTR
#define ICACHE_RAM_ATTR ARDUINO_ISR_ATTR
#endif /* _ESP8266_COMPAT_H_ */

2
libraries/ESP32/examples/GPIO/FunctionalInterrupt/FunctionalInterrupt.ino
View File

@ -15,7 +15,7 @@ public:
detachInterrupt(PIN);
}
void IRAM_ATTR isr() {
void ARDUINO_ISR_ATTR isr() {
numberKeyPresses += 1;
pressed = true;
}

4
libraries/ESP32/examples/GPIO/GPIOInterrupt/GPIOInterrupt.ino
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@ -9,13 +9,13 @@ struct Button {
Button button1 = {23, 0, false};
Button button2 = {18, 0, false};
void IRAM_ATTR isr(void* arg) {
void ARDUINO_ISR_ATTR isr(void* arg) {
Button* s = static_cast<Button*>(arg);
s->numberKeyPresses += 1;
s->pressed = true;
}
void IRAM_ATTR isr() {
void ARDUINO_ISR_ATTR isr() {
button2.numberKeyPresses += 1;
button2.pressed = true;
}

2
libraries/ESP32/examples/Timer/RepeatTimer/RepeatTimer.ino
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@ -18,7 +18,7 @@ portMUX_TYPE timerMux = portMUX_INITIALIZER_UNLOCKED;
volatile uint32_t isrCounter = 0;
volatile uint32_t lastIsrAt = 0;
void IRAM_ATTR onTimer(){
void ARDUINO_ISR_ATTR onTimer(){
// Increment the counter and set the time of ISR
portENTER_CRITICAL_ISR(&timerMux);
isrCounter++;

2
libraries/ESP32/examples/Timer/WatchdogTimer/WatchdogTimer.ino
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@ -4,7 +4,7 @@ const int button = 0; //gpio to use to trigger delay
const int wdtTimeout = 3000; //time in ms to trigger the watchdog
hw_timer_t *timer = NULL;
void IRAM_ATTR resetModule() {
void ARDUINO_ISR_ATTR resetModule() {
ets_printf("reboot\n");
esp_restart();
}