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change(soc): Fix spelling mistake in soc/interrupts.h

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Merges https://github.com/espressif/esp-idf/pull/15273
Closes https://github.com/espressif/esp-idf/issues/15272
This commit is contained in:
Brett Regnier
2025-01-23 14:45:22 -07:00
committed by morris
parent 809507903f
commit 01abdcbe43
10 changed files with 31 additions and 15 deletions
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8
components/soc/esp32/include/soc/interrupts.h
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@@ -62,7 +62,7 @@ typedef enum {
ETS_TWAI_INTR_SOURCE, /**< interrupt of twai, level*/
ETS_RTC_CORE_INTR_SOURCE, /**< interrupt of rtc core, level, include rtc watchdog*/
ETS_RMT_INTR_SOURCE, /**< interrupt of remote controller, level*/
ETS_PCNT_INTR_SOURCE, /**< interrupt of pluse count, level*/
ETS_PCNT_INTR_SOURCE, /**< interrupt of pulse count, level*/
ETS_I2C_EXT0_INTR_SOURCE, /**< interrupt of I2C controller1, level*/
ETS_I2C_EXT1_INTR_SOURCE, /**< interrupt of I2C controller0, level*/
ETS_RSA_INTR_SOURCE, /**< interrupt of RSA accelerator, level*/
@@ -82,9 +82,11 @@ typedef enum {
ETS_TG1_LACT_EDGE_INTR_SOURCE, /**< interrupt of TIMER_GROUP0, LACT, EDGE*/
ETS_MMU_IA_INTR_SOURCE, /**< interrupt of MMU Invalid Access, LEVEL*/
ETS_MPU_IA_INTR_SOURCE, /**< interrupt of MPU Invalid Access, LEVEL*/
ETS_CACHE_IA_INTR_SOURCE, /**< interrupt of Cache Invalied Access, LEVEL*/
ETS_CACHE_IA_INTR_SOURCE, /**< interrupt of Cache Invalid Access, LEVEL*/
ETS_MAX_INTR_SOURCE, /**< total number of interrupt sources*/
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
#define ETS_CAN_INTR_SOURCE ETS_TWAI_INTR_SOURCE

6
components/soc/esp32c2/include/soc/interrupts.h
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@@ -40,7 +40,7 @@ typedef enum {
ETS_I2C_EXT0_INTR_SOURCE, /**< interrupt of I2C controller1, level*/
ETS_TG0_T0_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP0, TIMER0, level*/
ETS_TG0_WDT_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP0, WATCH DOG, level*/
ETS_CACHE_IA_INTR_SOURCE, /**< interrupt of Cache Invalied Access, LEVEL*/
ETS_CACHE_IA_INTR_SOURCE, /**< interrupt of Cache Invalid Access, LEVEL*/
ETS_SYSTIMER_TARGET0_INTR_SOURCE, /**< interrupt of system timer 0 */
ETS_SYSTIMER_TARGET1_INTR_SOURCE, /**< interrupt of system timer 1 */
ETS_SYSTIMER_TARGET2_INTR_SOURCE, /**< interrupt of system timer 2 */
@@ -62,7 +62,9 @@ typedef enum {
ETS_CORE0_PIF_PMS_SIZE_INTR_SOURCE,
ETS_CACHE_CORE0_ACS_INTR_SOURCE,
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

4
components/soc/esp32c3/include/soc/interrupts.h
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@@ -81,7 +81,9 @@ typedef enum {
ETS_BAK_PMS_VIOLATE_INTR_SOURCE,
ETS_CACHE_CORE0_ACS_INTR_SOURCE,
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

4
components/soc/esp32c6/include/soc/interrupts.h
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@@ -97,7 +97,9 @@ typedef enum {
ETS_RSA_INTR_SOURCE, /**< interrupt of RSA accelerator, level*/
ETS_ECC_INTR_SOURCE, /**< interrupt of ECC accelerator, level*/
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

2
components/soc/esp32c61/include/soc/interrupts.h
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@@ -80,7 +80,7 @@ typedef enum {
ETS_ECC_INTR_SOURCE,
ETS_ECDSA_INTR_SOURCE,
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
} periph_interrupt_t;
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

4
components/soc/esp32h2/include/soc/interrupts.h
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@@ -85,7 +85,9 @@ typedef enum {
ETS_ECC_INTR_SOURCE, /**< interrupt of ECC accelerator, level*/
ETS_ECDSA_INTR_SOURCE, /**< interrupt of ECDSA accelerator, level*/
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

2
components/soc/esp32h21/include/soc/interrupts.h
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@@ -82,7 +82,7 @@ typedef enum {
ETS_ECC_INTR_SOURCE,
ETS_ECDSA_INTR_SOURCE,
ETS_MAX_INTR_SOURCE,
} periph_interrput_t;
} periph_interrupt_t;
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

4
components/soc/esp32p4/include/soc/interrupts.h
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@@ -153,7 +153,9 @@ typedef enum {
ETS_ASSIST_DEBUG_INTR_SOURCE,
ETS_MAX_INTR_SOURCE, /**< number of interrupt sources */
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char *const esp_isr_names[ETS_MAX_INTR_SOURCE];

4
components/soc/esp32s2/include/soc/interrupts.h
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@@ -114,7 +114,9 @@ typedef enum {
ETS_DCACHE_SYNC_INTR_SOURCE, /**< interrupt of data cache sync done, LEVEL*/
ETS_ICACHE_SYNC_INTR_SOURCE, /**< interrupt of instruction cache sync done, LEVEL*/
ETS_MAX_INTR_SOURCE, /**< number of interrupt sources */
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

8
components/soc/esp32s3/include/soc/interrupts.h
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@@ -54,7 +54,7 @@ typedef enum {
ETS_USB_INTR_SOURCE, /**< interrupt of USB, level*/
ETS_RTC_CORE_INTR_SOURCE, /**< interrupt of rtc core, level, include rtc watchdog*/
ETS_RMT_INTR_SOURCE, /**< interrupt of remote controller, level*/
ETS_PCNT_INTR_SOURCE, /**< interrupt of pluse count, level*/
ETS_PCNT_INTR_SOURCE, /**< interrupt of pulse count, level*/
ETS_I2C_EXT0_INTR_SOURCE, /**< interrupt of I2C controller1, level*/
ETS_I2C_EXT1_INTR_SOURCE, /**< interrupt of I2C controller0, level*/
ETS_SPI2_DMA_INTR_SOURCE, /**< interrupt of SPI2 DMA, level*/
@@ -69,7 +69,7 @@ typedef enum {
ETS_TG1_T0_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP1, TIMER0, EDGE*/
ETS_TG1_T1_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP1, TIMER1, EDGE*/
ETS_TG1_WDT_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP1, WATCHDOG, EDGE*/
ETS_CACHE_IA_INTR_SOURCE, /**< interrupt of Cache Invalied Access, LEVEL*/
ETS_CACHE_IA_INTR_SOURCE, /**< interrupt of Cache Invalid Access, LEVEL*/
ETS_SYSTIMER_TARGET0_INTR_SOURCE, /**< interrupt of system timer 0 */
ETS_SYSTIMER_TARGET1_INTR_SOURCE, /**< interrupt of system timer 1 */
ETS_SYSTIMER_TARGET2_INTR_SOURCE, /**< interrupt of system timer 2 */
@@ -116,7 +116,9 @@ typedef enum {
ETS_PERI_BACKUP_INTR_SOURCE,
ETS_DMA_EXTMEM_REJECT_SOURCE,
ETS_MAX_INTR_SOURCE, /**< number of interrupt sources */
} periph_interrput_t;
} periph_interrupt_t;
typedef periph_interrupt_t periph_interrput_t __attribute__((deprecated("in favor of periph_interrupt_t")));
extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];