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Merge branch 'fix/spi_enable_p4_c5_test' into 'master'

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fix(driver_spi): enable p4 multi dut test and c5 test

Closes IDF-9517 and IDF-10322

See merge request espressif/esp-idf!33087
This commit is contained in:
Wan Lei
2024-10-18 14:57:23 +08:00
parent ed91ad56da ca66d3fb40
commit 087f48ca55
13 changed files with 48 additions and 41 deletions
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5
components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h
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@@ -94,11 +94,6 @@
#define WIRE_DELAY 12.5
#endif //CONFIG_IDF_TARGET_ESP32
#define GET_DMA_CHAN(HOST) (HOST)
#define TEST_DMA_CHAN_MASTER GET_DMA_CHAN(TEST_SPI_HOST)
#define TEST_DMA_CHAN_SLAVE GET_DMA_CHAN(TEST_SLAVE_HOST)
#define FUNC_SPI SPI2_FUNC_NUM
#define FUNC_GPIO PIN_FUNC_GPIO

3
components/driver/test_apps/components/test_driver_utils/test_spi_utils.c
View File

@@ -91,6 +91,7 @@ void spitest_slave_task(void* arg)
t.length = txdata.len;
t.tx_buffer = txdata.start;
t.rx_buffer = recvbuf + 8;
t.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
//loop until trans_len != 0 to skip glitches
do {
TEST_ESP_OK(spi_slave_transmit(context->spi, &t, portMAX_DELAY));
@@ -231,6 +232,7 @@ void spitest_gpio_input_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
esp_rom_gpio_connect_in_signal(gpio_num, signal_idx, 0);
}
#if (TEST_SPI_PERIPH_NUM >= 2)
//Note this cs_dev_id is the ID of the connected devices' ID, e.g. if 2 devices are connected to the bus,
//then the cs_dev_id of the 1st and 2nd devices are 0 and 1 respectively.
void same_pin_func_sel(spi_bus_config_t bus, spi_device_interface_config_t dev, uint8_t cs_dev_id)
@@ -247,3 +249,4 @@ void same_pin_func_sel(spi_bus_config_t bus, spi_device_interface_config_t dev,
spitest_gpio_output_sel(bus.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
spitest_gpio_input_sel(bus.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiclk_in);
}
#endif //(TEST_SPI_PERIPH_NUM >= 2)

8
components/esp_driver_spi/test_apps/.build-test-rules.yml
View File

@@ -9,19 +9,11 @@
components/esp_driver_spi/test_apps/master:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET in ["esp32c61"]
temporary: true
reason: no multi-dev runner # TODO: [ESP32C61] IDF-10949
<<: *spi_depends_default
components/esp_driver_spi/test_apps/param:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: no multi-dev runner # TODO: [ESP32P4] IDF-9517
<<: *spi_depends_default
components/esp_driver_spi/test_apps/slave:

2
components/esp_driver_spi/test_apps/components/spi_bench_mark/include/spi_performance.h
View File

@@ -84,7 +84,7 @@
#elif CONFIG_IDF_TARGET_ESP32C61
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 19
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 29
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 14

17
components/esp_driver_spi/test_apps/master/main/test_spi_master.c
View File

@@ -1251,6 +1251,7 @@ static void slave_only_tx_trans(uint8_t *slv_send_buf, uint32_t length)
{
ESP_LOGI(SLAVE_TAG, "FD DMA, Only TX");
spi_slave_transaction_t trans = {0};
trans.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
trans.tx_buffer = slv_send_buf;
trans.length = length * 8;
unity_send_signal("Slave ready");
@@ -1262,6 +1263,7 @@ static void slave_only_rx_trans(uint8_t *slv_recv_buf, uint8_t *mst_send_buf, ui
{
ESP_LOGI(SLAVE_TAG, "FD DMA, Only RX");
spi_slave_transaction_t trans = {};
trans.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
trans.tx_buffer = NULL;
trans.rx_buffer = slv_recv_buf;
trans.length = length * 8;
@@ -1276,6 +1278,7 @@ static void slave_both_trans(uint8_t *slv_send_buf, uint8_t *slv_recv_buf, uint8
{
ESP_LOGI(SLAVE_TAG, "FD DMA, Both TX and RX:");
spi_slave_transaction_t trans = {0};
trans.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
trans.tx_buffer = slv_send_buf;
trans.rx_buffer = slv_recv_buf;
trans.length = length * 8;
@@ -1492,6 +1495,8 @@ TEST_CASE("spi_speed", "[spi]")
#define DUMMY_CS_PINS() {25, 26, 27}
#elif CONFIG_IDF_TARGET_ESP32H2
#define DUMMY_CS_PINS() {9, 10, 11, 12, 22, 25}
#elif CONFIG_IDF_TARGET_ESP32P4
#define DUMMY_CS_PINS() {20, 21, 22, 23, 24, 25}
#else
#define DUMMY_CS_PINS() {0, 1, 4, 5, 8, 9}
#endif //CONFIG_IDF_TARGET_ESP32
@@ -1575,6 +1580,7 @@ void test_add_device_slave(void)
slave_trans.length = sizeof(slave_sendbuf) * 8;
slave_trans.tx_buffer = slave_sendbuf;
slave_trans.rx_buffer = slave_recvbuf;
slave_trans.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
for (uint8_t i = 0; i < SOC_SPI_MAX_CS_NUM; i++) {
memset(slave_recvbuf, 0, sizeof(slave_recvbuf));
@@ -1697,7 +1703,6 @@ static IRAM_ATTR void test_master_iram(void)
spi_flash_enable_interrupts_caches_and_other_cpu();
ESP_LOG_BUFFER_HEX("master tx", ret_trans->tx_buffer, TEST_MASTER_IRAM_TRANS_LEN);
ESP_LOG_BUFFER_HEX("master rx", ret_trans->rx_buffer, TEST_MASTER_IRAM_TRANS_LEN);
spitest_cmp_or_dump(master_exp, trans_cfg.rx_buffer, TEST_MASTER_IRAM_TRANS_LEN);
// Test polling trans api once -------------------------------
@@ -1709,13 +1714,12 @@ static IRAM_ATTR void test_master_iram(void)
spi_flash_enable_interrupts_caches_and_other_cpu();
ESP_LOG_BUFFER_HEX("master tx", ret_trans->tx_buffer, TEST_MASTER_IRAM_TRANS_LEN);
ESP_LOG_BUFFER_HEX("master rx", ret_trans->rx_buffer, TEST_MASTER_IRAM_TRANS_LEN);
spitest_cmp_or_dump(master_exp, trans_cfg.rx_buffer, TEST_MASTER_IRAM_TRANS_LEN);
free(master_send);
free(master_recv);
free(master_exp);
spi_bus_remove_device(dev_handle);
TEST_ESP_OK(spi_bus_remove_device(dev_handle));
spi_bus_free(TEST_SPI_HOST);
}
@@ -1733,20 +1737,19 @@ static void test_iram_slave_normal(void)
slave_trans.length = TEST_MASTER_IRAM_TRANS_LEN * 8;
slave_trans.tx_buffer = slave_sendbuf;
slave_trans.rx_buffer = slave_recvbuf;
slave_trans.flags |= SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO;
test_fill_random_to_buffers_dualboard(211, slave_expect, slave_sendbuf, TEST_MASTER_IRAM_TRANS_LEN);
unity_wait_for_signal("Master ready");
unity_send_signal("Slave ready");
spi_slave_transmit(TEST_SPI_HOST, &slave_trans, portMAX_DELAY);
TEST_ESP_OK(spi_slave_transmit(TEST_SPI_HOST, &slave_trans, portMAX_DELAY));
ESP_LOG_BUFFER_HEX("slave tx", slave_sendbuf, TEST_MASTER_IRAM_TRANS_LEN);
ESP_LOG_BUFFER_HEX("slave rx", slave_recvbuf, TEST_MASTER_IRAM_TRANS_LEN);
spitest_cmp_or_dump(slave_expect, slave_recvbuf, TEST_MASTER_IRAM_TRANS_LEN);
unity_send_signal("Slave ready");
test_fill_random_to_buffers_dualboard(119, slave_expect, slave_sendbuf, TEST_MASTER_IRAM_TRANS_LEN);
spi_slave_transmit(TEST_SPI_HOST, &slave_trans, portMAX_DELAY);
TEST_ESP_OK(spi_slave_transmit(TEST_SPI_HOST, &slave_trans, portMAX_DELAY));
ESP_LOG_BUFFER_HEX("slave tx", slave_sendbuf, TEST_MASTER_IRAM_TRANS_LEN);
ESP_LOG_BUFFER_HEX("slave rx", slave_recvbuf, TEST_MASTER_IRAM_TRANS_LEN);
spitest_cmp_or_dump(slave_expect, slave_recvbuf, TEST_MASTER_IRAM_TRANS_LEN);
free(slave_sendbuf);

5
components/esp_driver_spi/test_apps/master/pytest_spi_master.py
View File

@@ -5,7 +5,6 @@ import pytest
# If `test_env` is define, should not run on generic runner
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32c61'], reason='test case fail') # TODO: [ESP32C61] IDF-10949
@pytest.mark.generic
@pytest.mark.parametrize('config', ['defaults', 'release', 'freertos_compliance', 'freertos_flash',], indirect=True)
def test_master_single_dev(case_tester) -> None: # type: ignore
@@ -27,8 +26,8 @@ def test_master_esp_flash(case_tester) -> None: # type: ignore
# if `test_env` not defined, will run on `generic_multi_device` by default
# TODO: [ESP32P4] IDF-9517 [ESP32C5] IDF-10322 [ESP32C61] IDF-10949
@pytest.mark.temp_skip_ci(targets=['esp32p4', 'esp32c5', 'esp32c61'], reason='no multi-dev runner')
# TODO: [ESP32C61] IDF-10949
@pytest.mark.temp_skip_ci(targets=['esp32c61'], reason='no multi-dev runner')
@pytest.mark.supported_targets
@pytest.mark.generic_multi_device
@pytest.mark.parametrize(

23
components/esp_driver_spi/test_apps/param/main/test_spi_param.c
View File

@@ -109,6 +109,10 @@ static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_p
devcfg.flags |= SPI_DEVICE_NO_DUMMY;
}
#if CONFIG_IDF_TARGET_ESP32P4 //TODO: IDF-8313, update P4 defaulte clock source
devcfg.clock_source = SPI_CLK_SRC_SPLL;
#endif
//slave config
slvcfg.mode = pset->mode;
slave_pull_up(&buscfg, slvcfg.spics_io_num);
@@ -192,6 +196,7 @@ static void local_test_loop(const void *arg1, void *arg2)
.tx_buffer = txdata->start,
.rx_buffer = recvbuf,
.length = txdata->len,
.flags = SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO,
};
esp_err_t err = spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_trans, portMAX_DELAY);
TEST_ESP_OK(err);
@@ -247,8 +252,7 @@ static void local_test_loop(const void *arg1, void *arg2)
/************ Timing Test ***********************************************/
//TODO: esp32s2 has better timing performance
static spitest_param_set_t timing_pgroup[] = {
//signals are not fed to peripherals through iomux if the functions are not selected to iomux
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
#if (SLAVE_IOMUX_PIN_MISO != -1) //SPI3 slave has iomux pin
{
.pset_name = "FULL_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
@@ -277,8 +281,7 @@ static spitest_param_set_t timing_pgroup[] = {
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
//signals are not fed to peripherals through iomux if the functions are not selected to iomux
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
#if (SLAVE_IOMUX_PIN_MISO != -1) //SPI3 slave has iomux pin
{
.pset_name = "MISO_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
@@ -307,8 +310,7 @@ static spitest_param_set_t timing_pgroup[] = {
.slave_iomux = false,
.slave_tv_ns = TV_INT_CONNECT_GPIO,
},
//signals are not fed to peripherals through iomux if the functions are not selected to iomux
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
#if (SLAVE_IOMUX_PIN_MISO != -1) //SPI3 slave has iomux pin
{
.pset_name = "MOSI_DUP, MASTER IOMUX",
.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
@@ -616,7 +618,8 @@ TEST_CASE("Slave receive correct data", "[spi]")
spi_slave_transaction_t slave_trans = {
.length = slave_trans_len * 8,
.tx_buffer = slave_sendbuf,
.rx_buffer = slave_recvbuf
.rx_buffer = slave_recvbuf,
.flags = SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO,
};
esp_err_t ret = spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_trans, portMAX_DELAY);
TEST_ESP_OK(ret);
@@ -1270,7 +1273,9 @@ static int s_spi_bus_freq[] = {
IDF_PERFORMANCE_MAX_SPI_CLK_FREQ / 7,
IDF_PERFORMANCE_MAX_SPI_CLK_FREQ / 4,
IDF_PERFORMANCE_MAX_SPI_CLK_FREQ / 2,
#if !CONFIG_IDF_TARGET_ESP32P4 //TODO: IDF-8313, update P4 defaulte clock source
IDF_PERFORMANCE_MAX_SPI_CLK_FREQ,
#endif
};
//------------------------------------------- Full Duplex with DMA Freq test --------------------------------------
@@ -1483,6 +1488,7 @@ static void test_slave_fd_no_dma(void)
.tx_buffer = slave_send,
.rx_buffer = slave_receive,
.length = test_trans_len * 8,
.flags = SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO,
};
unity_send_signal("Slave ready");
TEST_ESP_OK(spi_slave_transmit(TEST_SPI_HOST, &trans_cfg, portMAX_DELAY));
@@ -1587,6 +1593,7 @@ static void test_slave_hd_dma(void)
TEST_ESP_OK(spi_slave_hd_queue_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &slave_trans, portMAX_DELAY));
slave_trans.data = slave_receive;
TEST_ESP_OK(spi_slave_hd_queue_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &slave_trans, portMAX_DELAY));
TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &ret_trans, portMAX_DELAY));
TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &ret_trans, portMAX_DELAY));
ESP_LOG_BUFFER_HEX("slave tx", slave_send, test_trans_len);
@@ -1688,6 +1695,7 @@ static void test_slave_hd_no_dma(void)
TEST_ESP_OK(spi_slave_hd_queue_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &slave_trans, portMAX_DELAY));
slave_trans.data = slave_receive;
TEST_ESP_OK(spi_slave_hd_queue_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &slave_trans, portMAX_DELAY));
TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &ret_trans, portMAX_DELAY));
TEST_ESP_OK(spi_slave_hd_get_trans_res(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &ret_trans, portMAX_DELAY));
ESP_LOG_BUFFER_HEX("slave tx", slave_send, test_trans_len);
@@ -1951,6 +1959,7 @@ static void test_slave_sio_no_dma(void)
.length = SOC_SPI_MAXIMUM_BUFFER_SIZE * 8,
.tx_buffer = slave_send,
.rx_buffer = slave_receive,
.flags = SPI_SLAVE_TRANS_DMA_BUFFER_ALIGN_AUTO,
};
unity_send_signal("Slave ready");
TEST_ESP_OK(spi_slave_transmit(TEST_SPI_HOST, &trans, portMAX_DELAY));

7
components/esp_driver_spi/test_apps/param/pytest_spi_param.py
View File

@@ -4,9 +4,7 @@ import pytest
# If `test_env` is define, should not run on generic runner
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 support TBD') # TODO: IDF-8942
@pytest.mark.supported_targets
@pytest.mark.esp32h2
@pytest.mark.generic
def test_param_single_dev(case_tester) -> None: # type: ignore
for case in case_tester.test_menu:
@@ -16,10 +14,9 @@ def test_param_single_dev(case_tester) -> None: # type: ignore
# if `test_env` not defined, will run on `generic_multi_device` by default
# TODO: [ESP32P4] IDF-8942 [ESP32C5] IDF-10322 [ESP32C61] IDF-10949
@pytest.mark.temp_skip_ci(targets=['esp32p4', 'esp32c5', 'esp32c61'], reason='no multi-dev runner')
# TODO: [ESP32C61] IDF-10949
@pytest.mark.temp_skip_ci(targets=['esp32c61'], reason='no multi-dev runner')
@pytest.mark.supported_targets
@pytest.mark.esp32h2
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2,], indirect=True)
def test_param_multi_dev(case_tester) -> None: # type: ignore

2
components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c
View File

@@ -562,6 +562,7 @@ static IRAM_ATTR void test_slave_isr_iram(void)
}
TEST_CASE_MULTIPLE_DEVICES("SPI_Slave: Test_ISR_IRAM_disable_cache", "[spi_ms]", test_slave_iram_master_normal, test_slave_isr_iram);
#if !SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE //isr option is not supported in this condition
static uint32_t isr_trans_cnt, isr_trans_test_fail;
static IRAM_ATTR void test_trans_in_isr_post_trans_cbk(spi_slave_transaction_t *curr_trans)
{
@@ -725,6 +726,7 @@ static IRAM_ATTR void spi_queue_reset_in_isr(void)
spi_slave_free(TEST_SPI_HOST);
}
TEST_CASE_MULTIPLE_DEVICES("SPI_Slave: Test_Queue_Reset_in_ISR", "[spi_ms]", test_slave_iram_master_normal, spi_queue_reset_in_isr);
#endif // SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
#endif // CONFIG_SPI_SLAVE_ISR_IN_IRAM
#if (SOC_CPU_CORES_NUM > 1) && (!CONFIG_FREERTOS_UNICORE)

4
components/esp_driver_spi/test_apps/slave/pytest_spi_slave.py
View File

@@ -15,8 +15,8 @@ def test_slave_single_dev(case_tester) -> None: # type: ignore
# if `test_env` not defined, will run on `generic_multi_device` by default
# TODO: [ESP32P4] IDF-9517 [ESP32C5] IDF-10322 [ESP32C61] IDF-10949
@pytest.mark.temp_skip_ci(targets=['esp32p4', 'esp32c5', 'esp32c61'], reason='no multi-dev runner')
# TODO: [ESP32C61] IDF-10949
@pytest.mark.temp_skip_ci(targets=['esp32c61'], reason='no multi-dev runner')
@pytest.mark.supported_targets
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count, config', [(2, 'defaults'), (2, 'iram_safe')], indirect=True)

10
components/esp_driver_spi/test_apps/slave_hd/main/test_spi_slave_hd.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -855,19 +855,23 @@ static void hd_slave_quad(void)
{
.data = slave_recv_buf,
.len = (trans_len + 3) & (~3),
.flags = SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO,
},
{
.data = slave_recv_buf + BUF_SIZE / 2,
.len = (trans_len + 3) & (~3),
.flags = SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO,
},
//send
{
.data = slave_send_buf,
.len = (trans_len + 3) & (~3),
.flags = SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO,
},
{
.data = slave_send_buf + BUF_SIZE / 2,
.len = (trans_len + 3) & (~3),
.flags = SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO,
},
};
@@ -901,7 +905,7 @@ static void hd_slave_quad(void)
spi_slave_hd_deinit(TEST_SLAVE_HOST);
}
TEST_CASE_MULTIPLE_DEVICES("SPI quad hd test ", "[spi_ms][test_env=generic_multi_device]", hd_master_quad, hd_slave_quad);
TEST_CASE_MULTIPLE_DEVICES("SPI quad hd test", "[spi_ms][test_env=generic_multi_device]", hd_master_quad, hd_slave_quad);
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
@@ -941,6 +945,7 @@ void slave_run_append(void)
slave_rx_trans[append_idx].data = heap_caps_aligned_calloc(4, 1, TEST_TRANS_LEN, MALLOC_CAP_DMA);
TEST_ASSERT_NOT_NULL(slave_rx_trans[append_idx].data);
slave_rx_trans[append_idx].len = trans_len;
slave_rx_trans[append_idx].flags |= SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO;
TEST_ESP_OK(spi_slave_hd_append_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_RX, &slave_rx_trans[append_idx], portMAX_DELAY));
}
@@ -982,6 +987,7 @@ void slave_run_append(void)
}
slave_tx_trans[append_idx].data = slave_rx_trans[append_idx].data;
slave_tx_trans[append_idx].len = trans_len;
slave_tx_trans[append_idx].flags |= SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO;
prepare_data(slave_tx_trans[append_idx].data, trans_len, -3);
TEST_ESP_OK(spi_slave_hd_append_trans(TEST_SPI_HOST, SPI_SLAVE_CHAN_TX, &slave_tx_trans[append_idx], portMAX_DELAY));
}

2
components/esp_driver_spi/test_apps/slave_hd/pytest_spi_slave_hd.py
View File

@@ -26,8 +26,10 @@ def test_slave_hd_single_dev(case_tester) -> None: # type: ignore
@pytest.mark.esp32s3
@pytest.mark.esp32c2
@pytest.mark.esp32c3
@pytest.mark.esp32c5
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2,], indirect=True)
def test_slave_hd_multi_dev(case_tester) -> None: # type: ignore

1
components/soc/esp32p4/spi_periph.c
View File

@@ -73,7 +73,6 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
.spiclk_in = SPI3_CK_PAD_IN_IDX,
.spid_out = SPI3_D_PAD_OUT_IDX,
.spiq_out = SPI3_QO_PAD_OUT_IDX,
//SPI3 doesn't have wp and hd signals
.spiwp_out = SPI3_WP_PAD_OUT_IDX,
.spihd_out = SPI3_HOLD_PAD_OUT_IDX,
.spid_in = SPI3_D_PAD_IN_IDX,