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feat(soc): added flash operation range macros in ext_mem_defs.h

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This commit is contained in:
Armando
2023-10-16 17:18:19 +08:00
parent 2308292ca3
commit 17063b51e0
9 changed files with 71 additions and 18 deletions
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11
components/bootloader_support/bootloader_flash/src/bootloader_flash.c
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@ -146,11 +146,14 @@ static const char *TAG = "bootloader_flash";
63th block for bootloader_flash_read
*/
#define MMU_BLOCK0_VADDR SOC_DROM_LOW
#if CONFIG_IDF_TARGET_ESP32P4
//TODO: IDF-7918
#define MMAP_MMU_SIZE (SOC_DRAM_FLASH_ADDRESS_HIGH - SOC_DRAM_FLASH_ADDRESS_LOW) // This mmu size means that the mmu size to be mapped
#else
#if CONFIG_IDF_TARGET_ESP32S2
/**
* On ESP32S2 we use `(SOC_DRAM0_CACHE_ADDRESS_HIGH - SOC_DRAM0_CACHE_ADDRESS_LOW)`.
* As this code is in bootloader, we keep this on ESP32S2
*/
#define MMAP_MMU_SIZE (SOC_DRAM0_CACHE_ADDRESS_HIGH - SOC_DRAM0_CACHE_ADDRESS_LOW) // This mmu size means that the mmu size to be mapped
#else
#define MMAP_MMU_SIZE (SOC_DRAM_FLASH_ADDRESS_HIGH - SOC_DRAM_FLASH_ADDRESS_LOW) // This mmu size means that the mmu size to be mapped
#endif
#define MMU_BLOCK63_VADDR (MMU_BLOCK0_VADDR + MMAP_MMU_SIZE - SPI_FLASH_MMU_PAGE_SIZE)
#define FLASH_READ_VADDR MMU_BLOCK63_VADDR

8
components/soc/esp32/include/soc/ext_mem_defs.h
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@ -28,6 +28,14 @@ extern "C" {
#define SOC_DROM0_CACHE_ADDRESS_LOW 0x3F400000
#define SOC_DROM0_CACHE_ADDRESS_HIGH 0x3F800000
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DROM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DROM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_PSRAM_ADDRESS_LOW SOC_DRAM1_CACHE_ADDRESS_LOW
#define SOC_DRAM_PSRAM_ADDRESS_HIGH SOC_DRAM1_CACHE_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

6
components/soc/esp32c2/include/soc/ext_mem_defs.h
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@ -34,6 +34,12 @@ extern "C" {
#define SOC_DRAM0_CACHE_ADDRESS_LOW 0x3C000000
#define SOC_DRAM0_CACHE_ADDRESS_HIGH (SOC_DRAM0_CACHE_ADDRESS_LOW + ((SOC_MMU_PAGE_SIZE) * SOC_MMU_ENTRY_NUM)) // MMU has 64 pages
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DRAM0_CACHE_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

6
components/soc/esp32c3/include/soc/ext_mem_defs.h
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@ -23,6 +23,12 @@ extern "C" {
#define SOC_DRAM0_CACHE_ADDRESS_LOW 0x3C000000
#define SOC_DRAM0_CACHE_ADDRESS_HIGH 0x3C800000
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DRAM0_CACHE_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

6
components/soc/esp32c6/include/soc/ext_mem_defs.h
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@ -26,6 +26,12 @@ extern "C" {
#define SOC_DRAM0_CACHE_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW //I/D share the same vaddr range
#define SOC_DRAM0_CACHE_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH //I/D share the same vaddr range
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DRAM0_CACHE_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

6
components/soc/esp32h2/include/soc/ext_mem_defs.h
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@ -26,6 +26,12 @@ extern "C" {
#define SOC_DRAM0_CACHE_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW //I/D share the same vaddr range
#define SOC_DRAM0_CACHE_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH //I/D share the same vaddr range
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DRAM0_CACHE_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

14
components/soc/esp32p4/include/soc/ext_mem_defs.h
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@ -31,11 +31,17 @@ extern "C" {
#define SOC_DRAM0_CACHE_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW //I/D share the same vaddr range
#define SOC_DRAM0_CACHE_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH //I/D share the same vaddr range
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH 0x44000000
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH 0x44000000
#define SOC_DRAM_PSRAM_ADDRESS_LOW 0x48000000
#define SOC_DRAM_PSRAM_ADDRESS_HIGH 0x4C000000
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_IRAM_FLASH_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_IRAM_FLASH_ADDRESS_HIGH
#define SOC_IRAM_PSRAM_ADDRESS_LOW 0x48000000
#define SOC_IRAM_PSRAM_ADDRESS_HIGH 0x4C000000
#define SOC_DRAM_PSRAM_ADDRESS_LOW SOC_IRAM_PSRAM_ADDRESS_LOW
#define SOC_DRAM_PSRAM_ADDRESS_HIGH SOC_IRAM_PSRAM_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

26
components/soc/esp32s2/include/soc/ext_mem_defs.h
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@ -13,24 +13,24 @@ extern "C" {
#endif
/*IRAM0 is connected with Cache IBUS0*/
#define SOC_IRAM0_ADDRESS_LOW 0x40000000
#define SOC_IRAM0_ADDRESS_HIGH 0x40400000
#define SOC_IRAM0_ADDRESS_LOW 0x40000000
#define SOC_IRAM0_ADDRESS_HIGH 0x40400000
#define SOC_IRAM0_CACHE_ADDRESS_LOW 0x40080000
#define SOC_IRAM0_CACHE_ADDRESS_HIGH 0x40400000
/*IRAM1 is connected with Cache IBUS1*/
#define SOC_IRAM1_ADDRESS_LOW 0x40400000
#define SOC_IRAM1_ADDRESS_HIGH 0x40800000
#define SOC_IRAM1_ADDRESS_LOW 0x40400000
#define SOC_IRAM1_ADDRESS_HIGH 0x40800000
/*DROM0 is connected with Cache IBUS2*/
#define SOC_DROM0_ADDRESS_LOW 0x3f000000
#define SOC_DROM0_ADDRESS_HIGH 0x3f400000
#define SOC_DROM0_ADDRESS_LOW 0x3f000000
#define SOC_DROM0_ADDRESS_HIGH 0x3f400000
/*DRAM0 is connected with Cache DBUS0*/
#define SOC_DRAM0_ADDRESS_LOW 0x3fc00000
#define SOC_DRAM0_ADDRESS_HIGH 0x40000000
#define SOC_DRAM0_CACHE_ADDRESS_LOW 0x3fc00000
#define SOC_DRAM0_CACHE_ADDRESS_HIGH 0x3ff80000
#define SOC_DRAM0_CACHE_ADDRESS_LOW 0x3fc00000
#define SOC_DRAM0_CACHE_ADDRESS_HIGH 0x3ff80000
/*DRAM1 is connected with Cache DBUS1*/
#define SOC_DRAM1_ADDRESS_LOW 0x3f800000
@ -39,8 +39,14 @@ extern "C" {
/*DPORT is connected with Cache DBUS2*/
#define SOC_DPORT_ADDRESS_LOW 0x3f400000
#define SOC_DPORT_ADDRESS_HIGH 0x3f800000
#define SOC_DPORT_CACHE_ADDRESS_LOW 0x3f500000
#define SOC_DPORT_CACHE_ADDRESS_HIGH 0x3f800000
#define SOC_DPORT_CACHE_ADDRESS_LOW 0x3f500000
#define SOC_DPORT_CACHE_ADDRESS_HIGH 0x3f800000
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DROM0_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DROM0_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)

6
components/soc/esp32s3/include/soc/ext_mem_defs.h
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@ -23,6 +23,12 @@ extern "C" {
#define SOC_DRAM0_CACHE_ADDRESS_LOW 0x3C000000
#define SOC_DRAM0_CACHE_ADDRESS_HIGH 0x3E000000
#define SOC_IRAM_FLASH_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW
#define SOC_IRAM_FLASH_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH
#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
#define SOC_DRAM_FLASH_ADDRESS_HIGH SOC_DRAM0_CACHE_ADDRESS_HIGH
#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)