forked from espressif/esp-idf
feat(esp_security): Add a TEE-specific crypto lock layer with stub implementations
This commit is contained in:
@@ -32,7 +32,7 @@ if(NOT non_os_build)
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list(APPEND srcs "src/esp_crypto_lock.c" "src/esp_crypto_periph_clk.c")
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list(APPEND priv_requires efuse esp_hw_support esp_system esp_timer)
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elseif(esp_tee_build)
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list(APPEND srcs "src/esp_crypto_periph_clk.c")
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list(APPEND srcs "src/esp_crypto_lock.c" "src/esp_crypto_periph_clk.c")
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list(APPEND includes "src/${IDF_TARGET}")
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list(APPEND priv_requires esp_hw_support)
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endif()
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -18,6 +18,7 @@ DS: needs HMAC (which needs SHA), AES and MPI
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ECDSA: needs ECC and MPI
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*/
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#if !NON_OS_BUILD
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#ifdef SOC_DIG_SIGN_SUPPORTED
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/* Lock for DS peripheral */
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static _lock_t s_crypto_ds_lock;
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@@ -162,3 +163,52 @@ void esp_crypto_key_manager_lock_release(void)
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_lock_release(&s_crypto_key_manager_lock);
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}
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#endif /* SOC_KEY_MANAGER_SUPPORTED */
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#else /* NON_OS_BUILD */
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#ifdef SOC_HMAC_SUPPORTED
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void esp_crypto_hmac_lock_acquire(void) {}
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void esp_crypto_hmac_lock_release(void) {}
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#endif /* SOC_HMAC_SUPPORTED */
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#ifdef SOC_DIG_SIGN_SUPPORTED
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void esp_crypto_ds_lock_acquire(void) {}
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void esp_crypto_ds_lock_release(void) {}
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#endif /* SOC_DIG_SIGN_SUPPORTED */
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#if defined(SOC_SHA_SUPPORTED) || defined(SOC_AES_SUPPORTED)
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void esp_crypto_sha_aes_lock_acquire(void) {}
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void esp_crypto_sha_aes_lock_release(void) {}
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#endif /* defined(SOC_SHA_SUPPORTED) || defined(SOC_AES_SUPPORTED) */
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#if defined(SOC_SHA_CRYPTO_DMA) || defined(SOC_AES_CRYPTO_DMA)
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void esp_crypto_dma_lock_acquire(void) {}
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void esp_crypto_dma_lock_release(void) {}
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#endif /* defined(SOC_SHA_CRYPTO_DMA) || defined(SOC_AES_CRYPTO_DMA) */
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#ifdef SOC_MPI_SUPPORTED
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void esp_crypto_mpi_lock_acquire(void) {}
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void esp_crypto_mpi_lock_release(void) {}
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#endif /* SOC_MPI_SUPPORTED */
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#ifdef SOC_ECC_SUPPORTED
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void esp_crypto_ecc_lock_acquire(void) {}
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void esp_crypto_ecc_lock_release(void) {}
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#endif /* SOC_ECC_SUPPORTED */
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#ifdef SOC_ECDSA_SUPPORTED
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void esp_crypto_ecdsa_lock_acquire(void) {}
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void esp_crypto_ecdsa_lock_release(void) {}
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#endif /* SOC_ECDSA_SUPPORTED */
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#ifdef SOC_KEY_MANAGER_SUPPORTED
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void esp_crypto_key_manager_lock_acquire(void) {}
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void esp_crypto_key_manager_lock_release(void) {}
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#endif /* SOC_KEY_MANAGER_SUPPORTED */
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#endif /* !NON_OS_BUILD */
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@@ -35,13 +35,8 @@
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#include "esp_crypto_periph_clk.h"
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#if SOC_AES_GDMA
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#if !ESP_TEE_BUILD
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#define AES_LOCK() esp_crypto_sha_aes_lock_acquire()
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#define AES_RELEASE() esp_crypto_sha_aes_lock_release()
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#else
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#define AES_LOCK()
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#define AES_RELEASE()
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#endif
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#elif SOC_AES_CRYPTO_DMA
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#define AES_LOCK() esp_crypto_dma_lock_acquire()
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#define AES_RELEASE() esp_crypto_dma_lock_release()
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@@ -52,14 +52,6 @@
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#endif
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#endif /* SOC_SHA_SUPPORT_DMA */
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#if !ESP_TEE_BUILD
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#define SHA_LOCK() esp_crypto_sha_aes_lock_acquire()
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#define SHA_RELEASE() esp_crypto_sha_aes_lock_release()
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#else
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#define SHA_LOCK()
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#define SHA_RELEASE()
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#endif
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void esp_sha_write_digest_state(esp_sha_type sha_type, void *digest_state)
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{
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sha_hal_write_digest(sha_type, digest_state);
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@@ -99,7 +91,7 @@ inline static size_t block_length(esp_sha_type type)
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void esp_sha_acquire_hardware(void)
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{
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/* Released when releasing hw with esp_sha_release_hardware() */
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SHA_LOCK();
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esp_crypto_sha_aes_lock_acquire();
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esp_crypto_sha_enable_periph_clk(true);
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}
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@@ -107,7 +99,7 @@ void esp_sha_acquire_hardware(void)
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void esp_sha_release_hardware(void)
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{
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esp_crypto_sha_enable_periph_clk(false);
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SHA_RELEASE();
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esp_crypto_sha_aes_lock_release();
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}
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void esp_sha_block(esp_sha_type sha_type, const void *data_block, bool is_first_block)
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