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fix(lightsleep): suspend cache before goto sleep

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There is a possibility that the cache is still accessing the
SPI flashwhen sleep isolating SPI IO, so it is necessary to
wait for the cache to be free before requesting sleep.
This commit is contained in:
wuzhenghui
2023-07-31 13:48:27 +08:00
parent bce97e2128
commit 26618ad536
2 changed files with 7 additions and 22 deletions
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2
components/esp_hw_support/linker.lf
View File

@@ -15,7 +15,7 @@ entries:
rtc_clk (noflash)
esp_gpio_reserve: esp_gpio_reserve_pins (noflash)
esp_gpio_reserve: esp_gpio_is_pin_reserved (noflash)
if SOC_CONFIGURABLE_VDDSDIO_SUPPORTED = y && (PM_SLP_IRAM_OPT = y || ESP_SLEEP_POWER_DOWN_FLASH = y):
if SOC_CONFIGURABLE_VDDSDIO_SUPPORTED = y:
rtc_init:rtc_vddsdio_get_config (noflash)
rtc_init:rtc_vddsdio_set_config (noflash)
if IDF_TARGET_ESP32C6 = n && IDF_TARGET_ESP32H2 = n: # TODO: IDF-5645

27
components/esp_hw_support/sleep_modes.c
View File

@@ -397,8 +397,6 @@ void esp_deep_sleep_deregister_hook(esp_deep_sleep_cb_t old_dslp_cb)
portEXIT_CRITICAL(&spinlock_rtc_deep_sleep);
}
#if (CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND && !CONFIG_IDF_TARGET_ESP32H2) \
|| CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION
static int s_cache_suspend_cnt = 0;
// Must be called from critical sections.
@@ -417,7 +415,6 @@ static void IRAM_ATTR resume_cache(void) {
cache_hal_resume(CACHE_TYPE_ALL);
}
}
#endif
// [refactor-todo] provide target logic for body of uart functions below
static void IRAM_ATTR flush_uarts(void)
@@ -737,13 +734,14 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
#endif
#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
} else {
/* Cache Suspend 1: will wait cache idle in cache suspend */
suspend_cache();
/* On esp32c6, only the lp_aon pad hold function can only hold the GPIO state in the active mode.
In order to avoid the leakage of the SPI cs pin, hold it here */
#if (CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND)
#if !CONFIG_IDF_TARGET_ESP32H2 // ESP32H2 TODO IDF-7359: related rtcio ll func not supported yet
if(!(pd_flags & RTC_SLEEP_PD_VDDSDIO)) {
/* Cache Suspend 1: will wait cache idle in cache suspend, also means SPI bus IDLE, then we can hold SPI CS pin safely*/
suspend_cache();
/* Cache suspend also means SPI bus IDLE, then we can hold SPI CS pin safely */
gpio_ll_hold_en(&GPIO, SPI_CS0_GPIO_NUM);
}
#endif
@@ -766,21 +764,12 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
#if !CONFIG_IDF_TARGET_ESP32H2 // ESP32H2 TODO IDF-7359: related rtcio ll func not supported yet
if(!(pd_flags & RTC_SLEEP_PD_VDDSDIO)) {
gpio_ll_hold_dis(&GPIO, SPI_CS0_GPIO_NUM);
/* Cache Resume 1: Resume cache for continue running*/
resume_cache();
}
#endif
#endif
/* Will resume cache after flash ready. */
}
#if CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION
if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
/* Cache Suspend 2: If previous sleep powerdowned the flash, suspend cache here so that the
access to flash before flash ready can be explicitly exposed. */
suspend_cache();
}
#endif
#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
rtc_sleep_systimer_enable(true);
@@ -925,12 +914,8 @@ static esp_err_t esp_light_sleep_inner(uint32_t pd_flags,
esp_rom_delay_us(flash_enable_time_us);
}
#if CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION
if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
/* Cache Resume 2: flash is ready now, we can resume the cache and access flash safely after */
resume_cache();
}
#endif
/* Cache Resume 1: flash is ready now, we can resume the cache and access flash safely after */
resume_cache();
return reject;
}