forked from espressif/esp-idf
doc: update cn trans intr_alloc.rst
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@@ -69,12 +69,12 @@ To illustrate why shard interrupts can only be level-triggered, take the scenari
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.. only:: esp32p4
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Multicore considerations
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Multicore Considerations
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------------------------
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Despite providing internal interrupts, part of the RISC-V core, ESP-IDF only makes the use of the external interrupts, within the {IDF_TARGET_NAME} but outside the RISC-V cores themselves. Most {IDF_TARGET_NAME} peripherals are of this type.
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Each core on {IDF_TARGET_NAME} provides internal interrupts that are triggered by the core itself and external interrupts that are triggered by peripherals. However, ESP-IDF only makes use of the external interrupts on {IDF_TARGET_NAME}. Most {IDF_TARGET_NAME} interrupt sources are external interrupts.
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External interrupt slots in both CPU cores are wired to an interrupt matrix, which can be used to route any external interrupt source, defined in ``soc/interrupts.h`` as ``ETS_*_INTR_SOURCE``, to any of these interrupt slots.
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Each external interrupt slot of each core is wired to the interrupt matrix. The interrupt matrix allows any interrupt slot to be connected to any external interrupt source. Mapping multiple external interrupts sources to a single slot is also supported. These external interrupt sources are defined in ``soc/interrupts.h`` as ``ETS_*_INTR_SOURCE``.
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.. only:: SOC_HP_CPU_HAS_MULTIPLE_CORES
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@@ -65,16 +65,18 @@
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外部外设中断
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^^^^^^^^^^^^^^^^^^^^
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剩余的中断源来自外部外设,在 ``soc/interrupts.h`` 中定义为 ``ETS_*_INTR_SOURCE``。
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其余中断源来自外部外设。
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.. only:: esp32p4
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多核问题
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--------
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.. only:: SOC_HP_CPU_HAS_MULTIPLE_CORES
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每个 {IDF_TARGET_NAME} 内核都同时提供内部中断和外部中断,内部中断由内核自身触发,外部中断由外设触发。但 ESP-IDF 仅使用 {IDF_TARGET_NAME} 上的外部中断。大多数 {IDF_TARGET_NAME} 中断源都属于外部中断。
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两个 CPU 的非内部中断源槽都与中断矩阵相连,可以将任何外部中断源发送到这些中断槽中。
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每个内核的各个外部中断槽都与中断矩阵相连。通过中断矩阵可将任何外部中断源连接到任何中断槽,也可将多个外部中断源映射到同一个中断槽。外部中断源在 ``soc/interrupts.h`` 中定义为 ``ETS_*_INTR_SOURCE``。
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.. only:: SOC_HP_CPU_HAS_MULTIPLE_CORES
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- 外部中断会始终被分配到执行该分配的内核上。
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- 释放外部中断必须在分配该中断的内核上进行。
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