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Merge branch 'refactor/use_isp_hw_auto_clk_force_en' into 'master'

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isp: use isp hw auto clk force en

Closes IDF-10773

See merge request espressif/esp-idf!36423
This commit is contained in:
Armando (Dou Yiwen)
2025-01-16 15:31:23 +08:00
parent 4beb9b7390 775e4d584c
commit 3957211c34
10 changed files with 66 additions and 68 deletions
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3
components/esp_driver_isp/src/isp_ae.c
View File

@@ -101,6 +101,7 @@ esp_err_t esp_isp_new_ae_controller(isp_proc_handle_t isp_proc, const esp_isp_ae
ESP_GOTO_ON_ERROR(intr_priority != isp_proc->intr_priority, err2, TAG, "intr_priority error");
ESP_GOTO_ON_ERROR(esp_isp_register_isr(ae_ctlr->isp_proc, ISP_SUBMODULE_AE), err2, TAG, "fail to register ISR");
isp_ll_ae_set_clk_ctrl_mode(isp_proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
isp_ll_ae_set_sample_point(isp_proc->hal.hw, ae_config->sample_point);
isp_ll_ae_enable(isp_proc->hal.hw, false);
isp_hal_ae_window_config(&isp_proc->hal, &ae_config->window);
@@ -141,7 +142,6 @@ esp_err_t esp_isp_ae_controller_enable(isp_ae_ctlr_t ae_ctlr)
ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&ae_ctlr->fsm, &expected_fsm, ISP_FSM_ENABLE),
ESP_ERR_INVALID_STATE, TAG, "controller not in init state");
isp_ll_ae_clk_enable(ae_ctlr->isp_proc->hal.hw, true);
isp_ll_enable_intr(ae_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AE_MASK, true);
isp_ll_ae_enable(ae_ctlr->isp_proc->hal.hw, true);
@@ -155,7 +155,6 @@ esp_err_t esp_isp_ae_controller_disable(isp_ae_ctlr_t ae_ctlr)
ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&ae_ctlr->fsm, &expected_fsm, ISP_FSM_INIT),
ESP_ERR_INVALID_STATE, TAG, "controller not in enable state");
isp_ll_ae_clk_enable(ae_ctlr->isp_proc->hal.hw, false);
isp_ll_enable_intr(ae_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AE_MASK, false);
isp_ll_ae_enable(ae_ctlr->isp_proc->hal.hw, false);
esp_intr_disable(ae_ctlr->intr_handle);

3
components/esp_driver_isp/src/isp_af.c
View File

@@ -127,6 +127,7 @@ esp_err_t esp_isp_new_af_controller(isp_proc_handle_t isp_proc, const esp_isp_af
isp_ll_af_set_edge_thresh_mode(isp_proc->hal.hw, ISP_LL_AF_EDGE_DETECTOR_MODE_MANUAL);
isp_ll_af_set_edge_thresh(isp_proc->hal.hw, af_config->edge_thresh);
isp_ll_clear_intr(isp_proc->hal.hw, ISP_LL_EVENT_AF_MASK);
isp_ll_af_set_clk_ctrl_mode(isp_proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
*ret_hdl = af_ctlr;
@@ -168,7 +169,6 @@ esp_err_t esp_isp_af_controller_enable(isp_af_ctlr_t af_ctlr)
ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&af_ctlr->fsm, &expected_fsm, ISP_FSM_ENABLE),
ESP_ERR_INVALID_STATE, TAG, "controller not in init state");
isp_ll_af_clk_enable(af_ctlr->isp_proc->hal.hw, true);
isp_ll_enable_intr(af_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AF_MASK, true);
isp_ll_af_enable(af_ctlr->isp_proc->hal.hw, true);
@@ -182,7 +182,6 @@ esp_err_t esp_isp_af_controller_disable(isp_af_ctlr_t af_ctlr)
ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&af_ctlr->fsm, &expected_fsm, ISP_FSM_INIT),
ESP_ERR_INVALID_STATE, TAG, "controller not in enable state");
isp_ll_af_clk_enable(af_ctlr->isp_proc->hal.hw, false);
isp_ll_enable_intr(af_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AF_MASK, false);
isp_ll_af_enable(af_ctlr->isp_proc->hal.hw, false);
esp_intr_disable(af_ctlr->intr_handle);

3
components/esp_driver_isp/src/isp_awb.c
View File

@@ -109,6 +109,7 @@ esp_err_t esp_isp_new_awb_controller(isp_proc_handle_t isp_proc, const esp_isp_a
// Configure the hardware
isp_ll_awb_enable(isp_proc->hal.hw, false);
isp_ll_awb_set_clk_ctrl_mode(isp_proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
isp_ll_awb_enable_algorithm_mode(isp_proc->hal.hw, true);
ESP_GOTO_ON_ERROR(s_esp_isp_awb_config_hardware(isp_proc, awb_cfg), err2, TAG, "configure awb hardware failed");
@@ -155,7 +156,6 @@ esp_err_t esp_isp_awb_controller_enable(isp_awb_ctlr_t awb_ctlr)
ESP_ERR_INVALID_STATE, TAG, "controller not in init state");
esp_err_t ret = ESP_OK;
isp_ll_awb_clk_enable(awb_ctlr->isp_proc->hal.hw, true);
isp_ll_enable_intr(awb_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AWB_MASK, true);
return ret;
@@ -169,7 +169,6 @@ esp_err_t esp_isp_awb_controller_disable(isp_awb_ctlr_t awb_ctlr)
ESP_ERR_INVALID_STATE, TAG, "controller not in enable state");
isp_ll_enable_intr(awb_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_AWB_MASK, false);
isp_ll_awb_clk_enable(awb_ctlr->isp_proc->hal.hw, false);
esp_intr_disable(awb_ctlr->intr_handle);
return ESP_OK;

4
components/esp_driver_isp/src/isp_bf.c
View File

@@ -24,7 +24,6 @@ static const char *TAG = "ISP_BF";
esp_err_t esp_isp_bf_configure(isp_proc_handle_t proc, const esp_isp_bf_config_t *config)
{
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(proc->bf_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "bf is enabled already");
if (config) {
bool valid_padding_setting = (!config->padding_line_tail_valid_end_pixel && !config->padding_line_tail_valid_start_pixel) || (config->padding_line_tail_valid_end_pixel > config->padding_line_tail_valid_start_pixel);
@@ -39,6 +38,7 @@ esp_err_t esp_isp_bf_configure(isp_proc_handle_t proc, const esp_isp_bf_config_t
};
memcpy(bf_hal_cfg.bf_template, config->bf_template, ISP_BF_TEMPLATE_X_NUMS * ISP_BF_TEMPLATE_X_NUMS * sizeof(uint8_t));
isp_hal_bf_config(&(proc->hal), &bf_hal_cfg);
isp_ll_bf_set_clk_ctrl_mode(proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
} else {
isp_hal_bf_config(&(proc->hal), NULL);
}
@@ -51,7 +51,6 @@ esp_err_t esp_isp_bf_enable(isp_proc_handle_t proc)
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(proc->bf_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "bf is enabled already");
isp_ll_bf_clk_enable(proc->hal.hw, true);
isp_ll_bf_enable(proc->hal.hw, true);
proc->bf_fsm = ISP_FSM_ENABLE;
@@ -64,7 +63,6 @@ esp_err_t esp_isp_bf_disable(isp_proc_handle_t proc)
ESP_RETURN_ON_FALSE(proc->bf_fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "bf isn't enabled yet");
isp_ll_bf_enable(proc->hal.hw, false);
isp_ll_bf_clk_enable(proc->hal.hw, false);
proc->bf_fsm = ISP_FSM_INIT;
return ESP_OK;

3
components/esp_driver_isp/src/isp_ccm.c
View File

@@ -23,6 +23,7 @@ esp_err_t esp_isp_ccm_configure(isp_proc_handle_t proc, const esp_isp_ccm_config
bool ret = true;
portENTER_CRITICAL(&proc->spinlock);
isp_ll_ccm_set_clk_ctrl_mode(proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
ret = isp_hal_ccm_set_matrix(&proc->hal, ccm_cfg->saturation, ccm_cfg->matrix);
portEXIT_CRITICAL(&proc->spinlock);
ESP_RETURN_ON_FALSE(ret, ESP_ERR_INVALID_ARG, TAG, "invalid argument: ccm matrix contain NaN or out of range");
@@ -35,7 +36,6 @@ esp_err_t esp_isp_ccm_enable(isp_proc_handle_t proc)
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
portENTER_CRITICAL(&proc->spinlock);
isp_ll_ccm_clk_enable(proc->hal.hw, true);
isp_ll_ccm_enable(proc->hal.hw, true);
portEXIT_CRITICAL(&proc->spinlock);
@@ -48,7 +48,6 @@ esp_err_t esp_isp_ccm_disable(isp_proc_handle_t proc)
portENTER_CRITICAL(&proc->spinlock);
isp_ll_ccm_enable(proc->hal.hw, false);
isp_ll_ccm_clk_enable(proc->hal.hw, false);
portEXIT_CRITICAL(&proc->spinlock);
return ESP_OK;

3
components/esp_driver_isp/src/isp_color.c
View File

@@ -38,6 +38,7 @@ esp_err_t esp_isp_color_configure(isp_proc_handle_t proc, const esp_isp_color_co
.color_brightness = config->color_brightness,
};
isp_hal_color_config(&(proc->hal), &color_hal_cfg);
isp_ll_color_set_clk_ctrl_mode(proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
} else {
isp_hal_color_config(&(proc->hal), NULL);
}
@@ -50,7 +51,6 @@ esp_err_t esp_isp_color_enable(isp_proc_handle_t proc)
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(proc->color_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "color is enabled already");
isp_ll_color_clk_enable(proc->hal.hw, true);
isp_ll_color_enable(proc->hal.hw, true);
proc->color_fsm = ISP_FSM_ENABLE;
@@ -63,7 +63,6 @@ esp_err_t esp_isp_color_disable(isp_proc_handle_t proc)
ESP_RETURN_ON_FALSE(proc->color_fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "color isn't enabled yet");
isp_ll_color_enable(proc->hal.hw, false);
isp_ll_color_clk_enable(proc->hal.hw, false);
proc->color_fsm = ISP_FSM_INIT;
return ESP_OK;

3
components/esp_driver_isp/src/isp_hist.c
View File

@@ -94,6 +94,7 @@ static esp_err_t s_esp_isp_hist_config_hardware(isp_proc_handle_t isp_proc, cons
if (hist_cfg->hist_mode == ISP_HIST_SAMPLING_RGB) {
isp_ll_hist_set_rgb_coefficient(isp_proc->hal.hw, &hist_cfg->rgb_coefficient);
}
isp_ll_hist_set_clk_ctrl_mode(isp_proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
return ESP_OK;
}
@@ -158,7 +159,6 @@ esp_err_t esp_isp_hist_controller_enable(isp_hist_ctlr_t hist_ctlr)
ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&hist_ctlr->fsm, &expected_fsm, ISP_FSM_ENABLE),
ESP_ERR_INVALID_STATE, TAG, "controller not in init state");
isp_ll_hist_clk_enable(hist_ctlr->isp_proc->hal.hw, true);
isp_ll_enable_intr(hist_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_HIST_MASK, true);
return ESP_OK;
@@ -173,7 +173,6 @@ esp_err_t esp_isp_hist_controller_disable(isp_hist_ctlr_t hist_ctlr)
ESP_ERR_INVALID_STATE, TAG, "controller not in enable state");
isp_ll_enable_intr(hist_ctlr->isp_proc->hal.hw, ISP_LL_EVENT_HIST_MASK, false);
isp_ll_hist_clk_enable(hist_ctlr->isp_proc->hal.hw, false);
esp_intr_disable(hist_ctlr->intr_handle);
return ESP_OK;

3
components/esp_driver_isp/src/isp_lsc.c
View File

@@ -70,6 +70,7 @@ esp_err_t esp_isp_lsc_configure(isp_proc_handle_t isp_proc, const esp_isp_lsc_co
ESP_RETURN_ON_FALSE(num_grids_x <= num_grids_x_max && num_grids_y <= num_grids_y_max, ESP_ERR_INVALID_ARG, TAG, "invalid h_res or v_res");
ESP_RETURN_ON_FALSE(config->gain_array->gain_r && config->gain_array->gain_gr && config->gain_array->gain_gb && config->gain_array->gain_b, ESP_ERR_INVALID_ARG, TAG, "null pointer to gain arrays");
isp_ll_lsc_set_clk_ctrl_mode(isp_proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
isp_ll_lsc_set_xtablesize(isp_proc->hal.hw, num_grids_x);
for (int y = 0; y < num_grids_y; y++) {
@@ -90,7 +91,6 @@ esp_err_t esp_isp_lsc_enable(isp_proc_handle_t isp_proc)
ESP_RETURN_ON_FALSE(isp_proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(isp_proc->lsc_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "lsc is enabled already");
isp_ll_lsc_clk_enable(isp_proc->hal.hw, true);
isp_ll_lsc_enable(isp_proc->hal.hw, true);
isp_proc->lsc_fsm = ISP_FSM_ENABLE;
@@ -103,7 +103,6 @@ esp_err_t esp_isp_lsc_disable(isp_proc_handle_t isp_proc)
ESP_RETURN_ON_FALSE(isp_proc->lsc_fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "lsc isn't enabled yet");
isp_ll_lsc_enable(isp_proc->hal.hw, false);
isp_ll_lsc_clk_enable(isp_proc->hal.hw, false);
isp_proc->lsc_fsm = ISP_FSM_INIT;
return ESP_OK;

3
components/esp_driver_isp/src/isp_sharpen.c
View File

@@ -40,6 +40,7 @@ esp_err_t esp_isp_sharpen_configure(isp_proc_handle_t proc, const esp_isp_sharpe
};
memcpy(sharpen_hal_cfg.sharpen_template, config->sharpen_template, ISP_SHARPEN_TEMPLATE_X_NUMS * ISP_SHARPEN_TEMPLATE_X_NUMS * sizeof(uint8_t));
isp_hal_sharpen_config(&(proc->hal), &sharpen_hal_cfg);
isp_ll_sharp_set_clk_ctrl_mode(proc->hal.hw, ISP_LL_PIPELINE_CLK_CTRL_AUTO);
} else {
isp_hal_sharpen_config(&(proc->hal), NULL);
}
@@ -52,7 +53,6 @@ esp_err_t esp_isp_sharpen_enable(isp_proc_handle_t proc)
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
ESP_RETURN_ON_FALSE(proc->sharpen_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "sharpen is enabled already");
isp_ll_sharp_clk_enable(proc->hal.hw, true);
isp_ll_enable_intr(proc->hal.hw, ISP_LL_EVENT_SHARP_FRAME, true);
isp_ll_sharp_enable(proc->hal.hw, true);
proc->sharpen_fsm = ISP_FSM_ENABLE;
@@ -67,7 +67,6 @@ esp_err_t esp_isp_sharpen_disable(isp_proc_handle_t proc)
isp_ll_sharp_enable(proc->hal.hw, false);
isp_ll_enable_intr(proc->hal.hw, ISP_LL_EVENT_SHARP_FRAME, false);
isp_ll_sharp_clk_enable(proc->hal.hw, false);
proc->sharpen_fsm = ISP_FSM_INIT;
return ESP_OK;

106
components/hal/esp32p4/include/hal/isp_ll.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -167,6 +167,14 @@ typedef enum {
ISP_LL_LUT_DPC, ///< LUT for DPC
} isp_ll_lut_t;
/**
* @brief ISP pipeline clock control mode
*/
typedef enum {
ISP_LL_PIPELINE_CLK_CTRL_AUTO, ///< HW control, off when in frame interval
ISP_LL_PIPELINE_CLK_CTRL_ALWAYS_ON, ///< Always on
} isp_ll_pipeline_clk_ctrl_t;
/*---------------------------------------------------------------
Clock
@@ -495,14 +503,14 @@ static inline void isp_ll_set_bayer_mode(isp_dev_t *hw, color_raw_element_order_
AF
---------------------------------------------------------------*/
/**
* @brief Enable / Disable AF clock
* @brief Set AF clock control mode
*
* @param[in] hw
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_af_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_af_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_af_force_on = enable;
hw->clk_en.clk_af_force_on = mode;
}
/**
@@ -730,14 +738,14 @@ static inline void isp_ll_af_env_detector_set_ratio(isp_dev_t *hw, uint32_t rati
BF
---------------------------------------------------------------*/
/**
* @brief Enable / Disable BF clock
* @brief Set BF clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_bf_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_bf_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_bf_force_on = enable;
hw->clk_en.clk_bf_force_on = mode;
}
/**
@@ -832,14 +840,14 @@ static inline void isp_ll_bf_set_template(isp_dev_t *hw, uint8_t template_arr[SO
CCM
---------------------------------------------------------------*/
/**
* @brief Enable / Disable CCM clock
* @brief Set CCM clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_ccm_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_ccm_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_ccm_force_on = enable;
hw->clk_en.clk_ccm_force_on = mode;
}
/**
@@ -876,14 +884,14 @@ static inline void isp_ll_ccm_set_matrix(isp_dev_t *hw, isp_ll_ccm_gain_t fixed_
Color
---------------------------------------------------------------*/
/**
* @brief Enable / Disable Color clock
* @brief Set Color clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_color_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_color_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_color_force_on = enable;
hw->clk_en.clk_color_force_on = mode;
}
/**
@@ -1071,14 +1079,14 @@ static inline void isp_ll_cam_enable(isp_dev_t *hw, bool enable)
---------------------------------------------------------------*/
/**
* @brief Enable / Disable AE clock
* @brief Set AE clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_ae_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_ae_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_ae_force_on = enable;
hw->clk_en.clk_ae_force_on = mode;
}
/**
@@ -1185,14 +1193,14 @@ static inline void isp_ll_ae_env_detector_set_period(isp_dev_t *hw, uint32_t per
LSC
---------------------------------------------------------------*/
/**
* @brief Enable / Disable LSC clock
* @brief Set LSC clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_lsc_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_lsc_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_lsc_force_on = enable;
hw->clk_en.clk_lsc_force_on = mode;
}
/**
@@ -1337,14 +1345,14 @@ static inline void isp_ll_clear_intr(isp_dev_t *hw, uint32_t mask)
AWB
---------------------------------------------------------------*/
/**
* @brief Enable / Disable AWB clock
* @brief Set AWB clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_awb_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_awb_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_awb_force_on = enable;
hw->clk_en.clk_awb_force_on = mode;
}
/**
@@ -1495,14 +1503,14 @@ static inline uint32_t isp_ll_awb_get_accumulated_b_value(isp_dev_t *hw)
Demosaic
---------------------------------------------------------------*/
/**
* @brief Enable / Disable demosaic clock
* @brief Set demosaic clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_demosaic_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_demosaic_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_demosaic_force_on = enable;
hw->clk_en.clk_demosaic_force_on = mode;
}
/**
@@ -1580,14 +1588,14 @@ static inline void isp_ll_demosaic_set_padding_line_tail_valid_end_pixel(isp_dev
Sharpen
---------------------------------------------------------------*/
/**
* @brief Enable / Disable sharpen clock
* @brief Set sharpen clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_sharp_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_sharp_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_sharp_force_on = enable;
hw->clk_en.clk_sharp_force_on = mode;
}
/**
@@ -1740,25 +1748,25 @@ static inline uint8_t isp_ll_sharp_get_high_freq_pixel_max(isp_dev_t *hw)
RGB/YUV
---------------------------------------------------------------*/
/**
* @brief Enable / Disable rgb2yuv clock
* @brief Set rgb2yuv clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable 0: hw control; 1: always on
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_rgb2yuv_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_rgb2yuv_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_rgb2yuv_force_on = enable;
hw->clk_en.clk_rgb2yuv_force_on = mode;
}
/**
* @brief Enable / Disable yuv2rgb clock
* @brief Set yuv2rgb clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable 0: hw control; 1: always on
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_yuv2rgb_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_yuv2rgb_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_yuv2rgb_force_on = enable;
hw->clk_en.clk_yuv2rgb_force_on = mode;
}
/**
@@ -1868,14 +1876,14 @@ static inline void isp_ll_gamma_set_correction_curve(isp_dev_t *hw, color_compon
HIST
---------------------------------------------------------------*/
/**
* @brief enable histogram clock
* @brief Set histogram clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] enable true: enable the clock. false: disable the clock
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_hist_clk_enable(isp_dev_t *hw, bool enable)
static inline void isp_ll_hist_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_hist_force_on = enable;
hw->clk_en.clk_hist_force_on = mode;
}
/**