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Merge branch 'fix/fix_bad_submode_setting_in_rtc_slow_selection' into 'master'

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fix(esp_hw_support): fix bad submode setting in rtc slow selection

Closes IDFGH-13745

See merge request espressif/esp-idf!33754
This commit is contained in:
Wu Zheng Hui
2024-09-24 20:03:03 +08:00
parent 4fcc8674c9 5971155ac4
commit 49d080e354
6 changed files with 27 additions and 6 deletions
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2
components/esp_hw_support/port/esp32/rtc_clk.c
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@@ -279,7 +279,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
} }
#endif #endif

2
components/esp_hw_support/port/esp32c2/rtc_clk.c
View File

@@ -72,7 +72,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
} }
#endif #endif

2
components/esp_hw_support/port/esp32c3/rtc_clk.c
View File

@@ -105,7 +105,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
} }
#endif #endif

2
components/esp_hw_support/port/esp32s2/rtc_clk.c
View File

@@ -180,7 +180,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
} }
#endif #endif

2
components/esp_hw_support/port/esp32s3/rtc_clk.c
View File

@@ -120,7 +120,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
} }
#endif #endif

23
components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -24,6 +24,7 @@
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#include "esp_rom_uart.h" #include "esp_rom_uart.h"
#include "test_utils.h" #include "test_utils.h"
#include "esp_random.h"
#include "esp_sleep.h" #include "esp_sleep.h"
#include "esp_system.h" #include "esp_system.h"
#include "esp_private/esp_clk.h" #include "esp_private/esp_clk.h"
@@ -119,6 +120,26 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]")
#endif #endif
} }
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
TEST_CASE("Test RTC_SLOW_CLK sources switching", "[rtc_clk]")
{
soc_rtc_slow_clk_src_t clk_src_before_switch = rtc_clk_slow_src_get();
soc_rtc_slow_clk_src_t switching_sources[] = {SOC_RTC_SLOW_CLK_SRC_RC_SLOW, SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256};
for (uint32_t test_cnt = 0; test_cnt < 100; test_cnt++) {
uint32_t src_id = esp_random() % 2;
if (switching_sources[src_id] == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
rtc_clk_8m_enable(true, true);
}
rtc_clk_slow_src_set(switching_sources[src_id]);
esp_rom_delay_us(10*1000);
TEST_ASSERT_EQUAL(switching_sources[src_id], rtc_clk_slow_src_get());
}
rtc_clk_slow_src_set(clk_src_before_switch);
printf("done\n");
}
#endif
/* The following two are not unit tests, but are added here to make it easy to /* The following two are not unit tests, but are added here to make it easy to
* check the frequency of 150k/32k oscillators. The following two "tests" will * check the frequency of 150k/32k oscillators. The following two "tests" will
* output either 32k or 150k clock to GPIO25. * output either 32k or 150k clock to GPIO25.