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Merge branch 'feat/put_bt_interface_code_to_rom_v5.3' into 'release/v5.3'

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Feat/put bt interface code to rom (v5.3)

See merge request espressif/esp-idf!31549
This commit is contained in:
Jiang Jiang Jian
2024-06-25 13:57:29 +08:00
parent e7b6fb75d4 f7baa7feb2
commit 4cfea9e864
28 changed files with 215 additions and 777 deletions
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7
components/bt/CMakeLists.txt
View File

@@ -575,7 +575,7 @@ if(CONFIG_BT_ENABLED)
if(CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
list(APPEND srcs
"porting/npl/freertos/src/npl_os_freertos.c"
"porting/nimble/src/os_msys_init.c"
"porting/mem/os_msys_init.c"
)
if(CONFIG_BT_CONTROLLER_DISABLED)
@@ -585,7 +585,6 @@ if(CONFIG_BT_ENABLED)
endif()
list(APPEND include_dirs
porting/include
porting/nimble/include
porting/npl/freertos/include
porting/transport/include
)
@@ -727,7 +726,6 @@ if(CONFIG_BT_ENABLED)
"host/nimble/port/src/nvs_port.c"
)
list(APPEND include_dirs
porting/include
host/nimble/nimble/porting/nimble/include
host/nimble/port/include
host/nimble/nimble/nimble/transport/include
@@ -756,9 +754,8 @@ if(CONFIG_BT_ENABLED)
endif()
list(APPEND include_dirs
porting/include
host/nimble/nimble/porting/npl/freertos/include
host/nimble/nimble/porting/nimble/include
host/nimble/nimble/nimble/include
)
endif()

5
components/bt/controller/esp32c2/bt.c
View File

@@ -16,7 +16,10 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#ifdef ESP_PLATFORM
@@ -28,7 +31,7 @@
#endif
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"

82
components/bt/controller/esp32c5/bt.c
View File

@@ -15,7 +15,9 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#include "esp_private/esp_modem_clock.h"
@@ -28,7 +30,7 @@
#endif // CONFIG_SW_COEXIST_ENABLE
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"
@@ -121,7 +123,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@@ -129,12 +131,12 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
@@ -149,15 +151,17 @@ extern void os_msys_deinit(void);
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@@ -723,7 +727,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@@ -780,13 +784,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
coex_init();
#endif // CONFIG_SW_COEXIST_ENABLE
ret = ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -804,11 +801,23 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
goto controller_init_err;
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
esp_ble_change_rtc_freq(slow_clk_freq);
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@@ -825,7 +834,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@@ -835,13 +844,13 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
controller_init_err:
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
os_msys_deinit();
ble_controller_deinit();
modem_deint:
esp_phy_modem_deinit();
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
@@ -872,10 +881,11 @@ esp_err_t esp_bt_controller_deinit(void)
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
ble_controller_deinit();
#if CONFIG_BT_NIMBLE_ENABLED
/* De-initialize default event queue */
@@ -920,7 +930,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@@ -948,7 +958,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@@ -1082,7 +1092,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1095,7 +1105,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1115,13 +1125,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1141,7 +1151,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@@ -1152,7 +1162,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@@ -1174,11 +1184,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

73
components/bt/controller/esp32c6/bt.c
View File

@@ -15,7 +15,9 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#include "esp_private/esp_modem_clock.h"
@@ -28,7 +30,7 @@
#endif // CONFIG_ESP_COEX_ENABLED
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"
@@ -123,7 +125,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@@ -131,12 +133,12 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
@@ -149,17 +151,19 @@ extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@@ -551,7 +555,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{
esp_ble_set_wakeup_overhead(overhead);
r_esp_ble_set_wakeup_overhead(overhead);
}
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
@@ -577,6 +581,9 @@ esp_err_t controller_sleep_init(void)
goto error;
}
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
#if CONFIG_BT_LE_SLEEP_ENABLE && !CONFIG_MAC_BB_PD
#error "CONFIG_MAC_BB_PD required for BLE light sleep to run properly"
#endif // CONFIG_BT_LE_SLEEP_ENABLE && !CONFIG_MAC_BB_PD
/* Create a new regdma link for BLE related register restoration */
rc = sleep_modem_ble_mac_modem_state_init(1);
assert(rc == 0);
@@ -744,7 +751,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@@ -821,14 +828,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = ble_controller_init(cfg);
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
esp_ble_change_rtc_freq(slow_clk_freq);
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@@ -845,7 +858,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@@ -856,8 +869,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
ble_controller_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -891,7 +905,8 @@ esp_err_t esp_bt_controller_deinit(void)
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
ble_controller_deinit();
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -939,7 +954,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@@ -967,7 +982,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@@ -1101,7 +1116,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1114,7 +1129,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1134,13 +1149,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1160,7 +1175,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@@ -1171,7 +1186,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@@ -1193,11 +1208,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

89
components/bt/controller/esp32h2/bt.c
View File

@@ -15,7 +15,9 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#include "esp_private/esp_modem_clock.h"
@@ -28,7 +30,7 @@
#endif // CONFIG_ESP_COEX_ENABLED
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"
@@ -59,8 +61,8 @@
************************************************************************
*/
#define NIMBLE_PORT_LOG_TAG "BLE_INIT"
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define EXT_FUNC_VERSION 0x20221122
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
@@ -115,7 +117,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@@ -123,35 +125,37 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@@ -538,9 +542,10 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{
esp_ble_set_wakeup_overhead(overhead);
r_esp_ble_set_wakeup_overhead(overhead);
}
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
esp_err_t controller_sleep_init(void)
{
@@ -716,7 +721,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@@ -730,10 +735,10 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
*/
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED
/* Enable BT-related clocks */
modem_clock_module_enable(PERIPH_BT_MODULE);
modem_clock_module_mac_reset(PERIPH_BT_MODULE);
/* Select slow clock source for BT momdule */
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
slow_clk_freq = 100000;
@@ -771,6 +776,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -791,16 +797,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = ble_controller_init(cfg);
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
esp_ble_change_rtc_freq(slow_clk_freq);
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@@ -815,10 +825,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
goto free_controller;
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@@ -829,8 +838,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
ble_controller_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -862,7 +872,8 @@ esp_err_t esp_bt_controller_deinit(void)
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
ble_controller_deinit();
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -910,7 +921,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@@ -938,7 +949,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@@ -1072,7 +1083,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1085,7 +1096,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1105,13 +1116,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1131,7 +1142,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@@ -1142,7 +1153,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@@ -1164,11 +1175,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

2
components/bt/controller/lib_esp32c2/esp32c2-bt-lib

Submodule components/bt/controller/lib_esp32c2/esp32c2-bt-lib updated: 3878fc3d68...8ddd8acac4

2
components/bt/controller/lib_esp32c5/esp32c5-bt-lib

Submodule components/bt/controller/lib_esp32c5/esp32c5-bt-lib updated: 45dda7a690...3996803d35

2
components/bt/controller/lib_esp32c6/esp32c6-bt-lib

Submodule components/bt/controller/lib_esp32c6/esp32c6-bt-lib updated: 405de68173...c2b9d7c8c2

2
components/bt/controller/lib_esp32h2/esp32h2-bt-lib

Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: 586a227264...c2c9f4161f

2
components/bt/host/bluedroid/hci/hci_hal_h4.c
View File

@@ -36,7 +36,7 @@
#include "stack/hcimsgs.h"
#if ((BT_CONTROLLER_INCLUDED == TRUE) && SOC_ESP_NIMBLE_CONTROLLER)
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#endif
#if (C2H_FLOW_CONTROL_INCLUDED == TRUE)

17
components/bt/porting/nimble/include/nimble/ble_hci_trans.h → components/bt/porting/include/ble_hci_trans.h
View File

@@ -1,20 +1,7 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef H_HCI_TRANSPORT_

0
components/bt/porting/mem/bt_osi_mem.h → components/bt/porting/include/bt_osi_mem.h
View File

0
components/bt/porting/nimble/include/os/endian.h → components/bt/porting/include/os/endian.h
View File

0
components/bt/porting/nimble/include/os/os.h → components/bt/porting/include/os/os.h
View File

0
components/bt/porting/nimble/include/os/os_error.h → components/bt/porting/include/os/os_error.h
View File

4
components/bt/porting/nimble/include/os/os_mbuf.h → components/bt/porting/include/os/os_mbuf.h
View File

@@ -65,7 +65,7 @@ struct os_mbuf_pool {
/**
* A packet header structure that preceeds the mbuf packet headers.
* A packet header structure that proceeds the mbuf packet headers.
*/
struct os_mbuf_pkthdr {
/**
@@ -89,7 +89,7 @@ struct os_mbuf {
*/
uint8_t *om_data;
/**
* Flags associated with this buffer, see OS_MBUF_F_* defintions
* Flags associated with this buffer, see OS_MBUF_F_* definitions
*/
uint8_t om_flags;
/**

0
components/bt/porting/nimble/include/os/os_mempool.h → components/bt/porting/include/os/os_mempool.h
View File

46
components/bt/porting/nimble/include/os/queue.h → components/bt/porting/include/os/queue.h
View File

@@ -1,33 +1,27 @@
/*
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
* SPDX-FileCopyrightText: 2015-2022 The Apache Software Foundation (ASF)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* SPDX-License-Identifier: Apache-2.0
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* SPDX-FileContributor: 2019-2022 Espressif Systems (Shanghai) CO LTD
*/
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* @(#)queue.h 8.5 (Berkeley) 8/20/94
* $FreeBSD: src/sys/sys/queue.h,v 1.32.2.7 2002/04/17 14:21:02 des Exp $
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef _QUEUE_H_

0
components/bt/porting/nimble/include/os/util.h → components/bt/porting/include/os/util.h
View File

8
components/bt/porting/nimble/src/os_msys_init.c → components/bt/porting/mem/os_msys_init.c
View File

@@ -82,12 +82,12 @@ static struct os_mempool os_msys_init_2_mempool;
#endif
#if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
extern int esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
extern void esp_ble_msys_deinit(void);
extern int r_esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
extern void r_esp_ble_msys_deinit(void);
int os_msys_init(void)
{
return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
return r_esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
SYSINIT_MSYS_2_MEMBLOCK_SIZE,
OS_MSYS_1_BLOCK_COUNT,
OS_MSYS_2_BLOCK_COUNT,
@@ -96,7 +96,7 @@ int os_msys_init(void)
void os_msys_deinit(void)
{
esp_ble_msys_deinit();
r_esp_ble_msys_deinit();
}
#else // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER

319
components/bt/porting/nimble/include/nimble/ble.h
View File

@@ -1,319 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 The Apache Software Foundation (ASF)
*
* SPDX-License-Identifier: Apache-2.0
*
* SPDX-FileContributor: 2019-2022 Espressif Systems (Shanghai) CO LTD
*/
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef H_BLE_
#define H_BLE_
#include <inttypes.h>
#include <string.h>
#include "syscfg/syscfg.h"
#include "os/os.h"
#ifdef __cplusplus
extern "C" {
#endif
/* The number of advertising instances */
#define BLE_ADV_INSTANCES (MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES) + 1)
/* BLE encryption block definitions */
#define BLE_ENC_BLOCK_SIZE (16)
/* 4 byte header + 251 byte payload. */
#define BLE_ACL_MAX_PKT_SIZE 255
struct ble_encryption_block
{
uint8_t key[BLE_ENC_BLOCK_SIZE];
uint8_t plain_text[BLE_ENC_BLOCK_SIZE];
uint8_t cipher_text[BLE_ENC_BLOCK_SIZE];
};
/*
* BLE MBUF structure:
*
* The BLE mbuf structure is as follows. Note that this structure applies to
* the packet header mbuf (not mbufs that are part of a "packet chain"):
* struct os_mbuf (16)
* struct os_mbuf_pkthdr (8)
* struct ble_mbuf_hdr (8)
* Data buffer (payload size, in bytes)
*
* The BLE mbuf header contains the following:
* flags: bitfield with the following values
* 0x01: Set if there was a match on the whitelist
* 0x02: Set if a connect request was transmitted upon receiving pdu
* 0x04: Set the first time we transmit the PDU (used to detect retry).
* channel: The logical BLE channel PHY channel # (0 - 39)
* crcok: flag denoting CRC check passed (1) or failed (0).
* rssi: RSSI, in dBm.
*/
struct ble_mbuf_hdr_rxinfo
{
uint16_t flags;
uint8_t channel;
uint8_t handle;
int8_t rssi;
/* XXX: we could just use single phy_mode field */
int8_t phy;
uint8_t phy_mode;
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LL_PRIVACY)
int8_t rpa_index;
#endif
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LL_EXT_ADV)
void *user_data;
#endif
};
/*
* Flag definitions for rxinfo
*
* Note: it's ok to have symbols with the same values as long as they cannot be
* set for the same PDU (e.g. one use by scanner, other one used by
* connection)
*/
#define BLE_MBUF_HDR_F_CONN_CREDIT (0x8000)
#define BLE_MBUF_HDR_F_IGNORED (0x8000)
#define BLE_MBUF_HDR_F_SCAN_REQ_TXD (0x4000)
#define BLE_MBUF_HDR_F_INITA_RESOLVED (0x2000)
#define BLE_MBUF_HDR_F_TARGETA_RESOLVED (0x2000)
#define BLE_MBUF_HDR_F_EXT_ADV_SEC (0x1000)
#define BLE_MBUF_HDR_F_EXT_ADV (0x0800)
#define BLE_MBUF_HDR_F_RESOLVED (0x0400)
#define BLE_MBUF_HDR_F_AUX_PTR_WAIT (0x0200)
#define BLE_MBUF_HDR_F_AUX_INVALID (0x0100)
#define BLE_MBUF_HDR_F_CRC_OK (0x0080)
#define BLE_MBUF_HDR_F_DEVMATCH (0x0040)
#define BLE_MBUF_HDR_F_MIC_FAILURE (0x0020)
#define BLE_MBUF_HDR_F_SCAN_RSP_TXD (0x0010)
#define BLE_MBUF_HDR_F_SCAN_RSP_RXD (0x0008)
#define BLE_MBUF_HDR_F_RXSTATE_MASK (0x0007)
/* Transmit info. NOTE: no flags defined */
struct ble_mbuf_hdr_txinfo
{
uint8_t flags;
uint8_t reserve0;
uint8_t pyld_len;
uint8_t hdr_byte;
uint16_t offset;
};
struct ble_mbuf_hdr
{
union {
struct ble_mbuf_hdr_rxinfo rxinfo;
struct ble_mbuf_hdr_txinfo txinfo;
};
uint32_t beg_cputime;
uint32_t rem_usecs;
};
#define BLE_MBUF_HDR_IGNORED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_IGNORED))
#define BLE_MBUF_HDR_SCAN_REQ_TXD(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_SCAN_REQ_TXD))
#define BLE_MBUF_HDR_EXT_ADV_SEC(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_EXT_ADV_SEC))
#define BLE_MBUF_HDR_EXT_ADV(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_EXT_ADV))
#define BLE_MBUF_HDR_DEVMATCH(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_DEVMATCH))
#define BLE_MBUF_HDR_SCAN_RSP_RXD(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_SCAN_RSP_RXD))
#define BLE_MBUF_HDR_AUX_INVALID(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_AUX_INVALID))
#define BLE_MBUF_HDR_WAIT_AUX(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_AUX_PTR_WAIT))
#define BLE_MBUF_HDR_CRC_OK(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_CRC_OK))
#define BLE_MBUF_HDR_MIC_FAILURE(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_MIC_FAILURE))
#define BLE_MBUF_HDR_RESOLVED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_RESOLVED))
#define BLE_MBUF_HDR_INITA_RESOLVED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_INITA_RESOLVED))
#define BLE_MBUF_HDR_TARGETA_RESOLVED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_TARGETA_RESOLVED))
#define BLE_MBUF_HDR_RX_STATE(hdr) \
((uint8_t)((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_RXSTATE_MASK))
#define BLE_MBUF_HDR_PTR(om) \
(struct ble_mbuf_hdr *)((uint8_t *)om + sizeof(struct os_mbuf) + \
sizeof(struct os_mbuf_pkthdr))
/* BLE mbuf overhead per packet header mbuf */
#define BLE_MBUF_PKTHDR_OVERHEAD \
(sizeof(struct os_mbuf_pkthdr) + sizeof(struct ble_mbuf_hdr))
#define BLE_MBUF_MEMBLOCK_OVERHEAD \
(sizeof(struct os_mbuf) + BLE_MBUF_PKTHDR_OVERHEAD)
/* Length of host user header. Only contains the peer's connection handle. */
#define BLE_MBUF_HS_HDR_LEN (2)
#define BLE_DEV_ADDR_LEN (6)
extern uint8_t g_dev_addr[BLE_DEV_ADDR_LEN];
extern uint8_t g_random_addr[BLE_DEV_ADDR_LEN];
/* BLE Error Codes (Core v4.2 Vol 2 part D) */
enum ble_error_codes
{
/* An "error" code of 0x0 means success */
BLE_ERR_SUCCESS = 0x00,
BLE_ERR_UNKNOWN_HCI_CMD = 0x01,
BLE_ERR_UNK_CONN_ID = 0x02,
BLE_ERR_HW_FAIL = 0x03,
BLE_ERR_PAGE_TMO = 0x04,
BLE_ERR_AUTH_FAIL = 0x05,
BLE_ERR_PINKEY_MISSING = 0x06,
BLE_ERR_MEM_CAPACITY = 0x07,
BLE_ERR_CONN_SPVN_TMO = 0x08,
BLE_ERR_CONN_LIMIT = 0x09,
BLE_ERR_SYNCH_CONN_LIMIT = 0x0a,
BLE_ERR_ACL_CONN_EXISTS = 0x0b,
BLE_ERR_CMD_DISALLOWED = 0x0c,
BLE_ERR_CONN_REJ_RESOURCES = 0x0d,
BLE_ERR_CONN_REJ_SECURITY = 0x0e,
BLE_ERR_CONN_REJ_BD_ADDR = 0x0f,
BLE_ERR_CONN_ACCEPT_TMO = 0x10,
BLE_ERR_UNSUPPORTED = 0x11,
BLE_ERR_INV_HCI_CMD_PARMS = 0x12,
BLE_ERR_REM_USER_CONN_TERM = 0x13,
BLE_ERR_RD_CONN_TERM_RESRCS = 0x14,
BLE_ERR_RD_CONN_TERM_PWROFF = 0x15,
BLE_ERR_CONN_TERM_LOCAL = 0x16,
BLE_ERR_REPEATED_ATTEMPTS = 0x17,
BLE_ERR_NO_PAIRING = 0x18,
BLE_ERR_UNK_LMP = 0x19,
BLE_ERR_UNSUPP_REM_FEATURE = 0x1a,
BLE_ERR_SCO_OFFSET = 0x1b,
BLE_ERR_SCO_ITVL = 0x1c,
BLE_ERR_SCO_AIR_MODE = 0x1d,
BLE_ERR_INV_LMP_LL_PARM = 0x1e,
BLE_ERR_UNSPECIFIED = 0x1f,
BLE_ERR_UNSUPP_LMP_LL_PARM = 0x20,
BLE_ERR_NO_ROLE_CHANGE = 0x21,
BLE_ERR_LMP_LL_RSP_TMO = 0x22,
BLE_ERR_LMP_COLLISION = 0x23,
BLE_ERR_LMP_PDU = 0x24,
BLE_ERR_ENCRYPTION_MODE = 0x25,
BLE_ERR_LINK_KEY_CHANGE = 0x26,
BLE_ERR_UNSUPP_QOS = 0x27,
BLE_ERR_INSTANT_PASSED = 0x28,
BLE_ERR_UNIT_KEY_PAIRING = 0x29,
BLE_ERR_DIFF_TRANS_COLL = 0x2a,
/* BLE_ERR_RESERVED = 0x2b */
BLE_ERR_QOS_PARM = 0x2c,
BLE_ERR_QOS_REJECTED = 0x2d,
BLE_ERR_CHAN_CLASS = 0x2e,
BLE_ERR_INSUFFICIENT_SEC = 0x2f,
BLE_ERR_PARM_OUT_OF_RANGE = 0x30,
/* BLE_ERR_RESERVED = 0x31 */
BLE_ERR_PENDING_ROLE_SW = 0x32,
/* BLE_ERR_RESERVED = 0x33 */
BLE_ERR_RESERVED_SLOT = 0x34,
BLE_ERR_ROLE_SW_FAIL = 0x35,
BLE_ERR_INQ_RSP_TOO_BIG = 0x36,
BLE_ERR_SEC_SIMPLE_PAIR = 0x37,
BLE_ERR_HOST_BUSY_PAIR = 0x38,
BLE_ERR_CONN_REJ_CHANNEL = 0x39,
BLE_ERR_CTLR_BUSY = 0x3a,
BLE_ERR_CONN_PARMS = 0x3b,
BLE_ERR_DIR_ADV_TMO = 0x3c,
BLE_ERR_CONN_TERM_MIC = 0x3d,
BLE_ERR_CONN_ESTABLISHMENT = 0x3e,
BLE_ERR_MAC_CONN_FAIL = 0x3f,
BLE_ERR_COARSE_CLK_ADJ = 0x40,
BLE_ERR_TYPE0_SUBMAP_NDEF = 0x41,
BLE_ERR_UNK_ADV_INDENT = 0x42,
BLE_ERR_LIMIT_REACHED = 0x43,
BLE_ERR_OPERATION_CANCELLED = 0x44,
BLE_ERR_PACKET_TOO_LONG = 0x45,
BLE_ERR_MAX = 0xff
};
/* HW error codes */
#define BLE_HW_ERR_DO_NOT_USE (0) /* XXX: reserve this one for now */
#define BLE_HW_ERR_HCI_SYNC_LOSS (1)
/* Own Bluetooth Device address type */
#define BLE_OWN_ADDR_PUBLIC (0x00)
#define BLE_OWN_ADDR_RANDOM (0x01)
#define BLE_OWN_ADDR_RPA_PUBLIC_DEFAULT (0x02)
#define BLE_OWN_ADDR_RPA_RANDOM_DEFAULT (0x03)
/* Bluetooth Device address type */
#define BLE_ADDR_PUBLIC (0x00)
#define BLE_ADDR_RANDOM (0x01)
#define BLE_ADDR_PUBLIC_ID (0x02)
#define BLE_ADDR_RANDOM_ID (0x03)
#define BLE_ADDR_ANY (&(ble_addr_t) { 0, {0, 0, 0, 0, 0, 0} })
#define BLE_ADDR_IS_RPA(addr) (((addr)->type == BLE_ADDR_RANDOM) && \
((addr)->val[5] & 0xc0) == 0x40)
#define BLE_ADDR_IS_NRPA(addr) (((addr)->type == BLE_ADDR_RANDOM) && \
((addr)->val[5] & 0xc0) == 0x00)
#define BLE_ADDR_IS_STATIC(addr) (((addr)->type == BLE_ADDR_RANDOM) && \
((addr)->val[5] & 0xc0) == 0xc0)
typedef struct {
uint8_t type;
uint8_t val[6];
} ble_addr_t;
static inline int ble_addr_cmp(const ble_addr_t *a, const ble_addr_t *b)
{
int type_diff;
type_diff = a->type - b->type;
if (type_diff != 0) {
return type_diff;
}
return memcmp(a->val, b->val, sizeof(a->val));
}
#ifdef __cplusplus
}
#endif
#endif /* H_BLE_ */

34
components/bt/porting/nimble/include/nimble/nimble_opt.h
View File

@@ -1,34 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef H_NIMBLE_OPT_
#define H_NIMBLE_OPT_
#ifdef __cplusplus
extern "C" {
#endif
/* Include automatically-generated settings. */
#include "nimble/nimble_opt_auto.h"
#ifdef __cplusplus
}
#endif
#endif

132
components/bt/porting/nimble/include/nimble/nimble_opt_auto.h
View File

@@ -1,132 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 The Apache Software Foundation (ASF)
*
* SPDX-License-Identifier: Apache-2.0
*
* SPDX-FileContributor: 2019-2022 Espressif Systems (Shanghai) CO LTD
*/
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef H_NIMBLE_OPT_AUTO_
#define H_NIMBLE_OPT_AUTO_
#include "syscfg/syscfg.h"
#ifdef __cplusplus
extern "C" {
#endif
/***
* Automatic options.
*
* These settings are generated automatically from the user-specified syscfg
* settings.
*/
#undef NIMBLE_BLE_ADVERTISE
#define NIMBLE_BLE_ADVERTISE \
(MYNEWT_VAL(BLE_ROLE_BROADCASTER) || MYNEWT_VAL(BLE_ROLE_PERIPHERAL))
#undef NIMBLE_BLE_SCAN
#define NIMBLE_BLE_SCAN \
(MYNEWT_VAL(BLE_ROLE_CENTRAL) || MYNEWT_VAL(BLE_ROLE_OBSERVER))
#undef NIMBLE_BLE_CONNECT
#define NIMBLE_BLE_CONNECT \
(MYNEWT_VAL(BLE_ROLE_CENTRAL) || MYNEWT_VAL(BLE_ROLE_PERIPHERAL))
/** Supported client ATT commands. */
#undef NIMBLE_BLE_ATT_CLT_FIND_INFO
#define NIMBLE_BLE_ATT_CLT_FIND_INFO \
(MYNEWT_VAL(BLE_GATT_DISC_ALL_DSCS))
#undef NIMBLE_BLE_ATT_CLT_FIND_TYPE
#define NIMBLE_BLE_ATT_CLT_FIND_TYPE \
(MYNEWT_VAL(BLE_GATT_DISC_SVC_UUID))
#undef NIMBLE_BLE_ATT_CLT_READ_TYPE
#define NIMBLE_BLE_ATT_CLT_READ_TYPE \
(MYNEWT_VAL(BLE_GATT_FIND_INC_SVCS) || \
MYNEWT_VAL(BLE_GATT_DISC_ALL_CHRS) || \
MYNEWT_VAL(BLE_GATT_DISC_CHRS_UUID) || \
MYNEWT_VAL(BLE_GATT_READ_UUID))
#undef NIMBLE_BLE_ATT_CLT_READ
#define NIMBLE_BLE_ATT_CLT_READ \
(MYNEWT_VAL(BLE_GATT_READ) || \
MYNEWT_VAL(BLE_GATT_READ_LONG) || \
MYNEWT_VAL(BLE_GATT_FIND_INC_SVCS))
#undef NIMBLE_BLE_ATT_CLT_READ_BLOB
#define NIMBLE_BLE_ATT_CLT_READ_BLOB \
(MYNEWT_VAL(BLE_GATT_READ_LONG))
#undef NIMBLE_BLE_ATT_CLT_READ_MULT
#define NIMBLE_BLE_ATT_CLT_READ_MULT \
(MYNEWT_VAL(BLE_GATT_READ_MULT))
#undef NIMBLE_BLE_ATT_CLT_READ_MULT_VAR
#define NIMBLE_BLE_ATT_CLT_READ_MULT_VAR \
(MYNEWT_VAL(BLE_GATT_READ_MULT_VAR))
#undef NIMBLE_BLE_ATT_CLT_READ_GROUP_TYPE
#define NIMBLE_BLE_ATT_CLT_READ_GROUP_TYPE \
(MYNEWT_VAL(BLE_GATT_DISC_ALL_SVCS))
#undef NIMBLE_BLE_ATT_CLT_WRITE
#define NIMBLE_BLE_ATT_CLT_WRITE \
(MYNEWT_VAL(BLE_GATT_WRITE))
#undef NIMBLE_BLE_ATT_CLT_SIGNED_WRITE
#define NIMBLE_BLE_ATT_CLT_SIGNED_WRITE \
(MYNEWT_VAL(BLE_GATT_SIGNED_WRITE))
#undef NIMBLE_BLE_ATT_CLT_WRITE_NO_RSP
#define NIMBLE_BLE_ATT_CLT_WRITE_NO_RSP \
(MYNEWT_VAL(BLE_GATT_WRITE_NO_RSP))
#undef NIMBLE_BLE_ATT_CLT_PREP_WRITE
#define NIMBLE_BLE_ATT_CLT_PREP_WRITE \
(MYNEWT_VAL(BLE_GATT_WRITE_LONG))
#undef NIMBLE_BLE_ATT_CLT_EXEC_WRITE
#define NIMBLE_BLE_ATT_CLT_EXEC_WRITE \
(MYNEWT_VAL(BLE_GATT_WRITE_LONG))
#undef NIMBLE_BLE_ATT_CLT_NOTIFY
#define NIMBLE_BLE_ATT_CLT_NOTIFY \
(MYNEWT_VAL(BLE_GATT_NOTIFY))
#undef NIMBLE_BLE_ATT_CLT_INDICATE
#define NIMBLE_BLE_ATT_CLT_INDICATE \
(MYNEWT_VAL(BLE_GATT_INDICATE))
/** Security manager settings. */
#undef NIMBLE_BLE_SM
#define NIMBLE_BLE_SM (MYNEWT_VAL(BLE_SM_LEGACY) || MYNEWT_VAL(BLE_SM_SC))
#ifdef __cplusplus
}
#endif
#endif

79
components/bt/porting/nimble/include/nimble/nimble_port.h
View File

@@ -1,79 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef _NIMBLE_PORT_H
#define _NIMBLE_PORT_H
#include "sdkconfig.h"
#include "esp_err.h"
#include "nimble/nimble_npl.h"
#define NIMBLE_CORE (CONFIG_BT_NIMBLE_PINNED_TO_CORE < CONFIG_FREERTOS_NUMBER_OF_CORES ? CONFIG_BT_NIMBLE_PINNED_TO_CORE : tskNO_AFFINITY)
#define NIMBLE_HS_STACK_SIZE CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE
#if SOC_ESP_NIMBLE_CONTROLLER && CONFIG_BT_CONTROLLER_ENABLED
#define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief nimble_port_init - Initialize controller and NimBLE host stack
*
* @return esp_err_t - ESP_OK ( if success)
* Error code in case of failure
*/
esp_err_t nimble_port_init(void);
/**
* @brief nimble_port_deinit - Deinitialize controller and NimBLE host stack
*
* @return esp_err_t - ESP_OK ( if success)
* Error code in case of failure
*/
esp_err_t nimble_port_deinit(void);
void nimble_port_run(void);
int nimble_port_stop(void);
/**
* @brief esp_nimble_init - Initialize the NimBLE host stack
*
* @return esp_err_t
*/
esp_err_t esp_nimble_init(void);
/**
* @brief esp_nimble_deinit - Deinitialize the NimBLE host stack
*
* @return esp_err_t
*/
esp_err_t esp_nimble_deinit(void);
struct ble_npl_eventq *nimble_port_get_dflt_eventq(void);
#ifdef __cplusplus
}
#endif
#endif /* _NIMBLE_PORT_H */

17
components/bt/porting/nimble/include/nimble/nimble_npl.h → components/bt/porting/npl/freertos/include/nimble/nimble_npl.h
View File

@@ -1,20 +1,7 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _NIMBLE_NPL_H_

63
components/bt/porting/npl/freertos/src/npl_os_freertos.c
View File

@@ -1,9 +1,7 @@
/*
* SPDX-FileCopyrightText: 2019-2023 The Apache Software Foundation (ASF)
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*
* SPDX-FileContributor: 2019-2024 Espressif Systems (Shanghai) CO LTD
*/
#include <assert.h>
@@ -18,7 +16,6 @@
#include "freertos/timers.h"
#include "freertos/portable.h"
#include "nimble/npl_freertos.h"
#include "nimble/nimble_port.h"
#include "os/os_mempool.h"
#include "esp_log.h"
@@ -481,32 +478,32 @@ IRAM_ATTR npl_freertos_mutex_release(struct ble_npl_mutex *mu)
ble_npl_error_t
npl_freertos_sem_init(struct ble_npl_sem *sem, uint16_t tokens)
{
struct ble_npl_sem_freertos *semaphor = NULL;
struct ble_npl_sem_freertos *semaphore = NULL;
#if OS_MEM_ALLOC
if (!os_memblock_from(&ble_freertos_sem_pool,sem->sem)) {
sem->sem = os_memblock_get(&ble_freertos_sem_pool);
semaphor = (struct ble_npl_sem_freertos *)sem->sem;
semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
memset(semaphor, 0, sizeof(*semaphor));
semaphor->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphor->handle);
memset(semaphore, 0, sizeof(*semaphore));
semaphore->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphore->handle);
}
#else
if(!sem->sem) {
sem->sem = malloc(sizeof(struct ble_npl_sem_freertos));
semaphor = (struct ble_npl_sem_freertos *)sem->sem;
semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
memset(semaphor, 0, sizeof(*semaphor));
semaphor->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphor->handle);
memset(semaphore, 0, sizeof(*semaphore));
semaphore->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphore->handle);
}
#endif
@@ -516,19 +513,19 @@ npl_freertos_sem_init(struct ble_npl_sem *sem, uint16_t tokens)
ble_npl_error_t
npl_freertos_sem_deinit(struct ble_npl_sem *sem)
{
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
BLE_LL_ASSERT(semaphor->handle);
vSemaphoreDelete(semaphor->handle);
BLE_LL_ASSERT(semaphore->handle);
vSemaphoreDelete(semaphore->handle);
#if OS_MEM_ALLOC
os_memblock_put(&ble_freertos_sem_pool,semaphor);
os_memblock_put(&ble_freertos_sem_pool,semaphore);
#else
free((void *)semaphor);
free((void *)semaphore);
#endif
sem->sem = NULL;
@@ -540,22 +537,22 @@ IRAM_ATTR npl_freertos_sem_pend(struct ble_npl_sem *sem, ble_npl_time_t timeout)
{
BaseType_t woken;
BaseType_t ret;
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
BLE_LL_ASSERT(semaphor->handle);
BLE_LL_ASSERT(semaphore->handle);
if (in_isr()) {
BLE_LL_ASSERT(timeout == 0);
ret = xSemaphoreTakeFromISR(semaphor->handle, &woken);
ret = xSemaphoreTakeFromISR(semaphore->handle, &woken);
if( woken == pdTRUE ) {
portYIELD_FROM_ISR();
}
} else {
ret = xSemaphoreTake(semaphor->handle, timeout);
ret = xSemaphoreTake(semaphore->handle, timeout);
}
return ret == pdPASS ? BLE_NPL_OK : BLE_NPL_TIMEOUT;
@@ -566,21 +563,21 @@ IRAM_ATTR npl_freertos_sem_release(struct ble_npl_sem *sem)
{
BaseType_t ret;
BaseType_t woken;
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
BLE_LL_ASSERT(semaphor->handle);
BLE_LL_ASSERT(semaphore->handle);
if (in_isr()) {
ret = xSemaphoreGiveFromISR(semaphor->handle, &woken);
ret = xSemaphoreGiveFromISR(semaphore->handle, &woken);
if( woken == pdTRUE ) {
portYIELD_FROM_ISR();
}
} else {
ret = xSemaphoreGive(semaphor->handle);
ret = xSemaphoreGive(semaphore->handle);
}
BLE_LL_ASSERT(ret == pdPASS);
@@ -773,8 +770,8 @@ npl_freertos_callout_deinit(struct ble_npl_callout *co)
uint16_t
IRAM_ATTR npl_freertos_sem_get_count(struct ble_npl_sem *sem)
{
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
return uxSemaphoreGetCount(semaphor->handle);
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
return uxSemaphoreGetCount(semaphore->handle);
}

4
components/esp_hw_support/modem_clock.c
View File

@@ -381,8 +381,8 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
modem_clock_hal_enable_ble_rtc_timer_clock(MODEM_CLOCK_instance()->hal, true);
#if CONFIG_IDF_TARGET_ESP32H2
if (!rc_clk_en) {
extern void esp_ble_rtc_ticks_delay(uint32_t ticks);
esp_ble_rtc_ticks_delay(2);
extern void r_esp_ble_rtc_ticks_delay(uint32_t ticks);
r_esp_ble_rtc_ticks_delay(2);
clk_ll_rc32k_disable();
}
#endif // CONFIG_IDF_TARGET_ESP32H2

3
examples/bluetooth/nimble/power_save/README.md
View File

@@ -140,4 +140,5 @@ X: This feature is currently not supported.
- ESP32 does not support the use of main XTAL in light sleep mode, so an external 32kHz crystal is required.
- ESP32C2 support XTAL frequency of 26MHz and 40MHz, the XTAL frequency is set to 26MHz in default.
- ESP32C2 support external 32kHz crystal by connecting the crystal to the chip through pin0
- ESP32C2 support external 32kHz crystal by connecting the crystal to the chip through pin0
- ESP32C6 REQUIRES CONFIG_ESP_PHY_MAC_BB_PD to be set for light sleep to run properly