forked from espressif/esp-idf
fix(gdma): fixed GDMA retention on C5
This commit is contained in:
committed by
Kevin (Lao Kaiyao)
parent
ae36f84945
commit
4ed1b873b4
@ -293,6 +293,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_GDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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@ -292,6 +292,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
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}, \
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.backup_clk = ( \
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BIT(PMU_ICG_FUNC_ENA_REGDMA) | \
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BIT(PMU_ICG_FUNC_ENA_GDMA) | \
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BIT(PMU_ICG_FUNC_ENA_TG0) | \
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BIT(PMU_ICG_FUNC_ENA_TG1) | \
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BIT(PMU_ICG_FUNC_ENA_HPBUS) | \
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@ -60,14 +60,6 @@ static const uint32_t i2s_regs_map[4] = {0x12360f, 0x0, 0x0, 0x0};
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i2s_regs_map[0], i2s_regs_map[1], \
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i2s_regs_map[2], i2s_regs_map[3]), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the RX_UPDATE after the retention to make sure the RX configurations are synchronized */ \
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[1] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x01), I2S_RX_CONF_REG(i2s_port), I2S_RX_UPDATE, I2S_RX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the TX_UPDATE after the retention to make sure the TX configurations are synchronized */ \
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[2] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x02), I2S_TX_CONF_REG(i2s_port), I2S_TX_UPDATE, I2S_TX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)} \
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};
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static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0);
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@ -60,14 +60,6 @@ static const uint32_t i2s_regs_map[4] = {0x12330f, 0x0, 0x0, 0x0};
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i2s_regs_map[0], i2s_regs_map[1], \
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i2s_regs_map[2], i2s_regs_map[3]), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the RX_UPDATE after the retention to make sure the RX configurations are synchronized */ \
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[1] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x01), I2S_RX_CONF_REG(i2s_port), I2S_RX_UPDATE, I2S_RX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the TX_UPDATE after the retention to make sure the TX configurations are synchronized */ \
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[2] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x02), I2S_TX_CONF_REG(i2s_port), I2S_TX_UPDATE, I2S_TX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)} \
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};
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static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0);
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@ -59,14 +59,6 @@ static const uint32_t i2s_regs_map[4] = {0x12330f, 0x0, 0x0, 0x0};
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i2s_regs_map[0], i2s_regs_map[1], \
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i2s_regs_map[2], i2s_regs_map[3]), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the RX_UPDATE after the retention to make sure the RX configurations are synchronized */ \
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[1] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x01), I2S_RX_CONF_REG, I2S_RX_UPDATE, I2S_RX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the TX_UPDATE after the retention to make sure the TX configurations are synchronized */ \
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[2] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x02), I2S_TX_CONF_REG, I2S_TX_UPDATE, I2S_TX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)} \
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};
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static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0);
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@ -137,14 +137,6 @@ static const uint32_t i2s_regs_map[4] = {0x12370f, 0x0, 0x0, 0x0};
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i2s_regs_map[0], i2s_regs_map[1], \
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i2s_regs_map[2], i2s_regs_map[3]), \
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.owner = ENTRY(0)}, \
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/* Set the RX_UPDATE after the retention to make sure the RX configurations are synchronized */ \
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[1] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x01), I2S_RX_CONF_REG(i2s_port), I2S_RX_UPDATE, I2S_RX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)}, \
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/* Set the TX_UPDATE after the retention to make sure the TX configurations are synchronized */ \
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[2] = { .config = REGDMA_LINK_WRITE_INIT( \
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REGDMA_I2S_LINK(0x02), I2S_TX_CONF_REG(i2s_port), I2S_TX_UPDATE, I2S_TX_UPDATE_M, 1, 0), \
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.owner = ENTRY(0) | ENTRY(2)} \
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};
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static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0);
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