feedc0de/esp-idf
1
0
Fork 0
forked from espressif/esp-idf
Code Pull Requests Activity

Merge branch 'feat/put_bt_interface_code_to_rom' into 'master'

Browse Source 
Feat/put bt interface code to rom

Closes BLERP-791 and BLERP-804

See merge request espressif/esp-idf!31547
This commit is contained in:
Island
2024-06-19 14:59:08 +08:00
parent e5d9d1dd60 23ff4fc0c4
commit 557aae0166
9 changed files with 138 additions and 111 deletions
Download Patch File Download Diff File Expand all files Collapse all files

78
components/bt/controller/esp32c5/bt.c
View File

@@ -121,7 +121,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@@ -129,12 +129,12 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
@@ -149,15 +149,17 @@ extern void os_msys_deinit(void);
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@@ -723,7 +725,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@@ -780,13 +782,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
coex_init();
#endif // CONFIG_SW_COEXIST_ENABLE
ret = ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -804,11 +799,23 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
goto controller_init_err;
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
esp_ble_change_rtc_freq(slow_clk_freq);
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@@ -825,7 +832,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@@ -835,13 +842,13 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
controller_init_err:
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
os_msys_deinit();
ble_controller_deinit();
modem_deint:
esp_phy_modem_deinit();
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
@@ -872,10 +879,11 @@ esp_err_t esp_bt_controller_deinit(void)
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
ble_controller_deinit();
#if CONFIG_BT_NIMBLE_ENABLED
/* De-initialize default event queue */
@@ -920,7 +928,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@@ -948,7 +956,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@@ -1082,7 +1090,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1095,7 +1103,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1115,13 +1123,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1141,7 +1149,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@@ -1152,7 +1160,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@@ -1174,11 +1182,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

66
components/bt/controller/esp32c6/bt.c
View File

@@ -123,7 +123,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@@ -131,12 +131,12 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
@@ -149,17 +149,19 @@ extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@@ -551,7 +553,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{
esp_ble_set_wakeup_overhead(overhead);
r_esp_ble_set_wakeup_overhead(overhead);
}
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
@@ -744,7 +746,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@@ -821,14 +823,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = ble_controller_init(cfg);
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
esp_ble_change_rtc_freq(slow_clk_freq);
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@@ -845,7 +853,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@@ -856,8 +864,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
ble_controller_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -891,7 +900,8 @@ esp_err_t esp_bt_controller_deinit(void)
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
ble_controller_deinit();
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -939,7 +949,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@@ -967,7 +977,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@@ -1101,7 +1111,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1114,7 +1124,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1134,13 +1144,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1160,7 +1170,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@@ -1171,7 +1181,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@@ -1193,11 +1203,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

85
components/bt/controller/esp32h2/bt.c
View File

@@ -59,8 +59,8 @@
************************************************************************
*/
#define NIMBLE_PORT_LOG_TAG "BLE_INIT"
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define EXT_FUNC_VERSION 0x20221122
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
@@ -115,7 +115,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@@ -123,35 +123,37 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@@ -538,9 +540,10 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{
esp_ble_set_wakeup_overhead(overhead);
r_esp_ble_set_wakeup_overhead(overhead);
}
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
esp_err_t controller_sleep_init(void)
{
@@ -716,7 +719,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@@ -730,10 +733,10 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
*/
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED
/* Enable BT-related clocks */
modem_clock_module_enable(PERIPH_BT_MODULE);
modem_clock_module_mac_reset(PERIPH_BT_MODULE);
/* Select slow clock source for BT momdule */
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
slow_clk_freq = 100000;
@@ -771,6 +774,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
@@ -791,16 +795,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = ble_controller_init(cfg);
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
esp_ble_change_rtc_freq(slow_clk_freq);
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@@ -815,10 +823,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
goto free_controller;
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@@ -829,8 +836,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
ble_controller_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -862,7 +870,8 @@ esp_err_t esp_bt_controller_deinit(void)
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
ble_controller_deinit();
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@@ -910,7 +919,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@@ -938,7 +947,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@@ -1072,7 +1081,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1085,7 +1094,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1105,13 +1114,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1131,7 +1140,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@@ -1142,7 +1151,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@@ -1164,11 +1173,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

2
components/bt/controller/lib_esp32c2/esp32c2-bt-lib

Submodule components/bt/controller/lib_esp32c2/esp32c2-bt-lib updated: 3878fc3d68...8ddd8acac4

2
components/bt/controller/lib_esp32c5/esp32c5-bt-lib

Submodule components/bt/controller/lib_esp32c5/esp32c5-bt-lib updated: 45dda7a690...3996803d35

2
components/bt/controller/lib_esp32c6/esp32c6-bt-lib

Submodule components/bt/controller/lib_esp32c6/esp32c6-bt-lib updated: 405de68173...c2b9d7c8c2

2
components/bt/controller/lib_esp32h2/esp32h2-bt-lib

Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: 586a227264...c2c9f4161f

8
components/bt/porting/nimble/src/os_msys_init.c
View File

@@ -82,12 +82,12 @@ static struct os_mempool os_msys_init_2_mempool;
#endif
#if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
extern int esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
extern void esp_ble_msys_deinit(void);
extern int r_esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
extern void r_esp_ble_msys_deinit(void);
int os_msys_init(void)
{
return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
return r_esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
SYSINIT_MSYS_2_MEMBLOCK_SIZE,
OS_MSYS_1_BLOCK_COUNT,
OS_MSYS_2_BLOCK_COUNT,
@@ -96,7 +96,7 @@ int os_msys_init(void)
void os_msys_deinit(void)
{
esp_ble_msys_deinit();
r_esp_ble_msys_deinit();
}
#else // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER

4
components/esp_hw_support/modem_clock.c
View File

@@ -382,8 +382,8 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
modem_clock_hal_enable_ble_rtc_timer_clock(MODEM_CLOCK_instance()->hal, true);
#if CONFIG_IDF_TARGET_ESP32H2
if (!rc_clk_en) {
extern void esp_ble_rtc_ticks_delay(uint32_t ticks);
esp_ble_rtc_ticks_delay(2);
extern void r_esp_ble_rtc_ticks_delay(uint32_t ticks);
r_esp_ble_rtc_ticks_delay(2);
clk_ll_rc32k_disable();
}
#endif // CONFIG_IDF_TARGET_ESP32H2