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Merge branch 'bugfix/cpu_clock_switch_after_sleep_c5' into 'master'

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fix(sleep): Fix CPU clk src when restoring CPU frequency after wakeup for c5

See merge request espressif/esp-idf!39937
This commit is contained in:
Song Ruo Jing
2025-06-18 16:27:44 +08:00
parent 4a189516c7 d6c483a073
commit 570f9d3c82
1 changed files with 6 additions and 2 deletions
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8
components/esp_hw_support/port/esp32c5/rtc_clk.c
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@@ -408,8 +408,12 @@ void rtc_clk_cpu_freq_set_xtal_for_sleep(void)
void rtc_clk_cpu_freq_to_pll_and_pll_lock_release(int cpu_freq_mhz)
{
// TODO: IDF-8641 CPU_MAX_FREQ don't know what to do... pll_240 or pll_160...
rtc_clk_cpu_freq_to_pll_240_mhz(cpu_freq_mhz);
// IDF-11064
if (cpu_freq_mhz == 240 || (cpu_freq_mhz == 80 && !ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 1))) {
rtc_clk_cpu_freq_to_pll_240_mhz(cpu_freq_mhz);
} else { // cpu_freq_mhz is 160 or 80 (fixed for chip rev. >= ECO1)
rtc_clk_cpu_freq_to_pll_160_mhz(cpu_freq_mhz);
}
clk_ll_cpu_clk_src_lock_release();
}