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change(esp_hw_support): modify the root clock source of pmu modem state to pll for esp32c5

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This commit is contained in:
Lou Tianhao
2024-04-17 17:50:44 +08:00
parent bfba80b778
commit 5e5fb89c10
6 changed files with 164 additions and 163 deletions
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6
components/esp_hw_support/include/esp_private/esp_pmu.h
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@@ -161,12 +161,6 @@ typedef struct {
pmu_context_t * PMU_instance(void); pmu_context_t * PMU_instance(void);
typedef enum pmu_hp_sysclk_src {
PMU_HP_SYSCLK_XTAL = 0,
PMU_HP_SYSCLK_PLL,
PMU_HP_SYSCLK_FOSC
} pmu_hp_sysclk_src_t;
typedef enum pmu_sleep_protect_mode { typedef enum pmu_sleep_protect_mode {
PMU_SLEEP_PROTECT_HP_SLEEP = 0, PMU_SLEEP_PROTECT_HP_SLEEP = 0,
PMU_SLEEP_PROTECT_XTAL, PMU_SLEEP_PROTECT_XTAL,

19
components/esp_hw_support/port/esp32c5/pmu_param.c
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@@ -12,6 +12,7 @@
#include "pmu_param.h" #include "pmu_param.h"
#include "soc/pmu_icg_mapping.h" #include "soc/pmu_icg_mapping.h"
#include "esp_private/esp_pmu.h" #include "esp_private/esp_pmu.h"
#include "soc/clk_tree_defs.h"
#ifndef ARRAY_SIZE #ifndef ARRAY_SIZE
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
@@ -105,10 +106,11 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 0, \ .sysclk_slp_sel = 0, \
.icg_slp_sel = 0, \ .icg_slp_sel = 0, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
// TODO： PM-208
#define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \ #define PMU_HP_MODEM_CLOCK_CONFIG_DEFAULT() { \
.icg_func = 0, \ .icg_func = 0, \
.icg_apb = 0, \ .icg_apb = 0, \
@@ -120,7 +122,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL_F160M \
} \ } \
} }
@@ -135,7 +137,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 0, \ .icg_sysclk_en = 0, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -274,6 +276,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
#define PMU_HP_RETENTION_REGDMA_CONFIG(dir, entry) ((((dir)<<4) | (entry & 0xf)) & 0x1f) #define PMU_HP_RETENTION_REGDMA_CONFIG(dir, entry) ((((dir)<<4) | (entry & 0xf)) & 0x1f)
// TODO： PM-208
#define PMU_HP_ACTIVE_RETENTION_CONFIG_DEFAULT() { \ #define PMU_HP_ACTIVE_RETENTION_CONFIG_DEFAULT() { \
.retention = { \ .retention = { \
.hp_sleep2active_backup_modem_clk_code = 2, \ .hp_sleep2active_backup_modem_clk_code = 2, \
@@ -281,8 +284,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_active_retention_mode = 0, \ .hp_active_retention_mode = 0, \
.hp_sleep2active_retention_en = 0, \ .hp_sleep2active_retention_en = 0, \
.hp_modem2active_retention_en = 0, \ .hp_modem2active_retention_en = 0, \
.hp_sleep2active_backup_clk_sel = 0, \ .hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2active_backup_clk_sel = 1, \ .hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_PLL_F160M, \
.hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \ .hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \
.hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \ .hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
@@ -306,7 +309,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_modem_clk_code = 1, \ .hp_sleep2modem_backup_modem_clk_code = 1, \
.hp_modem_retention_mode = 0, \ .hp_modem_retention_mode = 0, \
.hp_sleep2modem_retention_en = 0, \ .hp_sleep2modem_retention_en = 0, \
.hp_sleep2modem_backup_clk_sel = 0, \ .hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \ .hp_sleep2modem_backup_en = 0, \
}, \ }, \
@@ -330,8 +333,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep_retention_mode = 0, \ .hp_sleep_retention_mode = 0, \
.hp_modem2sleep_retention_en = 0, \ .hp_modem2sleep_retention_en = 0, \
.hp_active2sleep_retention_en = 0, \ .hp_active2sleep_retention_en = 0, \
.hp_modem2sleep_backup_clk_sel = 0, \ .hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_active2sleep_backup_clk_sel = 0, \ .hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \ .hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \
.hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \ .hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \

17
components/esp_hw_support/port/esp32c6/pmu_param.c
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@@ -15,6 +15,7 @@
#include "hal/efuse_ll.h" #include "hal/efuse_ll.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"
#include "esp_hw_log.h" #include "esp_hw_log.h"
#include "soc/clk_tree_defs.h"
static __attribute__((unused)) const char *TAG = "pmu_param"; static __attribute__((unused)) const char *TAG = "pmu_param";
@@ -110,7 +111,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 0, \ .sysclk_slp_sel = 0, \
.icg_slp_sel = 0, \ .icg_slp_sel = 0, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -125,7 +126,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL \
} \ } \
} }
@@ -140,7 +141,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 0, \ .icg_sysclk_en = 0, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -283,8 +284,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_active_retention_mode = 0, \ .hp_active_retention_mode = 0, \
.hp_sleep2active_retention_en = 0, \ .hp_sleep2active_retention_en = 0, \
.hp_modem2active_retention_en = 0, \ .hp_modem2active_retention_en = 0, \
.hp_sleep2active_backup_clk_sel = 0, \ .hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2active_backup_clk_sel = 1, \ .hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_PLL, \
.hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \ .hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \
.hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \ .hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
@@ -309,7 +310,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_modem_clk_code = 1, \ .hp_sleep2modem_backup_modem_clk_code = 1, \
.hp_modem_retention_mode = 0, \ .hp_modem_retention_mode = 0, \
.hp_sleep2modem_retention_en = 0, \ .hp_sleep2modem_retention_en = 0, \
.hp_sleep2modem_backup_clk_sel = 0, \ .hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \ .hp_sleep2modem_backup_en = 0, \
}, \ }, \
@@ -333,8 +334,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep_retention_mode = 0, \ .hp_sleep_retention_mode = 0, \
.hp_modem2sleep_retention_en = 0, \ .hp_modem2sleep_retention_en = 0, \
.hp_active2sleep_retention_en = 0, \ .hp_active2sleep_retention_en = 0, \
.hp_modem2sleep_backup_clk_sel = 0, \ .hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_active2sleep_backup_clk_sel = 0, \ .hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \ .hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \
.hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \ .hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \

7
components/esp_hw_support/port/esp32c61/pmu_param.c
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@@ -16,6 +16,7 @@
#include "hal/efuse_ll.h" #include "hal/efuse_ll.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"
#include "esp_hw_log.h" #include "esp_hw_log.h"
#include "soc/clk_tree_defs.h"
#ifndef ARRAY_SIZE #ifndef ARRAY_SIZE
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
@@ -109,7 +110,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 0, \ .sysclk_slp_sel = 0, \
.icg_slp_sel = 0, \ .icg_slp_sel = 0, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -124,7 +125,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL_F160M \
} \ } \
} }
@@ -139,7 +140,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 0, \ .icg_sysclk_en = 0, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }

17
components/esp_hw_support/port/esp32h2/pmu_param.c
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@@ -15,6 +15,7 @@
#include "hal/efuse_ll.h" #include "hal/efuse_ll.h"
#include "hal/efuse_hal.h" #include "hal/efuse_hal.h"
#include "esp_hw_log.h" #include "esp_hw_log.h"
#include "soc/clk_tree_defs.h"
static __attribute__((unused)) const char *TAG = "pmu_param"; static __attribute__((unused)) const char *TAG = "pmu_param";
@@ -110,7 +111,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 0, \ .sysclk_slp_sel = 0, \
.icg_slp_sel = 0, \ .icg_slp_sel = 0, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -125,7 +126,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_PLL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_PLL \
} \ } \
} }
@@ -140,7 +141,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 0, \ .icg_sysclk_en = 0, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -282,8 +283,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_active_retention_mode = 0, \ .hp_active_retention_mode = 0, \
.hp_sleep2active_retention_en = 0, \ .hp_sleep2active_retention_en = 0, \
.hp_modem2active_retention_en = 0, \ .hp_modem2active_retention_en = 0, \
.hp_sleep2active_backup_clk_sel = 0, \ .hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2active_backup_clk_sel = 0, \ .hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \ .hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \
.hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \ .hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \
.hp_sleep2active_backup_en = 0, \ .hp_sleep2active_backup_en = 0, \
@@ -308,7 +309,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_modem_clk_code = 3, \ .hp_sleep2modem_backup_modem_clk_code = 3, \
.hp_modem_retention_mode = 0, \ .hp_modem_retention_mode = 0, \
.hp_sleep2modem_retention_en = 0, \ .hp_sleep2modem_retention_en = 0, \
.hp_sleep2modem_backup_clk_sel = 0, \ .hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \ .hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \ .hp_sleep2modem_backup_en = 0, \
}, \ }, \
@@ -331,8 +332,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep_retention_mode = 0, \ .hp_sleep_retention_mode = 0, \
.hp_modem2sleep_retention_en = 0, \ .hp_modem2sleep_retention_en = 0, \
.hp_active2sleep_retention_en = 0, \ .hp_active2sleep_retention_en = 0, \
.hp_modem2sleep_backup_clk_sel = 0, \ .hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_active2sleep_backup_clk_sel = 0, \ .hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \ .hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \
.hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \ .hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \
.hp_modem2sleep_backup_en = 0, \ .hp_modem2sleep_backup_en = 0, \

5
components/esp_hw_support/port/esp32p4/pmu_param.c
View File

@@ -12,6 +12,7 @@
#include "pmu_param.h" #include "pmu_param.h"
#include "soc/pmu_icg_mapping.h" #include "soc/pmu_icg_mapping.h"
#include "esp_private/esp_pmu.h" #include "esp_private/esp_pmu.h"
#include "soc/clk_tree_defs.h"
#ifndef ARRAY_SIZE #ifndef ARRAY_SIZE
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
@@ -75,7 +76,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 1, \ .icg_sysclk_en = 1, \
.sysclk_slp_sel = 0, \ .sysclk_slp_sel = 0, \
.icg_slp_sel = 0, \ .icg_slp_sel = 0, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }
@@ -88,7 +89,7 @@ const pmu_hp_system_power_param_t * pmu_hp_system_power_param_default(pmu_hp_mod
.icg_sysclk_en = 0, \ .icg_sysclk_en = 0, \
.sysclk_slp_sel = 1, \ .sysclk_slp_sel = 1, \
.icg_slp_sel = 1, \ .icg_slp_sel = 1, \
.dig_sysclk_sel = PMU_HP_SYSCLK_XTAL \ .dig_sysclk_sel = SOC_CPU_CLK_SRC_XTAL \
} \ } \
} }