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Merge branch 'bugfix/uart_single_wire_mode_v5.2_fix' into 'release/v5.2'

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fix(uart): fix incorrect IO configuration for TX and RX configure to the same pin

See merge request espressif/esp-idf!36294
This commit is contained in:
morris
2025-01-13 16:50:34 +08:00
parent 81bce81a18 fe62246f5a
commit 7a63e00c4c
2 changed files with 2 additions and 2 deletions
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2
components/driver/test_apps/uart/pytest_uart.py
View File

@ -24,7 +24,7 @@ input_argv = {
indirect=True,
)
def test_uart_single_dev(case_tester) -> None: # type: ignore
dut = case_tester.dut
dut = case_tester.first_dut
chip_type = dut.app.target
for case in case_tester.test_menu:
if 'hp-uart-only' not in case.groups:

2
components/driver/uart/uart.c
View File

@ -764,7 +764,7 @@ esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int r
if (rx_io_num >= 0 && (tx_rx_same_io || !uart_try_set_iomux_pin(uart_num, rx_io_num, SOC_UART_RX_PIN_IDX))) {
if (uart_num < SOC_UART_HP_NUM) {
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rx_io_num], PIN_FUNC_GPIO);
gpio_set_direction(rx_io_num, GPIO_MODE_INPUT);
gpio_ll_input_enable(&GPIO, rx_io_num);
esp_rom_gpio_connect_in_signal(rx_io_num, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX), 0);
}
#if SOC_LP_GPIO_MATRIX_SUPPORTED