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Merge branch 'change/ble_update_lib_20250103' into 'master'

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change(ble): [AUTO_MR] 20250103 - Update ESP BLE Controller Lib

Closes BLERP-1449, BLERP-1450, BLERP-1448, BLERP-1460, BLERP-1461, BLERP-1462, BLERP-1421, BLERP-1407, BLERP-1075, BLERP-1463, BLERP-1412, BLERP-1422, BLERP-1454, and BLERP-1466

See merge request espressif/esp-idf!36145
This commit is contained in:
Island
2025-01-14 12:20:23 +08:00
parent 7d75dea34a 937fe2a6e3
commit 8563c2fc46
17 changed files with 540 additions and 84 deletions
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2
components/bt/CMakeLists.txt
View File

@@ -905,7 +905,7 @@ if(CONFIG_BT_ENABLED)
add_prebuilt_library(libble_app
"${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c6/esp32c6-bt-lib/esp32c61/libble_app.a")
else()
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY AND CONFIG_IDF_TARGET_ESP32C2)
add_prebuilt_library(libble_app
"controller/lib_${target_name}/${target_name}-bt-lib/libble_app_flash.a")
else()

32
components/bt/controller/esp32c2/bt.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -1147,12 +1147,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1179,9 +1187,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1204,11 +1216,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1237,9 +1253,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:

104
components/bt/controller/esp32c5/Kconfig.in
View File

@@ -310,6 +310,24 @@ config BT_LE_CONTROLLER_LOG_DUMP_ONLY
help
Only operate in dump mode
config BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
bool "Store ble controller logs to flash(Experimental)"
depends on !BT_LE_CONTROLLER_LOG_DUMP_ONLY
depends on BT_LE_CONTROLLER_LOG_ENABLED
default n
help
Store ble controller logs to flash memory.
config BT_LE_CONTROLLER_LOG_PARTITION_SIZE
int "size of ble controller log partition(Multiples of 4K)"
depends on BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
default 65536
help
The size of ble controller log partition shall be a multiples of 4K.
The name of log partition shall be "bt_ctrl_log".
The partition type shall be ESP_PARTITION_TYPE_DATA.
The partition sub_type shall be ESP_PARTITION_SUBTYPE_ANY.
config BT_LE_LOG_CTRL_BUF1_SIZE
int "size of the first BLE controller LOG buffer"
depends on BT_LE_CONTROLLER_LOG_ENABLED
@@ -575,3 +593,89 @@ config BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD
config BT_LE_MSYS_INIT_IN_CONTROLLER
bool "Msys Mbuf Init in Controller"
default y
config BT_LE_TX_CCA_ENABLED
bool "Enable TX CCA feature"
default n
help
Enable CCA feature to cancel sending the packet if the signal power is stronger than CCA threshold.
config BT_LE_CCA_RSSI_THRESH
int "CCA RSSI threshold value"
depends on BT_LE_TX_CCA_ENABLED
range 20 100
default 20
help
Power threshold of CCA in unit of -1 dBm.
choice BT_LE_DFT_TX_POWER_LEVEL_DBM
prompt "BLE default Tx power level(dBm)"
default BT_LE_DFT_TX_POWER_LEVEL_P9
help
Specify default Tx power level(dBm).
config BT_LE_DFT_TX_POWER_LEVEL_N24
bool "-24dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N21
bool "-21dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N18
bool "-18dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N15
bool "-15dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N12
bool "-12dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N9
bool "-9dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N6
bool "-6dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N3
bool "-3dBm"
config BT_LE_DFT_TX_POWER_LEVEL_N0
bool "0dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P3
bool "+3dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P6
bool "+6dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P9
bool "+9dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P12
bool "+12dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P15
bool "+15dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P18
bool "+18dBm"
config BT_LE_DFT_TX_POWER_LEVEL_P20
bool "+20dBm"
endchoice
config BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF
int
default -15 if BT_LE_DFT_TX_POWER_LEVEL_N15
default -12 if BT_LE_DFT_TX_POWER_LEVEL_N12
default -9 if BT_LE_DFT_TX_POWER_LEVEL_N9
default -6 if BT_LE_DFT_TX_POWER_LEVEL_N6
default -3 if BT_LE_DFT_TX_POWER_LEVEL_N3
default 0 if BT_LE_DFT_TX_POWER_LEVEL_N0
default 3 if BT_LE_DFT_TX_POWER_LEVEL_P3
default 6 if BT_LE_DFT_TX_POWER_LEVEL_P6
default 9 if BT_LE_DFT_TX_POWER_LEVEL_P9
default 12 if BT_LE_DFT_TX_POWER_LEVEL_P12
default 15 if BT_LE_DFT_TX_POWER_LEVEL_P15
default 18 if BT_LE_DFT_TX_POWER_LEVEL_P18
default 20 if BT_LE_DFT_TX_POWER_LEVEL_P20
default 0
config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
bool "Enable enhanced Access Address check in CONNECT_IND"
default n
help
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.
config BT_CTRL_RUN_IN_FLASH_ONLY
bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
default n
help
Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
Because the code is moved to the flash, the execution speed of the code is reduced.
To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).

327
components/bt/controller/esp32c5/bt.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -127,6 +127,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
@@ -170,6 +174,9 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
const uint8_t *our_priv_key, uint8_t *out_dhkey);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void);
#endif // #if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
/* Local variable definition
***************************************************************************
@@ -178,6 +185,204 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b
static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
enum log_out_mode {
LOG_DUMP_MEMORY,
LOG_ASYNC_OUT,
LOG_STORAGE_TO_FLASH,
};
bool log_is_inited = false;
#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
uint8_t log_output_mode = LOG_DUMP_MEMORY;
#else
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
uint8_t log_output_mode = LOG_STORAGE_TO_FLASH;
#else
uint8_t log_output_mode = LOG_ASYNC_OUT;
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
#endif // CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
void esp_bt_log_output_mode_set(uint8_t output_mode)
{
log_output_mode = output_mode;
}
uint8_t esp_bt_log_output_mode_get(void)
{
return log_output_mode;
}
esp_err_t esp_bt_controller_log_init(uint8_t log_output_mode)
{
esp_err_t ret = ESP_OK;
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
bool task_create;
uint8_t buffers = 0;
if (log_is_inited) {
return ret;
}
#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
buffers |= ESP_BLE_LOG_BUF_HCI;
#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
switch (log_output_mode) {
case LOG_DUMP_MEMORY:
task_create = false;
break;
case LOG_ASYNC_OUT:
case LOG_STORAGE_TO_FLASH:
task_create = true;
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
if (log_output_mode == LOG_STORAGE_TO_FLASH) {
esp_bt_ctrl_log_partition_get_and_erase_first_block();
}
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
break;
default:
assert(0);
}
ret = r_ble_log_init_async(bt_controller_log_interface, task_create, buffers, (uint32_t *)log_bufs_size);
if (ret == ESP_OK) {
log_is_inited = true;
}
return ret;
}
void esp_bt_ontroller_log_deinit(void)
{
r_ble_log_deinit_async();
log_is_inited = false;
}
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
#include "esp_partition.h"
#include "hal/wdt_hal.h"
#define MAX_STORAGE_SIZE (CONFIG_BT_LE_CONTROLLER_LOG_PARTITION_SIZE)
#define BLOCK_SIZE (4096)
#define THRESHOLD (3072)
#define PARTITION_NAME "bt_ctrl_log"
static const esp_partition_t *log_partition;
static uint32_t write_index = 0;
static uint32_t next_erase_index = BLOCK_SIZE;
static bool block_erased = false;
static bool stop_write = false;
static bool is_filled = false;
static void esp_bt_ctrl_log_partition_get_and_erase_first_block(void)
{
log_partition = NULL;
assert(MAX_STORAGE_SIZE % BLOCK_SIZE == 0);
// Find the partition map in the partition table
log_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, PARTITION_NAME);
assert(log_partition != NULL);
// Prepare data to be read later using the mapped address
ESP_ERROR_CHECK(esp_partition_erase_range(log_partition, 0, BLOCK_SIZE));
write_index = 0;
next_erase_index = BLOCK_SIZE;
block_erased = false;
is_filled = false;
stop_write = false;
}
static int esp_bt_controller_log_storage(uint32_t len, const uint8_t *addr, bool end)
{
if (len > MAX_STORAGE_SIZE) {
return -1;
}
if (stop_write) {
return 0;
}
if (((write_index) % BLOCK_SIZE) >= THRESHOLD && !block_erased) {
// esp_rom_printf("Ers nxt: %d,%d\n", next_erase_index, write_index);
esp_partition_erase_range(log_partition, next_erase_index, BLOCK_SIZE);
next_erase_index = (next_erase_index + BLOCK_SIZE) % MAX_STORAGE_SIZE;
block_erased = true;
}
if (((write_index + len) / BLOCK_SIZE) > (write_index / BLOCK_SIZE)) {
block_erased = false;
}
if (write_index + len <= MAX_STORAGE_SIZE) {
esp_partition_write(log_partition, write_index, addr, len);
write_index = (write_index + len) % MAX_STORAGE_SIZE;
} else {
uint32_t first_part_len = MAX_STORAGE_SIZE - write_index;
esp_partition_write(log_partition, write_index, addr, first_part_len);
esp_partition_write(log_partition, 0, addr + first_part_len, len - first_part_len);
write_index = len - first_part_len;
is_filled = true;
// esp_rom_printf("old idx: %d,%d\n",next_erase_index, write_index);
}
return 0;
}
void esp_bt_read_ctrl_log_from_flash(bool output)
{
esp_partition_mmap_handle_t mmap_handle;
uint32_t read_index;
const void *mapped_ptr;
const uint8_t *buffer;
uint32_t print_len;
uint32_t max_print_len;
esp_err_t err;
print_len = 0;
max_print_len = 4096;
err = esp_partition_mmap(log_partition, 0, MAX_STORAGE_SIZE, ESP_PARTITION_MMAP_DATA, &mapped_ptr, &mmap_handle);
if (err != ESP_OK) {
ESP_LOGE("FLASH", "Mmap failed: %s", esp_err_to_name(err));
return;
}
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
portENTER_CRITICAL_SAFE(&spinlock);
esp_panic_handler_reconfigure_wdts(5000);
r_ble_log_async_output_dump_all(true);
esp_bt_ontroller_log_deinit();
stop_write = true;
buffer = (const uint8_t *)mapped_ptr;
esp_panic_handler_reconfigure_wdts(5000);
if (is_filled) {
read_index = next_erase_index;
} else {
read_index = 0;
}
esp_rom_printf("\r\nREAD_CHECK:%ld,%ld,%d\r\n",read_index, write_index, is_filled);
esp_rom_printf("\r\n[DUMP_START:");
while (read_index != write_index) {
esp_rom_printf("%02x ", buffer[read_index]);
if (print_len > max_print_len) {
esp_panic_handler_reconfigure_wdts(5000);
print_len = 0;
}
print_len++;
read_index = (read_index + 1) % MAX_STORAGE_SIZE;
}
esp_rom_printf(":DUMP_END]\r\n");
portEXIT_CRITICAL_SAFE(&spinlock);
esp_partition_munmap(mmap_handle);
err = esp_bt_controller_log_init(log_output_mode);
assert(err == ESP_OK);
}
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
/* This variable tells if BLE is running */
@@ -186,10 +391,20 @@ static bool s_ble_active = false;
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
#endif // CONFIG_PM_ENABLE
static DRAM_ATTR modem_clock_lpclk_src_t s_bt_lpclk_src = MODEM_CLOCK_LPCLK_SRC_INVALID;
#define BLE_RTC_DELAY_US_LIGHT_SLEEP (2500)
#define BLE_RTC_DELAY_US_MODEM_SLEEP (500)
#define BLE_CONTROLLER_MALLOC_CAPS (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA)
void *malloc_ble_controller_mem(size_t size)
{
return heap_caps_malloc(size, BLE_CONTROLLER_MALLOC_CAPS);
}
uint32_t get_ble_controller_free_heap_size(void)
{
return heap_caps_get_free_size(BLE_CONTROLLER_MALLOC_CAPS);
}
static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
._magic = OSI_COEX_MAGIC_VALUE,
._version = OSI_COEX_VERSION,
@@ -283,8 +498,11 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
arg, (intr_handle_t *)ret_handle_in);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
#else
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
#endif
return rc;
}
@@ -377,7 +595,6 @@ static esp_err_t sleep_modem_ble_mac_retention_init(void *arg)
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Modem BLE MAC retention initialization");
}
return err;
return ESP_OK;
}
static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
@@ -409,6 +626,7 @@ void IRAM_ATTR sleep_modem_light_sleep_overhead_set(uint32_t overhead)
}
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
esp_err_t controller_sleep_init(void)
{
esp_err_t rc = 0;
@@ -423,13 +641,13 @@ esp_err_t controller_sleep_init(void)
BLE_RTC_DELAY_US_MODEM_SLEEP);
#endif /* FREERTOS_USE_TICKLESS_IDLE */
#endif // CONFIG_BT_LE_SLEEP_ENABLE
#ifdef CONFIG_PM_ENABLE
rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
if (rc != ESP_OK) {
goto error;
}
#endif // CONFIG_PM_ENABLE
#if CONFIG_BT_LE_SLEEP_ENABLE && CONFIG_FREERTOS_USE_TICKLESS_IDLE
/* Create a new regdma link for BLE related register restoration */
rc = sleep_modem_ble_mac_modem_state_init(0);
@@ -611,7 +829,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
uint8_t hci_transport_mode;
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_ERR_INVALID_STATE;
@@ -674,20 +891,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
uint8_t buffers = 0;
#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
buffers |= ESP_BLE_LOG_BUF_HCI;
#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
ret = r_ble_log_init_async(bt_controller_log_interface, false, buffers, (uint32_t *)log_bufs_size);
#else
ret = r_ble_log_init_async(bt_controller_log_interface, true, buffers, (uint32_t *)log_bufs_size);
#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
ret = esp_bt_controller_log_init(log_output_mode);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
goto modem_deint;
@@ -720,6 +924,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
goto free_controller;
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
@@ -748,7 +953,7 @@ free_controller:
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
esp_bt_ontroller_log_deinit();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
esp_phy_modem_deinit();
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
@@ -784,7 +989,7 @@ esp_err_t esp_bt_controller_deinit(void)
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
esp_bt_ontroller_log_deinit();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
#if CONFIG_BT_NIMBLE_ENABLED
@@ -830,6 +1035,10 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
r_ble_ll_scan_start_time_init_compensation(500);
r_priv_sdk_config_insert_proc_time_set(500);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
@@ -990,12 +1199,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1023,9 +1240,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1048,11 +1269,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1082,9 +1307,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
@@ -1104,24 +1331,40 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
{
for (int i = 0; i < len; i++) {
esp_rom_printf("%02x ", addr[i]);
}
if (end) {
esp_rom_printf("\n");
if (log_output_mode == LOG_STORAGE_TO_FLASH) {
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
esp_bt_controller_log_storage(len, addr, end);
#endif //CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
} else {
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
portENTER_CRITICAL_SAFE(&spinlock);
esp_panic_handler_reconfigure_wdts(1000);
for (int i = 0; i < len; i++) {
esp_rom_printf("%02x ", addr[i]);
}
if (end) {
esp_rom_printf("\n");
}
portEXIT_CRITICAL_SAFE(&spinlock);
}
}
void esp_ble_controller_log_dump_all(bool output)
{
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
portENTER_CRITICAL_SAFE(&spinlock);
esp_panic_handler_reconfigure_wdts(5000);
BT_ASSERT_PRINT("\r\n[DUMP_START:");
r_ble_log_async_output_dump_all(output);
BT_ASSERT_PRINT(":DUMP_END]\r\n");
portEXIT_CRITICAL_SAFE(&spinlock);
if (log_output_mode == LOG_STORAGE_TO_FLASH) {
#if CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
esp_bt_read_ctrl_log_from_flash(output);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
} else {
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
portENTER_CRITICAL_SAFE(&spinlock);
esp_panic_handler_reconfigure_wdts(5000);
BT_ASSERT_PRINT("\r\n[DUMP_START:");
r_ble_log_async_output_dump_all(output);
BT_ASSERT_PRINT(":DUMP_END]\r\n");
portEXIT_CRITICAL_SAFE(&spinlock);
}
}
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED

11
components/bt/controller/esp32c5/esp_bt_cfg.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -148,6 +148,12 @@ extern "C" {
#define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF
#ifdef CONFIG_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
#define DEFAULT_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS (CONFIG_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS)
#else
#define DEFAULT_BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS (0)
#endif
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#define HCI_UART_EN CONFIG_BT_LE_HCI_INTERFACE_USE_UART
#else
@@ -216,8 +222,7 @@ extern "C" {
#define RTC_FREQ_N (32768) /* in Hz */
#define BLE_LL_TX_PWR_DBM_N (9)
#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF)
#define RUN_BQB_TEST (0)
#define RUN_QA_TEST (0)

8
components/bt/controller/esp32c6/Kconfig.in
View File

@@ -697,3 +697,11 @@ config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.
config BT_CTRL_RUN_IN_FLASH_ONLY
bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
default n
help
Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
Because the code is moved to the flash, the execution speed of the code is reduced.
To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).

50
components/bt/controller/esp32c6/bt.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -130,6 +130,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
@@ -494,11 +498,13 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
return rc;
}
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
void *arg, void **ret_handle_in)
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
arg, (intr_handle_t *)ret_handle_in);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
#else
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
#endif
return rc;
}
@@ -1050,6 +1056,10 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
r_ble_ll_scan_start_time_init_compensation(500);
r_priv_sdk_config_insert_proc_time_set(500);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
@@ -1210,12 +1220,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1243,9 +1261,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1268,11 +1290,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1302,9 +1328,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:

8
components/bt/controller/esp32h2/Kconfig.in
View File

@@ -698,3 +698,11 @@ config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.
config BT_CTRL_RUN_IN_FLASH_ONLY
bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
default n
help
Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
Because the code is moved to the flash, the execution speed of the code is reduced.
To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).

48
components/bt/controller/esp32h2/bt.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -125,6 +125,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
@@ -495,8 +499,11 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
arg, (intr_handle_t *)ret_handle_in);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
#else
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
#endif
return rc;
}
@@ -1020,7 +1027,10 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
#if CONFIG_SW_COEXIST_ENABLE
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
r_ble_ll_scan_start_time_init_compensation(500);
r_priv_sdk_config_insert_proc_time_set(500);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
@@ -1181,12 +1191,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1214,9 +1232,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@@ -1239,11 +1261,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@@ -1273,9 +1299,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:

2
components/bt/controller/lib_esp32c2/esp32c2-bt-lib

Submodule components/bt/controller/lib_esp32c2/esp32c2-bt-lib updated: 339d66ea3d...c04f6f7c49

2
components/bt/controller/lib_esp32c5/esp32c5-bt-lib

Submodule components/bt/controller/lib_esp32c5/esp32c5-bt-lib updated: b4f67e85c5...ea98e86d72

2
components/bt/controller/lib_esp32c6/esp32c6-bt-lib

Submodule components/bt/controller/lib_esp32c6/esp32c6-bt-lib updated: 2c3b919de8...04332117af

2
components/bt/controller/lib_esp32h2/esp32h2-bt-lib

Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: 59c26f308e...f7ae7f056b

4
components/bt/include/esp32c5/include/esp_bt.h
View File

@@ -159,7 +159,7 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
*/
esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
#define CONFIG_VERSION 0x20240422
#define CONFIG_VERSION 0x20241121
#define CONFIG_MAGIC 0x5A5AA5A5
/**
@@ -213,6 +213,8 @@ typedef struct {
uint8_t ignore_wl_for_direct_adv; /*!< Ignore the whitelist for direct advertising */
uint8_t enable_pcl; /*!< Enable power control */
uint8_t csa2_select; /*!< Select CSA#2*/
uint8_t enable_csr; /*!< Enable CSR */
uint8_t ble_aa_check; /*!< True if adds a verification step for the Access Address within the CONNECT_IND PDU; false otherwise. Configurable in menuconfig */
uint32_t config_magic; /*!< Magic number for configuration validation */
} esp_bt_controller_config_t;

14
components/bt/linker_esp_ble_controller.lf
View File

@@ -1,8 +1,21 @@
[sections:bt_iram_text]
entries:
.iram1+
[sections:high_perf_iram_text]
entries:
.high_perf_code_iram1+
[scheme:bt_default]
entries:
bt_bss -> dram0_bss
bt_common -> dram0_bss
data -> dram0_data
high_perf_iram_text -> iram0_text
if BT_CTRL_RUN_IN_FLASH_ONLY = y:
bt_iram_text -> flash_text
else:
bt_iram_text -> iram0_text
# For the following fragments, order matters for
# 'ALIGN(4) ALIGN(4, post) SURROUND(sym)', which generates:
@@ -27,7 +40,6 @@ entries:
bt_common -> dram0_bss ALIGN(4) ALIGN(4, post) SURROUND(bt_common),
data -> dram0_data ALIGN(4) ALIGN(4, post) SURROUND(bt_data)
[mapping:ble_app]
archive: libble_app.a
entries:

6
components/esp_rom/esp32c2/ld/esp32c2.rom.ble-eco4.ld
View File

@@ -192,7 +192,7 @@ r_ble_ll_conn_chk_csm_flags = 0x40000d48;
r_ble_ll_conn_chk_phy_upd_start = 0x40000d4c;
r_ble_ll_conn_comp_event_send = 0x40000d50;
r_ble_ll_conn_connect_ind_pdu_make = 0x40000d54;
r_ble_ll_conn_create = 0x40000d58;
//r_ble_ll_conn_create = 0x40000d58;
r_ble_ll_conn_create_cancel = 0x40000d5c;
r_ble_ll_conn_created = 0x40000d60;
r_ble_ll_conn_cth_flow_enable = 0x40000d64;
@@ -322,7 +322,7 @@ r_ble_ll_event_dbuf_overflow = 0x40000f50;
r_ble_ll_event_send = 0x40000f54;
r_ble_ll_event_tx_pkt = 0x40000f58;
r_ble_ll_ext_adv_phy_mode_to_local_phy = 0x40000f5c;
r_ble_ll_ext_conn_create = 0x40000f60;
//r_ble_ll_ext_conn_create = 0x40000f60;
r_ble_ll_ext_scan_parse_adv_info = 0x40000f64;
r_ble_ll_ext_scan_parse_aux_ptr = 0x40000f68;
r_ble_ll_flush_pkt_queue = 0x40000f6c;
@@ -706,7 +706,7 @@ r_ble_lll_conn_process_in_isr = 0x40001550;
r_ble_lll_conn_recv_ack = 0x40001554;
r_ble_lll_conn_recv_valid_packet = 0x40001558;
r_ble_lll_conn_reset_pending_sched = 0x4000155c;
r_ble_lll_conn_rx_pkt_isr = 0x40001560;
//r_ble_lll_conn_rx_pkt_isr = 0x40001560;
r_ble_lll_conn_sched_next_anchor = 0x40001564;
r_ble_lll_conn_sched_next_event = 0x40001568;
r_ble_lll_conn_set_slave_flow_control = 0x4000156c;

2
components/esp_rom/esp32c2/ld/esp32c2.rom.ble.ld
View File

@@ -611,7 +611,7 @@ r_ble_lll_per_adv_coex_dpc_update_on_data_updated = 0x40001638;
r_ble_lll_per_adv_coex_dpc_update_on_scheduled = 0x4000163c;
r_ble_lll_per_adv_coex_dpc_update_on_start = 0x40001640;
r_ble_lll_rfmgmt_is_enabled = 0x40001660;
r_ble_lll_rfmgmt_release = 0x40001664;
//r_ble_lll_rfmgmt_release = 0x40001664;
r_ble_lll_rfmgmt_scan_changed = 0x40001670;
r_ble_lll_rfmgmt_sched_changed = 0x40001674;
r_ble_lll_rfmgmt_set_sleep_cb = 0x40001678;