fix: update efuse register files for esp32c5 eco2

components/efuse/esp32c5/esp_efuse_utility.c

@@ -20,7 +20,7 @@ extern uint32_t virt_blocks[EFUSE_BLK_MAX][COUNT_EFUSE_REG_PER_BLOCK];
 
 /*Range addresses to read blocks*/
 const esp_efuse_range_addr_t range_read_addr_blocks[] = {
-    {EFUSE_RD_WR_DIS0_REG,       EFUSE_RD_REPEAT_DATA4_REG},      // range address of EFUSE_BLK0  REPEAT
+    {EFUSE_RD_WR_DIS_REG,       EFUSE_RD_REPEAT_DATA4_REG},      // range address of EFUSE_BLK0  REPEAT
     {EFUSE_RD_MAC_SYS0_REG,     EFUSE_RD_MAC_SYS5_REG},      // range address of EFUSE_BLK1  MAC_SPI_8M
     {EFUSE_RD_SYS_PART1_DATA0_REG,    EFUSE_RD_SYS_PART1_DATA7_REG},         // range address of EFUSE_BLK2  SYS_DATA
     {EFUSE_RD_USR_DATA0_REG,    EFUSE_RD_USR_DATA7_REG},         // range address of EFUSE_BLK3  USR_DATA

components/hal/esp32c5/include/hal/efuse_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -38,7 +38,7 @@ __attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_c
 
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_wdt_delay_sel(void)
 {
-    return EFUSE.rd_repeat_data1.wdt_delay_sel;
+    return EFUSE.rd_repeat_data0.wdt_delay_sel;
 }
 
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void)
@@ -100,7 +100,8 @@ __attribute__((always_inline)) static inline void efuse_ll_set_ecdsa_key_blk(int
 
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_ocode(void)
 {
-    return EFUSE.rd_sys_part1_data4.ocode;
+    // TODO: IDF-13007
+    return 0;
 }
 
 /******************* eFuse control functions *************************/